[llvm] [RISCV] Add Xqci Insn Formats (PR #132986)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 1 21:45:48 PDT 2025 

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `amdgpu-offload-rhel-9-cmake-build-only` running on `rocm-docker-rhel-9` while building `llvm` at step 4 "annotate".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/205/builds/5222

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 4 (annotate) failure: '../llvm-zorg/zorg/buildbot/builders/annotated/amdgpu-offload-cmake.py --jobs=32' (failure)
...
[1435/7717] Building NVVMOpsTypes.cpp.inc...
[1436/7717] Building NVVMOpsTypes.h.inc...
[1437/7717] Building NVVMConversions.inc...
[1438/7717] Building NVVMFromLLVMIRConversions.inc...
[1439/7717] Building NVVMConvertibleLLVMIRIntrinsics.inc...
[1440/7717] Building NVVMOpsAttributes.cpp.inc...
[1441/7717] Building NVVMOpsAttributes.h.inc...
[1442/7717] Building NVVMOpsEnums.cpp.inc...
[1443/7717] Building NVVMOpsEnums.h.inc...
[1444/7717] Building RISCVTargetParserDef.inc...
FAILED: include/llvm/TargetParser/RISCVTargetParserDef.inc /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build/include/llvm/TargetParser/RISCVTargetParserDef.inc 
cd /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build && /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build/bin/llvm-min-tblgen -gen-riscv-target-def -I /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/ -I /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/include/llvm/TargetParser -I/home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build/include -I/home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/include /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o include/llvm/TargetParser/RISCVTargetParserDef.inc -d include/llvm/TargetParser/RISCVTargetParserDef.inc.d
Included from /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td:36:
Included from /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.td:2181:
/home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td:281:41: error: Variable not defined: 'simm13_lsb0'
                                        simm13_lsb0:$imm12),
                                        ^
[1445/7717] Building ROCDLOps.cpp.inc...
[1446/7717] Building SPIRVAvailability.cpp.inc...
[1447/7717] Building X86GenAsmWriter1.inc...
[1448/7717] Building X86GenAsmWriter.inc...
[1449/7717] Building X86GenExegesis.inc...
[1450/7717] Building X86GenRegisterBank.inc...
[1451/7717] Building X86GenCallingConv.inc...
[1452/7717] Building X86GenInstrMapping.inc...
[1453/7717] Building X86GenMnemonicTables.inc...
[1454/7717] Building X86GenFoldTables.inc...
[1455/7717] Building X86GenDisassemblerTables.inc...
[1456/7717] Building X86GenAsmMatcher.inc...
[1457/7717] Building X86GenFastISel.inc...
[1458/7717] Building X86GenGlobalISel.inc...
[1459/7717] Building X86GenSubtargetInfo.inc...
[1460/7717] Building X86GenDAGISel.inc...
[1461/7717] Building X86GenInstrInfo.inc...
[1462/7717] Building AMDGPUGenCallingConv.inc...
[1463/7717] Building AMDGPUGenMCPseudoLowering.inc...
[1464/7717] Building AMDGPUGenPostLegalizeGICombiner.inc...
[1465/7717] Building AMDGPUGenRegBankGICombiner.inc...
[1466/7717] Building AMDGPUGenMCCodeEmitter.inc...
[1467/7717] Building AMDGPUGenPreLegalizeGICombiner.inc...
[1468/7717] Building AMDGPUGenSubtargetInfo.inc...
[1469/7717] Building AMDGPUGenDisassemblerTables.inc...
[1470/7717] Building AMDGPUGenSearchableTables.inc...
[1471/7717] Building AMDGPUGenAsmWriter.inc...
[1472/7717] Building AMDGPUGenDAGISel.inc...
[1473/7717] Building AMDGPUGenAsmMatcher.inc...
[1474/7717] Building AMDGPUGenGlobalISel.inc...
[1475/7717] Building AMDGPUGenInstrInfo.inc...
[1476/7717] Building AMDGPUGenRegisterBank.inc...
Step 7 (build cmake config) failure: build cmake config (failure)
...
[1435/7717] Building NVVMOpsTypes.cpp.inc...
[1436/7717] Building NVVMOpsTypes.h.inc...
[1437/7717] Building NVVMConversions.inc...
[1438/7717] Building NVVMFromLLVMIRConversions.inc...
[1439/7717] Building NVVMConvertibleLLVMIRIntrinsics.inc...
[1440/7717] Building NVVMOpsAttributes.cpp.inc...
[1441/7717] Building NVVMOpsAttributes.h.inc...
[1442/7717] Building NVVMOpsEnums.cpp.inc...
[1443/7717] Building NVVMOpsEnums.h.inc...
[1444/7717] Building RISCVTargetParserDef.inc...
FAILED: include/llvm/TargetParser/RISCVTargetParserDef.inc /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build/include/llvm/TargetParser/RISCVTargetParserDef.inc 
cd /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build && /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build/bin/llvm-min-tblgen -gen-riscv-target-def -I /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/ -I /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/include/llvm/TargetParser -I/home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/build/include -I/home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/include /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o include/llvm/TargetParser/RISCVTargetParserDef.inc -d include/llvm/TargetParser/RISCVTargetParserDef.inc.d
Included from /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td:36:
Included from /home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.td:2181:
/home/botworker/bbot/amdgpu-offload-rhel-9-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td:281:41: error: Variable not defined: 'simm13_lsb0'
                                        simm13_lsb0:$imm12),
                                        ^
[1445/7717] Building ROCDLOps.cpp.inc...
[1446/7717] Building SPIRVAvailability.cpp.inc...
[1447/7717] Building X86GenAsmWriter1.inc...
[1448/7717] Building X86GenAsmWriter.inc...
[1449/7717] Building X86GenExegesis.inc...
[1450/7717] Building X86GenRegisterBank.inc...
[1451/7717] Building X86GenCallingConv.inc...
[1452/7717] Building X86GenInstrMapping.inc...
[1453/7717] Building X86GenMnemonicTables.inc...
[1454/7717] Building X86GenFoldTables.inc...
[1455/7717] Building X86GenDisassemblerTables.inc...
[1456/7717] Building X86GenAsmMatcher.inc...
[1457/7717] Building X86GenFastISel.inc...
[1458/7717] Building X86GenGlobalISel.inc...
[1459/7717] Building X86GenSubtargetInfo.inc...
[1460/7717] Building X86GenDAGISel.inc...
[1461/7717] Building X86GenInstrInfo.inc...
[1462/7717] Building AMDGPUGenCallingConv.inc...
[1463/7717] Building AMDGPUGenMCPseudoLowering.inc...
[1464/7717] Building AMDGPUGenPostLegalizeGICombiner.inc...
[1465/7717] Building AMDGPUGenRegBankGICombiner.inc...
[1466/7717] Building AMDGPUGenMCCodeEmitter.inc...
[1467/7717] Building AMDGPUGenPreLegalizeGICombiner.inc...
[1468/7717] Building AMDGPUGenSubtargetInfo.inc...
[1469/7717] Building AMDGPUGenDisassemblerTables.inc...
[1470/7717] Building AMDGPUGenSearchableTables.inc...
[1471/7717] Building AMDGPUGenAsmWriter.inc...
[1472/7717] Building AMDGPUGenDAGISel.inc...
[1473/7717] Building AMDGPUGenAsmMatcher.inc...
[1474/7717] Building AMDGPUGenGlobalISel.inc...
[1475/7717] Building AMDGPUGenInstrInfo.inc...
[1476/7717] Building AMDGPUGenRegisterBank.inc...

```

</details>

https://github.com/llvm/llvm-project/pull/132986

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