[llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)

[Phoebe Wang via llvm-commits]

================
@@ -43814,6 +43815,66 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
       }
       break;
     }
+    case X86ISD::VPERMV: {
+      SmallVector<int, 16> Mask;
+      SmallVector<SDValue, 2> Ops;
+      // TODO: Handle 128-bit PERMD/Q -> PSHUFD
+      if (Subtarget.hasVLX() &&
+          (VT.is512BitVector() || VT.getScalarSizeInBits() <= 16) &&
+          getTargetShuffleMask(Op, /*AllowSentinelZero=*/false, Ops, Mask)) {
+        // For lane-crossing shuffles, only split in half in case we're still
+        // referencing higher elements.
+        unsigned HalfElts = NumElts / 2;
+        unsigned HalfSize = SizeInBits / 2;
+        Mask.resize(HalfElts);
+        if (all_of(Mask,
+                   [&](int M) { return isUndefOrInRange(M, 0, HalfElts); })) {
----------------
phoebewang wrote:

Where did we check the upper elements are not demanded?

https://github.com/llvm/llvm-project/pull/133923