[llvm] [Reland][SCEV] teach isImpliedViaOperations about samesign (PR #133711)

[Yingwei Zheng via llvm-commits]

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@@ -11804,8 +11804,10 @@ bool ScalarEvolution::isImpliedCond(CmpPredicate Pred, const SCEV *LHS,
                                           MaxValue)) {
         const SCEV *TruncFoundLHS = getTruncateExpr(FoundLHS, NarrowType);
         const SCEV *TruncFoundRHS = getTruncateExpr(FoundRHS, NarrowType);
-        if (isImpliedCondBalancedTypes(Pred, LHS, RHS, FoundPred, TruncFoundLHS,
-                                       TruncFoundRHS, CtxI))
+        // We cannot preserve samesign after truncation.
+        if (isImpliedCondBalancedTypes(
+                Pred, LHS, RHS, static_cast<ICmpInst::Predicate>(FoundPred),
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dtcxzyw wrote:

I will fix it in a follow up patch.


https://github.com/llvm/llvm-project/pull/133711