[llvm] [AMDGPU] add s_bitset[10]_b32 optimization for shl+[or, andn2] pattern (PR #134155)
Juan Manuel Martinez CaamaƱo via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 3 06:22:00 PDT 2025
================
@@ -534,6 +535,56 @@ bool SIShrinkInstructions::shrinkScalarLogicOp(MachineInstr &MI) const {
MachineOperand *SrcReg = Src0;
MachineOperand *SrcImm = Src1;
+ // case 1:
+ // From:
+ // s_lshl_b32 s1, 1, s1
+ // s_or_b32 s0, s0, s1
+ // To:
+ // s_bitset1_b32 s0, s1
+ //
+ // case 2:
+ // s_lshl_b32 s1, 1, s1
+ // s_andn2_b32 s0, s0, s1
+ // To:
+ // s_bitset0_b32 s0, s1
+ if ((MI.getOpcode() == AMDGPU::S_OR_B32 ||
+ MI.getOpcode() == AMDGPU::S_ANDN2_B32) &&
----------------
jmmartinez wrote:
```suggestion
if ((Opc == AMDGPU::S_OR_B32 ||
Opc == AMDGPU::S_ANDN2_B32) &&
```
https://github.com/llvm/llvm-project/pull/134155
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