The Week Of Monday 26 December 2022 Archives by thread
Starting: Mon Dec 26 00:05:22 PST 2022
Ending: Sun Jan 1 22:18:21 PST 2023
Messages: 796
- [PATCH] D139832: [IndVars] Support AND in optimizeLoopExitWithUnknownExitCount
Max Kazantsev via Phabricator via llvm-commits
- [llvm] df8cedf - [IndVars][NFC] Factor out condition creation in optimizeLoopExitWithUnknownExitCount
Max Kazantsev via llvm-commits
- [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative
Anton Sidorenko via Phabricator via llvm-commits
- [PATCH] D140359: [ItaniumDemangle] Fix substitution failure of _BitInt
Senran Zhang via Phabricator via llvm-commits
- [llvm] 5f24f89 - [Test] Update inverse test for turn-to-invariant to what they meant to be
Max Kazantsev via llvm-commits
- [PATCH] D139723: [OpenMP][AMDGPU] Enable use of abs labs and llabs math functions in C code
Michał Górny via Phabricator via llvm-commits
- [PATCH] D137495: [LoongArch] Add GHC Calling Convention
Lin Runze via Phabricator via llvm-commits
- [PATCH] D140263: [NFC] Vastly simplifies TypeSize
Guillaume Chatelet via Phabricator via llvm-commits
- [PATCH] D135017: [LV] Move exit cond simplification to separate transform.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative
Hsiangkai Wang via Phabricator via llvm-commits
- [llvm] 389079c - [LoongArch] Add GHC Calling Convention
Weining Lu via llvm-commits
- [PATCH] D140669: [RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D140670: [LoongArch][test] Regenerate checks for the ghc-cc.ll test case
WÁNG Xuěruì via Phabricator via llvm-commits
- [llvm] 77fad4c - [LoongArch][test] Regenerate checks for the ghc-cc.ll test case
Weining Lu via llvm-commits
- [llvm] 8c618e8 - [Xtensa 1/10] Recognize Xtensa in triple parsing code
via llvm-commits
- [llvm] 310f765 - [Xtensa 2/10] Add Xtensa ELF definitions
via llvm-commits
- [llvm] 52804a7 - [Xtensa 3/10] Add initial version of the Xtensa backend
via llvm-commits
- [llvm] 8a65520 - [Xtensa 4/10] Add basic *td files with Xtensa architecture description
via llvm-commits
- [llvm] 6017209 - [Xtensa 5/10] Add Xtensa MCTargetDescr initial functionality
via llvm-commits
- [llvm] 52ecf02 - [Xtensa 6/10] Add Xtensa basic assembler parser
via llvm-commits
- [llvm] 2758a01 - [Xtensa 7/10] Add Xtensa instruction printer
via llvm-commits
- [llvm] 4e0c1d9 - [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions
via llvm-commits
- [llvm] 71199af - [Xtensa 9/10] Add basic support of Xtensa disassembler
via llvm-commits
- [llvm] ff25800 - [Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions
via llvm-commits
- [PATCH] D64826: [Xtensa 1/10] Recognize Xtensa in triple parsing code.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64827: [Xtensa 2/10] Add Xtensa ELF definitions.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64829: [Xtensa 3/10] Add initial version of the Xtensa backend.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64830: [Xtensa 4/10] Add basic *td files with Xtensa architecture description.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64831: [Xtensa 5/10] Add Xtensa MCTargetDescr initial functionality.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64832: [Xtensa 6/10] Add Xtensa basic assembler parser.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64833: [Xtensa 7/10] Add Xtensa instruction printer.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64834: [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64835: [Xtensa 9/10] Add basic support of Xtensa disassembler.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D64836: [Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions.
Stefan Stipanovic via Phabricator via llvm-commits
- [PATCH] D140665: [RISCV] Add DAG combine to fold (shl nuw (aextload), C) -> (shl nuw (zextload), C).
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D138837: [ScheduleDAG] Support REQ_SEQUENCE unscheduling
Filipp Zhinkin via Phabricator via llvm-commits
- [PATCH] D140672: [TwoAddressInstruction] Contrain RegClass when processing a statepoint
Danila Malyutin via Phabricator via llvm-commits
- [PATCH] D140627: [orc] Pass big JITTargetMachineBuilder parameters by reference to avoid unnecessary copies
Feng Zou via Phabricator via llvm-commits
- [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.
Ayal Zaks via Phabricator via llvm-commits
- [PATCH] D140658: [AMDGPU] Enable IAS in the AMDGPU backend
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D140500: [VPlan] Move GraphTraits definitions to separate header (NFC).
Ayal Zaks via Phabricator via llvm-commits
- [llvm] 821a595 - [TwoAddressInstruction] Constrain RegClass when processing a statepoint
Danila Malyutin via llvm-commits
- [llvm] 60359f5 - Revert "[IPSCCP] Enable specialization of functions."
Florian Hahn via llvm-commits
- [llvm] 47df55f - [gn] Don't include RISCV in targets build for 'all'
Alex Bradbury via llvm-commits
- [PATCH] D140210: [IPSCCP] Enable specialization of functions.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D140208: [AMDGPU] Improved wide multiplies
Jessica Del via Phabricator via llvm-commits
- [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions
Ayke via Phabricator via llvm-commits
- [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum
Alexandre Ganea via Phabricator via llvm-commits
- [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE
Alexandre Ganea via Phabricator via llvm-commits
- [llvm] 00c7840 - [InstCombine] replace undef in vector tests with poison; NFC
Sanjay Patel via llvm-commits
- [llvm] a0c8017 - [InstCombine] do not add "nuw" to 1<<X if the "1" has undefined elements
Sanjay Patel via llvm-commits
- [llvm] bb778cf - Commit changes to the Code of Conduct that make it more clear regarding behavior outside of LLVM spaces that impact the safety of our community members. Discussion may be found here: https://discourse.llvm.org/t/code-of-conduct-changes-related-to-llvm-project-policy-changes/64197
via llvm-commits
- [llvm] 46458aa - [NFC][AArch64] Add a few vector shuffle tests that should be `zip1`
Roman Lebedev via llvm-commits
- [llvm] 62fc5f1 - [DAGCombiner] Add a most basic `combineShuffleToZeroExtendVectorInReg()`
Roman Lebedev via llvm-commits
- [llvm] 83288f8 - [AArch64] Custom lower `ISD::ZERO_EXTEND_VECTOR_INREG`
Roman Lebedev via llvm-commits
- [llvm] e26e7ed - [DAG] `combineShuffleToZeroExtendVectorInReg()`: try to match w/ commuted operands
Roman Lebedev via llvm-commits
- [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D140674: [RISCV] Prefer ADDI over ORI if the known bits are disjoint.
Craig Topper via Phabricator via llvm-commits
- [llvm] cc051b0 - [NFC][X86] Add some tests that can be matched as ZERO_EXTEND_VECTOR_INREG
Roman Lebedev via llvm-commits
- [llvm] c4f815d - [DAGCombine] `combineShuffleToZeroExtendVectorInReg()`: widen shuffle elements before trying to match
Roman Lebedev via llvm-commits
- [llvm] 36d70a6 - [VPlan] Remove redundant blocks by merging them into predecessors.
Florian Hahn via llvm-commits
- [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.
Ayke via Phabricator via llvm-commits
- [PATCH] D139907: [FuzzMutate] RandomIRBuilder has more source and sink type now.
Peter Rong via Phabricator via llvm-commits
- [PATCH] D140676: [AArch64] `LowerZERO_EXTEND_VECTOR_INREG()`: recursively apply `zip1` until done
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D140677: [AArch64][DAG] `canCombineShuffleToExtendVectorInreg()`: allow illegal types before legalization
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.
Liao Chunyu via Phabricator via llvm-commits
- [PATCH] D140528: [msan] Add msan support for loongarch64
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D140679: [MC] [llvm-ml] Add support for the extrn keyword
Mike Hommey via Phabricator via llvm-commits
- [PATCH] D140059: [APSInt] Fix bug in APSInt mentioned in https://github.com/llvm/llvm-project/issues/59515
Peter Rong via Phabricator via llvm-commits
- [llvm] ba2bb63 - [Test] Add tests with logical AND/OR
Max Kazantsev via llvm-commits
- [PATCH] D138696: [PowerPC] Exploit test data class instruction for isinf/iszero
Qiu Chaofan via Phabricator via llvm-commits
- [PATCH] D139832: [IndVars] Support AND/OR in optimizeLoopExitWithUnknownExitCount
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D140680: [AArch64][MachineScheduler] Set no side effect for movprfx
Allen zhong via Phabricator via llvm-commits
- [PATCH] D140666: [InstCombine] combine intersection for inequality icmps
Yingchi Long via Phabricator via llvm-commits
- [PATCH] D139934: [IndVars] Apply more optimistic SkipLastIter for AND conditions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D140682: [PowerPC][NFC] add test case for ShouldTrackLaneMasks
Ting Wang via Phabricator via llvm-commits
- [PATCH] D139934: [IndVars] Apply more optimistic SkipLastIter for AND/OR conditions
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D140683: [PowerPC] enable Policy.ShouldTrackLaneMasks
Ting Wang via Phabricator via llvm-commits
- [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded
Vincent Lee via Phabricator via llvm-commits
- [llvm] d9ab3e8 - [clang] Use a StringRef instead of a raw char pointer to store builtin and call information
via llvm-commits
- [PATCH] D139881: [clang] Use a StringRef instead of a raw char pointer to store builtin and call information
serge via Phabricator via llvm-commits
- [PATCH] D140685: [LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions
Xiaodong Liu via Phabricator via llvm-commits
- [PATCH] D136817: [RISCV] Add H extension
Kito Cheng via Phabricator via llvm-commits
- [llvm] f5e0391 - [InferFunctionAttrs] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 36df3fd - [Internalize] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 7e5e4d6 - [LCSSA] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 3718844 - [InterleavedAccess] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 282c1e3 - [Tests] Rename InstMerge -> MergedLoadStoreMotion (NFC)
Nikita Popov via llvm-commits
- [llvm] 9845969 - [MergedLoadStoreMotion] Add tests for store without GEPs (NFC)
Nikita Popov via llvm-commits
- [llvm] 2c15b9d - [MergeLoadStoreMotion] Don't require GEP for sinking
Nikita Popov via llvm-commits
- [llvm] fb435e1 - [MergedLoadStoreMotion] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 8bf3116 - Revert "[MergeLoadStoreMotion] Don't require GEP for sinking"
Nikita Popov via llvm-commits
- [llvm] 81fa9ac - [GVNHoist] Make test more robust (NFC)
Nikita Popov via llvm-commits
- [PATCH] D140689: [llvm][dfsan] Enable loongarch64 and add `zeroext` attribute
Youling Tang via Phabricator via llvm-commits
- [llvm] cb03470 - Reapply [MergeLoadStoreMotion] Don't require GEP for sinking
Nikita Popov via llvm-commits
- [PATCH] D133311: [Assignment Tracking][16/*] Account for assignment tracking in mldst-motion
Nikita Popov via Phabricator via llvm-commits
- [llvm] dfc4a95 - [LoopBoundSplit] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] ba1759c - [LoadStoreVectorizer] Convert some tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 314d0db - [LoadStoreVectorize] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [llvm] 0d18d36 - [LoadStoreVectorizer] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 43b26b4 - Reapply [MergedLoadStoreMotion] Convert tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [PATCH] D140382: [CodeGen] Add user interface for DetectDeadLanes
Piyou Chen via Phabricator via llvm-commits
- [PATCH] D140638: [Codegen][LegalizeIntegerTypes] New legalization strategy for scalar shifts: shift through stack
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D140692: [RISCV] Add Svbmpt extension support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D140271: [NFCI][llvm-exegesis] Benchmark: parallelize codegen (5x ... 8x less wallclock)
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D139858: [SCEVExpander] Increase "cheap" expansion budget for loop invariants, but not loop exit values
Roman Lebedev via Phabricator via llvm-commits
- [llvm] a9b052e - [SLP]Fix PR59693: Do not crash trying to set insert point for buildvector
Alexey Bataev via llvm-commits
- [PATCH] D140647: Handle simple diamond CFG hoisting in DivRemPairs.
Nikita Popov via Phabricator via llvm-commits
- [llvm] 86ed0da - [RS4GC] Rematerialize derived pointers before uses.
Denis Antrushin via llvm-commits
- [PATCH] D138912: [RS4GC] Rematerialize derived pointers before uses.
Denis Antrushin via Phabricator via llvm-commits
- [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca
Jonas Hahnfeld via Phabricator via llvm-commits
- [PATCH] D138637: [InstCombine] Combine opaque pointer single index GEP and with src GEP which has result of array type
Nikita Popov via Phabricator via llvm-commits
- [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst
David Blaikie via Phabricator via llvm-commits
- [llvm] 66cea84 - [InstCombine] Convert some tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] cd9e2ba - Revert "[InstCombine] Convert some tests to opaque pointers (NFC)"
Nikita Popov via llvm-commits
- [llvm] 4b04c30 - [InstCombine] Regenerate test checks (NFC)
Nikita Popov via llvm-commits
- [PATCH] D139758: [LV] Cleanup widening of Phi instructions. NFC.
Michael Maitland via Phabricator via llvm-commits
- [PATCH] D140246: [LV] Remove duplicate name set of vector header basic block. NFC
Michael Maitland via Phabricator via llvm-commits
- [llvm] c93e7de - [InstCombine] Convert some tests to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [llvm] 51f2f59 - [InstCombine] Convert test to opaque pointers (NFC)
Nikita Popov via llvm-commits
- [PATCH] D140529: [RISCV][NFC] Move RISCVISAInfo back to Support
Sam Elliott via Phabricator via llvm-commits
- [PATCH] D140649: [AArch64][SelectionDAG] Eliminates redundant zero-extension for 32-bit popcount
Allen zhong via Phabricator via llvm-commits
- [PATCH] D140655: [LowerTypeTests] Add ENDBR to .cfi.jumptable for x86 Indirect Branch Tracking
Teresa Johnson via Phabricator via llvm-commits
- [llvm] f7bc8e0 - [InstCombine] Remove redundant evaluateGEPOffsetExpression() fold (NFCI)
Nikita Popov via llvm-commits
- [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`
Jamie Hill-Daniel via Phabricator via llvm-commits
- [PATCH] D140698: [LoopUnroll] Be more permissive to high-cost loop trip count SCEV's
Roman Lebedev via Phabricator via llvm-commits
- [llvm] c69d839 - [AArch64][MachineScheduler] Set no side effect for movprfx
via llvm-commits
- [PATCH] D140699: [clang] Make ValuesCode initialisation of Options constexpr
serge via Phabricator via llvm-commits
- [PATCH] D139788: [LV] Sink scalar operands and merge regions repeatedly.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D140700: [NFC][exegesis] By default, don't dump objects to disk
Roman Lebedev via Phabricator via llvm-commits
- [llvm] e91e62d - [LV] Sink scalar operands and merge regions repeatedly.
Florian Hahn via llvm-commits
- [PATCH] D132646: [LLVM][TableGen] Support combined cells in jupyter kernel
Jacques Pienaar via Phabricator via llvm-commits
- [PATCH] D140702: [exegesis] "Skip codegen" dry-run mode
Roman Lebedev via Phabricator via llvm-commits
- [PATCH] D140704: [NVPTX] Replace PTX's ManagedStringPool with StringSaver
Luke Drummond via Phabricator via llvm-commits
- [PATCH] D138368: [MLGO] Add LoopPropertiesAnalysis pass
Johannes Doerfert via Phabricator via llvm-commits
- [PATCH] D134982: [X86] Add support for "light" AVX
Ilya Tokar via Phabricator via llvm-commits
- [llvm] fe5cf48 - Reland "[AArch64] FMV support and necessary target features dependencies."
Pavel Iliin via llvm-commits
- [PATCH] D138246: [AsmPrinter] Fix Crash when Emitting Global Constant of small bit width when targeting Big Endian arch
Henry Yu via Phabricator via llvm-commits
- [PATCH] D138760: BLAKE3: do not try to use neon on big-endian aarch64
Håvard Eidnes via Phabricator via llvm-commits
- [llvm] f5c766b - [LV] Convert a few tests to use opaque pointers (NFC).
Florian Hahn via llvm-commits
- [PATCH] D140708: [AMDGPU][GFX908] Only consider explicit defs of src reg in indirect agpr copy
Jeffrey Byrnes via Phabricator via llvm-commits
- [llvm] 71ed890 - [IVUsers] Precommit test for zext SCEV invalidation issue.
Florian Hahn via llvm-commits
- [PATCH] D140710: [draft] CVP: expand bound URems
Roman Lebedev via Phabricator via llvm-commits
- [llvm] f27c490 - MC: Add .data. and .rodata. prefixes to MCContext section classification
Yonghong Song via llvm-commits
- [PATCH] D138477: MC: Add .data. and .rodata. prefixes to MCContext section classification
Yonghong Song via Phabricator via llvm-commits
- [llvm] a564048 - [SCEV] Properly clean up duplicated FoldCacheUser ID entries.
Florian Hahn via llvm-commits
- [PATCH] D137505: [SCEV] Cache ZExt SCEV expressions.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D140368: [lldb] Consider all breakpoints in breakpoint detection
Pavel Kosov via Phabricator via llvm-commits
- [llvm] 396b0b2 - [LV] Remove duplicate name set of vector header basic block. NFC
Michael Maitland via llvm-commits
- [PATCH] D140692: [RISCV] Add Svpbmt extension support.
Yeting Kuo via Phabricator via llvm-commits
- [PATCH] D139301: [X86] Add scheduling info of CodeGenOnly but encodable instructions for AlderlakeP model
Haohai, Wen via Phabricator via llvm-commits
- [PATCH] D140715: [AAPointerInfo] Remove redundant check
Shilei Tian via Phabricator via llvm-commits
- [PATCH] D140716: [RISCV][NFC] Remove redundant setOperationAction.
Hsiangkai Wang via Phabricator via llvm-commits
- [llvm] 5922d36 - [MC][BPF] Add bpf guard for MC test data-section-prefix.ll
Yonghong Song via llvm-commits
- [PATCH] D140689: [DFSan] Add `zeroext` attribute for callbacks with 8bit shadow variable arguments
Youling Tang via Phabricator via llvm-commits
- [llvm] 0ad57bf - [PowerPC] Enable track-subreg-liveness by default
Qiu Chaofan via llvm-commits
- [PATCH] D108902: [PowerPC] Enable track-subreg-liveness by default
Qiu Chaofan via Phabricator via llvm-commits
- [llvm] d006808 - Fix failure of ldst-16-byte.mir
Qiu Chaofan via llvm-commits
- [PATCH] D140717: [RISCV] Fix typos in RISCVUsage.rst
Jie Fu via Phabricator via llvm-commits
- [PATCH] D139598: [InstCombine] Fold (X << Z) / (X * Y) -> (1 << Z) / Y
Chenbing.Zheng via Phabricator via llvm-commits
- [PATCH] D137838: [Support] Move TargetParsers to new component
Zixuan Wu via Phabricator via llvm-commits
- [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain
Kai Luo via Phabricator via llvm-commits
- [llvm] 00926c3 - [RISCV] Fix typos in RISCVUsage.rst
Kito Cheng via llvm-commits
- [PATCH] D140100: [SLP]Integrate looking through shuffles logic into ShuffleInstructionBuilder.
Asmaa via Phabricator via llvm-commits
- [llvm] 740cb33 - [RISCV][NFC] Remove redundant setOperationAction.
Hsiangkai Wang via llvm-commits
- [PATCH] D140499: [SLP]Use ShuffleInstructionBuilder for vector shrinking.
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D140725: [XRay] Emit absolute address for versions less than 2
Lu Weining via Phabricator via llvm-commits
- [PATCH] D132208: [LoopIntWrapPredication] Loop Integer Wrapping Predication Pass
Sergei Kachkov via Phabricator via llvm-commits
- [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries
David Blaikie via Phabricator via llvm-commits
- [llvm] 498704d - [NFC][exegesis] By default, don't dump objects to disk
Roman Lebedev via llvm-commits
- [PATCH] D140727: [XRay] Add initial support for loongarch64
Lu Weining via Phabricator via llvm-commits
- [llvm] ac01ae7 - [SLP]Use ShuffleInstructionBuilder for vector shrinking.
Alexey Bataev via llvm-commits
- [PATCH] D140498: [SLP]Fix cost of the broadcast buildvector/gather.
Alexey Bataev via Phabricator via llvm-commits
- [PATCH] D132455: [ADT] add ConcurrentHashtable class.
David Blaikie via Phabricator via llvm-commits
- [llvm] 862e35e - [InstCombine] preserve signbit semantics of NAN with fold to fabs
Sanjay Patel via llvm-commits
- [PATCH] D127812: [AArch64] FMV support and necessary target features dependencies.
Mariusz Ceier via Phabricator via llvm-commits
- [PATCH] D138470: [bazel] Restore libpfm as a conditional dependency for exegesis.
Jordan Rupprecht via Phabricator via llvm-commits
- [PATCH] D104268: [ptr_provenance] Introduce optional ptr_provenance operand to load/store
Ralf via Phabricator via llvm-commits
- [PATCH] D140505: [BPF] Use SectionForGlobal() for section names computation in BTF
Yonghong Song via Phabricator via llvm-commits
- [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count
Noah Goldstein via Phabricator via llvm-commits
- [llvm] 88e85aa - Handle simple diamond CFG hoisting in DivRemPairs.
Owen Anderson via llvm-commits
- [PATCH] D140635: Enabled DFAJumpThreading by Default
YangguangLi via Phabricator via llvm-commits
- [PATCH] D140238: [NVPTX] Emit .noreturn directive
Andrew Savonichev via Phabricator via llvm-commits
- [llvm] fa023e0 - [NVPTX] Emit .noreturn directive
Andrew Savonichev via llvm-commits
- [lld] 6b9a80d - [lld] Fix iwyu problems after 83d59e05b201760e3f364ff6316301d347cbad95
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- [llvm] 902614d - [docs] TestingGuide.rst: Fix incorrect description
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Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D140833: [MLIR][Tosa] Make Tosa_IntArrayAttr5, Tosa_IntArrayAttr6 use DenseI64ArrayAttr
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D140571: [AVR] Optimize 32-bit shifts: shift by 4 bits
Ayke via Phabricator via llvm-commits
- [PATCH] D140572: [AVR] Optimize 32-bit shifts: reverse shift + move
Ayke via Phabricator via llvm-commits
- [PATCH] D140834: [MLIR][TOSA] Make Tosa_IntArrayAttrUptoN use DenseI64ArrayAttr
Alexander Shaposhnikov via Phabricator via llvm-commits
- [PATCH] D140796: [ValueTracking] Improve ComputeNumSignBits to handle Trunc
Owen Anderson via Phabricator via llvm-commits
- [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5
Alan via Phabricator via llvm-commits
- [PATCH] D140836: Do not short circuit hoistIVInc when recomputation of poison flags is needed.
Owen Anderson via Phabricator via llvm-commits
- [llvm] 3100021 - [JITLink][RISCV] Fix incorrectly use of uint32_t
via llvm-commits
- [PATCH] D140837: [AAPointerInfo] fix assertion at the pass-through use of a pointer
Sameer Sahasrabuddhe via Phabricator via llvm-commits
Last message date:
Sun Jan 1 22:18:21 PST 2023
Archived on: Sun Jan 1 22:18:23 PST 2023
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