[PATCH] D140802: [JITLink][RISCV] Order EdgeKind_riscv the same way as relocations
luxufan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 1 21:56:32 PST 2023
StephenFan added a comment.
LGTM. Thanks!
================
Comment at: llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp:335
.getValue();
- *(little64_t *)FixupPtr = static_cast<uint64_t>(Value);
+ *(little16_t *)FixupPtr = static_cast<uint32_t>(Value);
break;
----------------
The use of uint32_t is incorrect. I have fixed it in https://reviews.llvm.org/rG31000211e0113ae76594ca2c0ac1c225bd461a73.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D140802/new/
https://reviews.llvm.org/D140802
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