[llvm] 603e849 - [NFC][TLI] Move `isLoadBitCastBeneficial()` implementation into source file
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Fri Dec 30 15:08:53 PST 2022
Author: Roman Lebedev
Date: 2022-12-31T02:07:50+03:00
New Revision: 603e8490729e477680f0bc8284e136ceeb66e7f4
URL: https://github.com/llvm/llvm-project/commit/603e8490729e477680f0bc8284e136ceeb66e7f4
DIFF: https://github.com/llvm/llvm-project/commit/603e8490729e477680f0bc8284e136ceeb66e7f4.diff
LOG: [NFC][TLI] Move `isLoadBitCastBeneficial()` implementation into source file
... so any change to it does not cause 700 source files to be recompiled.
Added:
Modified:
llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/TargetLoweringBase.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h
index 419148c09b2fe..438b60b48caef 100644
--- a/llvm/include/llvm/CodeGen/TargetLowering.h
+++ b/llvm/include/llvm/CodeGen/TargetLowering.h
@@ -573,24 +573,7 @@ class TargetLoweringBase {
/// dag combiner.
virtual bool isLoadBitCastBeneficial(EVT LoadVT, EVT BitcastVT,
const SelectionDAG &DAG,
- const MachineMemOperand &MMO) const {
- // Don't do if we could do an indexed load on the original type, but not on
- // the new one.
- if (!LoadVT.isSimple() || !BitcastVT.isSimple())
- return true;
-
- MVT LoadMVT = LoadVT.getSimpleVT();
-
- // Don't bother doing this if it's just going to be promoted again later, as
- // doing so might interfere with other combines.
- if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
- getTypeToPromoteTo(ISD::LOAD, LoadMVT) == BitcastVT.getSimpleVT())
- return false;
-
- unsigned Fast = 0;
- return allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), BitcastVT,
- MMO, &Fast) && Fast;
- }
+ const MachineMemOperand &MMO) const;
/// Return true if the following transform is beneficial:
/// (store (y (conv x)), y*)) -> (store x, (x*))
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index fba60c8d3ff67..37eb96ea9aa56 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -2214,6 +2214,28 @@ int TargetLoweringBase::getDivRefinementSteps(EVT VT,
return getOpRefinementSteps(false, VT, getRecipEstimateForFunc(MF));
}
+bool TargetLoweringBase::isLoadBitCastBeneficial(
+ EVT LoadVT, EVT BitcastVT, const SelectionDAG &DAG,
+ const MachineMemOperand &MMO) const {
+ // Don't do if we could do an indexed load on the original type, but not on
+ // the new one.
+ if (!LoadVT.isSimple() || !BitcastVT.isSimple())
+ return true;
+
+ MVT LoadMVT = LoadVT.getSimpleVT();
+
+ // Don't bother doing this if it's just going to be promoted again later, as
+ // doing so might interfere with other combines.
+ if (getOperationAction(ISD::LOAD, LoadMVT) == Promote &&
+ getTypeToPromoteTo(ISD::LOAD, LoadMVT) == BitcastVT.getSimpleVT())
+ return false;
+
+ unsigned Fast = 0;
+ return allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), BitcastVT,
+ MMO, &Fast) &&
+ Fast;
+}
+
void TargetLoweringBase::finalizeLowering(MachineFunction &MF) const {
MF.getRegInfo().freezeReservedRegs(MF);
}
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