[PATCH] D140822: [AVR] Add support for lrint and lround intrinsics

[Ayke via Phabricator via llvm-commits]

aykevl created this revision.
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Integer legalization already supported splitting the output integer of
llround and llrint, but did not support this for lround and lrint yet.
This is not a problem for 32-bit architectures, but for 8/16-bit
architectures like AVR this results in a crash like this:

  ExpandIntegerResult #0: t7: i32 = lround t6
  
  LLVM ERROR: Do not know how to expand the result of this operator!

This patch simply add lrint/lround to the list of ISD opcodes to expand.

Fixes https://github.com/llvm/llvm-project/issues/59573.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D140822

Files:
  llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
  llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
  llvm/test/CodeGen/AVR/llrint.ll
  llvm/test/CodeGen/AVR/llround-conv.ll
  llvm/test/CodeGen/AVR/lrint.ll
  llvm/test/CodeGen/AVR/lround-conv.ll

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