[PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

Can you update the exhaustive test too so we know this is actually correct?



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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:6025
+  unsigned LeadingZeros = 0;
+  if (!VT.isVector() && isa<ConstantSDNode>(N1)) {
+    LeadingZeros = DAG.computeKnownBits(N0).countMinLeadingZeros();
----------------
Why not vectors?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D140750/new/

https://reviews.llvm.org/D140750