The Week Of Monday 26 December 2022 Archives by author

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Starting: Mon Dec 26 00:05:22 PST 2022
Ending: Sun Jan 1 22:18:21 PST 2023
Messages: 796

• [PATCH] D139301: [X86] Add scheduling info of CodeGenOnly but encodable instructions for AlderlakeP model   Haohai, Wen via Phabricator via llvm-commits
• [PATCH] D136400: [llvm-ocaml] Migrate from naked pointers to prepare for OCaml 5   Alan via Phabricator via llvm-commits
• [llvm] 47df55f - [gn] Don't include RISCV in targets build for 'all'   Alex Bradbury via llvm-commits
• [llvm] 47df55f - [gn] Don't include RISCV in targets build for 'all'   Alex Bradbury via llvm-commits
• [PATCH] D140748: [MLIR][Tosa] Make Tosa_IntArrayAttr2 use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140748: [MLIR][Tosa] Make Tosa_IntArrayAttr2 use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140748: [MLIR][Tosa] Make Tosa_IntArrayAttr2 use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140748: [MLIR][Tosa] Make Tosa_IntArrayAttr2 use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140829: [MLIR][Tosa] Make Tosa_IntArrayAttr3 use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140832: [MLIR][Tosa] Make Tosa_IntArrayAttr4 use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140833: [MLIR][Tosa] Make Tosa_IntArrayAttr5, Tosa_IntArrayAttr6 use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140834: [MLIR][TOSA] Make Tosa_IntArrayAttrUptoN use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140834: [MLIR][TOSA] Make Tosa_IntArrayAttrUptoN use DenseI64ArrayAttr   Alexander Shaposhnikov via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Alexandre Ganea via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Alexandre Ganea via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Alexandre Ganea via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Alexandre Ganea via Phabricator via llvm-commits
• [llvm] a9b052e - [SLP]Fix PR59693: Do not crash trying to set insert point for buildvector   Alexey Bataev via llvm-commits
• [llvm] ac01ae7 - [SLP]Use ShuffleInstructionBuilder for vector shrinking.   Alexey Bataev via llvm-commits
• [llvm] 5dccea5 - [SLP]Do not emit many extractelements, reuse the single one emitted.   Alexey Bataev via llvm-commits
• [PATCH] D140499: [SLP]Use ShuffleInstructionBuilder for vector shrinking.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D140498: [SLP]Fix cost of the broadcast buildvector/gather.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D140580: [SLP]Do not emit many extractelements, reuse the single one emitted.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D140498: [SLP]Fix cost of the broadcast buildvector/gather.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D140785: [NFC] Test case intended to cover SLP cost for chain with masked gather loads.   Alexey Bataev via Phabricator via llvm-commits
• [PATCH] D132455: [ADT] add ConcurrentHashtable class.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D132548: [WIP][ADT] Utility for comparision of hashtables implementation.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D132455: [ADT] add ConcurrentHashtable class.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D132455: [ADT] add ConcurrentHashtable class.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140787: [DWARF][dsymutil][llvm-dwarfutil] Create a placeholder library DWARFLinkerNext   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140788: [DWARFLinkerNext] add AddressesMap interface.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140791: [DWARFLinkerNext] Add simple list with thread safe insertions.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140788: [DWARFLinkerNext] add AddressesMap interface.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140788: [DWARFLinkerNext] add AddressesMap interface.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140791: [DWARFLinkerNext] Add simple list with thread safe insertions.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140791: [DWARFLinkerNext] Add simple list with thread safe insertions.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140788: [DWARFLinkerNext] add AddressesMap interface.   Alexey Lapshin via Phabricator via llvm-commits
• [PATCH] D140680: [AArch64][MachineScheduler] Set no side effect for movprfx   Allen zhong via Phabricator via llvm-commits
• [PATCH] D140680: [AArch64][MachineScheduler] Set no side effect for movprfx   Allen zhong via Phabricator via llvm-commits
• [PATCH] D140680: [AArch64][MachineScheduler] Set no side effect for movprfx   Allen zhong via Phabricator via llvm-commits
• [PATCH] D140649: [AArch64][SelectionDAG] Eliminates redundant zero-extension for 32-bit popcount   Allen zhong via Phabricator via llvm-commits
• [PATCH] D140680: [AArch64][MachineScheduler] Set no side effect for movprfx   Allen zhong via Phabricator via llvm-commits
• [PATCH] D138477: MC: Add .data. and .rodata. prefixes to MCContext section classification   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D139796: [BOLT][NFC] Use std::optional in BAT   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D140435: [BOLT] Respect -function-order in lite mode   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D140457: [BOLT] Process fragment siblings in lite mode, keep lite mode on   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D138477: MC: Add .data. and .rodata. prefixes to MCContext section classification   Amir Ayupov via Phabricator via llvm-commits
• [PATCH] D64834: [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions.   Andrei Safronov via Phabricator via llvm-commits
• [PATCH] D64834: [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions.   Andrei Safronov via Phabricator via llvm-commits
• [llvm] fa023e0 - [NVPTX] Emit .noreturn directive   Andrew Savonichev via llvm-commits
• [PATCH] D140238: [NVPTX] Emit .noreturn directive   Andrew Savonichev via Phabricator via llvm-commits
• [PATCH] D140704: [NVPTX] Replace PTX's ManagedStringPool with StringSaver   Andrew Savonichev via Phabricator via llvm-commits
• [PATCH] D140689: [llvm][dfsan] Enable loongarch64 and add `zeroext` attribute   Andrew via Phabricator via llvm-commits
• [PATCH] D140770: [dfsan] Support AArch64   Andrew via Phabricator via llvm-commits
• [PATCH] D140790: [BranchRelaxation] Prevent analyzing indirectBr during uncondBr fixup   Anshil Gandhi via Phabricator via llvm-commits
• [PATCH] D140790: [BranchRelaxation] Prevent analyzing indirectBr during uncondBr fixup   Anshil Gandhi via Phabricator via llvm-commits
• [PATCH] D140790: [BranchRelaxation] Prevent analyzing indirectBr during uncondBr fixup   Anshil Gandhi via Phabricator via llvm-commits
• [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Anton Sidorenko via Phabricator via llvm-commits
• [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Anton Sidorenko via Phabricator via llvm-commits
• [PATCH] D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative   Anton Sidorenko via Phabricator via llvm-commits
• [PATCH] D140100: [SLP]Integrate looking through shuffles logic into ShuffleInstructionBuilder.   Asmaa via Phabricator via llvm-commits
• [PATCH] D135017: [LV] Move exit cond simplification to separate transform.   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D140500: [VPlan] Move GraphTraits definitions to separate header (NFC).   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D139788: [LV] Sink scalar operands and merge regions repeatedly.   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D139790: [VPlan] Consider all recipes in replicate blocks as sink candidates.   Ayal Zaks via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ayke via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D140815: [AVR] Fix incorrect decoding of RJMP and RCALL   Ayke via Phabricator via llvm-commits
• [PATCH] D140822: [AVR] Add support for lrint and lround intrinsics   Ayke via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ayke via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around   Ayke via Phabricator via llvm-commits
• [PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around   Ayke via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ayke via Phabricator via llvm-commits
• [PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around   Ayke via Phabricator via llvm-commits
• [PATCH] D140830: [AVR] correctly declare __do_copy_data and __do_clear_bss   Ayke via Phabricator via llvm-commits
• [PATCH] D140830: [AVR] correctly declare __do_copy_data and __do_clear_bss   Ayke via Phabricator via llvm-commits
• [PATCH] D140571: [AVR] Optimize 32-bit shifts: shift by 4 bits   Ayke via Phabricator via llvm-commits
• [PATCH] D140572: [AVR] Optimize 32-bit shifts: reverse shift + move   Ayke via Phabricator via llvm-commits
• [lld] b20dd2b - [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices   Ben Shi via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140815: [AVR] Fix incorrect decoding of RJMP and RCALL.   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140816: [AVR] Fix incorrect decoding of conditional branch instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140816: [AVR] Fix incorrect decoding of conditional branch instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140815: [AVR] Fix incorrect decoding of RJMP and RCALL   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140816: [AVR] Fix incorrect decoding of conditional branch instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140815: [AVR] Fix incorrect decoding of RJMP and RCALL   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140815: [AVR] Fix incorrect decoding of RJMP and RCALL   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140816: [AVR] Fix incorrect decoding of conditional branch instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140777: [AVR] Fix some ambiguous cases in AsmParser   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140570: [AVR] Optimize 32-bit shift: move bytes around   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Ben Shi via Phabricator via llvm-commits
• [PATCH] D140822: [AVR] Add support for lrint and lround intrinsics   Ben Shi via Phabricator via llvm-commits
• [llvm] a3d58bb - Detemplate llvm::EmitGEPOffset and move it into a cpp file. NFC.   Benjamin Kramer via llvm-commits
• [llvm] 07e7168 - [AArch64] Stringref'ize AArch64Subtarget constructor. NFCI   Benjamin Kramer via llvm-commits
• [PATCH] D140657: [Clang] Move AMDGPU IAS enabling to Generic_GCC::IsIntegratedAssemblerDefault, NFC   Brad Smith via Phabricator via llvm-commits
• [PATCH] D140504: Link the default GC strategies everywhere getGCStrategy is used   Campbell Suter via Phabricator via llvm-commits
• [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries   Chandler Carruth via Phabricator via llvm-commits
• [llvm] 1f84e72 - [InstCombine] Fold (X << Z) / (X * Y) -> (1 << Z) / Y   Chenbing Zheng via llvm-commits
• [PATCH] D139598: [InstCombine] Fold (X << Z) / (X * Y) -> (1 << Z) / Y   Chenbing.Zheng via Phabricator via llvm-commits
• [PATCH] D139598: [InstCombine] Fold (X << Z) / (X * Y) -> (1 << Z) / Y   Chenbing.Zheng via Phabricator via llvm-commits
• [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst   Chuanqi Xu via Phabricator via llvm-commits
• [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst   Chuanqi Xu via Phabricator via llvm-commits
• [llvm] 1184ede - [RISCV] Add const qualifiers to some function arguments. NFC   Craig Topper via llvm-commits
• [llvm] ac51cf1 - [RISCV] Refactor RISCV::hasAllWUsers to hasAllNBitUsers similar to RISCVISelDAGToDAG's version. NFC   Craig Topper via llvm-commits
• [llvm] cdf09ce - [RISCV] Support SRLI in hasAllNBitUsers.   Craig Topper via llvm-commits
• [llvm] 6357b63 - [RISCV] Add RISCV::XORI to RISCVDAGToDAGISel::hasAllNBitUsers.   Craig Topper via llvm-commits
• [llvm] 9b59207 - [RISCV] Fix mistakes in fixed-vectors-vreductions-mask.ll command lines. NFC   Craig Topper via llvm-commits
• [llvm] 79d6e9c - [RISCV] Prefer ADDI over ORI if the known bits are disjoint.   Craig Topper via llvm-commits
• [llvm] 0e9855c - [RISCV] Add SH1ADD/SH2ADD/SH3ADD to RISCVDAGToDAGISel::hasAllNBitUsers.   Craig Topper via llvm-commits
• [llvm] 1490796 - [Support] Fix what I think is an off by 1 bug in UnsignedDivisionByConstantInfo.   Craig Topper via llvm-commits
• [llvm] 8abd700 - [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Craig Topper via llvm-commits
• [llvm] e50976e - [RISCV] Teach RISCVDAGToDAGISel::selectShiftMask to bypass adds with constant.   Craig Topper via llvm-commits
• [llvm] 7cd7258 - [RISCV] RISCVDAGToDAGISel::selectShiftMask to shift by (sub size-1, X).   Craig Topper via llvm-commits
• [llvm] a63b724 - [RISCV] Use SUB instead of XOR in lowerShiftLeftParts/lowerShiftRightParts./   Craig Topper via llvm-commits
• [PATCH] D140674: [RISCV] Prefer ADDI over ORI if the known bits are disjoint.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140716: [RISCV][NFC] Remove redundant setOperationAction.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140717: [RISCV] Fix typos in RISCVUsage.rst   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138807: [RISCV] Support vector crypto extension ISA string and assembly   Craig Topper via Phabricator via llvm-commits
• [PATCH] D138807: [RISCV] Support vector crypto extension ISA string and assembly   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140674: [RISCV] Prefer ADDI over ORI if the known bits are disjoint.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140636: [Support] Fix what I think is an off by 1 bug in UnsignedDivisionByConstantInfo.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140771: [RISCV] Add codegen support for RISCV XTHeadVdot Extension   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140669: [RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D139512: [RISCV] Use vfirst.m to extract the first element from mask vector.   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140460: [RISCV][MC] Add support for experimental zfa extension   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140460: [RISCV][MC] Add support for experimental zfa extension   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140460: [RISCV][MC] Add support for experimental zfa extension   Craig Topper via Phabricator via llvm-commits
• [PATCH] D140460: [RISCV][MC] Add support for experimental zfa extension   Craig Topper via Phabricator via llvm-commits
• [llvm] 821a595 - [TwoAddressInstruction] Constrain RegClass when processing a statepoint   Danila Malyutin via llvm-commits
• [PATCH] D140672: [TwoAddressInstruction] Contrain RegClass when processing a statepoint   Danila Malyutin via Phabricator via llvm-commits
• [PATCH] D140672: [TwoAddressInstruction] Contrain RegClass when processing a statepoint   Danila Malyutin via Phabricator via llvm-commits
• [PATCH] D140672: [TwoAddressInstruction] Contrain RegClass when processing a statepoint   Danila Malyutin via Phabricator via llvm-commits
• [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries   David Blaikie via Phabricator via llvm-commits
• [PATCH] D132455: [ADT] add ConcurrentHashtable class.   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140758: [llvm][AsmPrinter][NFC] Cleanup `GCMetadataPrinters` field   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140585: CodingStandards: restrict CamelCase variable names guideline to llvm/clang/clang-tools-extra/polly/bolt   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140166: [IR] return nullptr in Instruction::getInsertionPointAfterDef for CallBrInst   David Blaikie via Phabricator via llvm-commits
• [PATCH] D140764: [MemProf] Fix inline propagation of memprof metadata   David Li via Phabricator via llvm-commits
• [PATCH] D140818: [NFC][Coroutines] Build DominatorTree only once before collecting frame allocas (PR58650)   Dawid Jurczak via Phabricator via llvm-commits
• [PATCH] D140818: [NFC][Coroutines] Build DominatorTree only once before collecting frame allocas (PR58650)   Dawid Jurczak via Phabricator via llvm-commits
• [llvm] 86ed0da - [RS4GC] Rematerialize derived pointers before uses.   Denis Antrushin via llvm-commits
• [PATCH] D140672: [TwoAddressInstruction] Contrain RegClass when processing a statepoint   Denis Antrushin via Phabricator via llvm-commits
• [PATCH] D138912: [RS4GC] Rematerialize derived pointers before uses.   Denis Antrushin via Phabricator via llvm-commits
• [PATCH] D140504: Link the default GC strategies everywhere getGCStrategy is used   Denis Antrushin via Phabricator via llvm-commits
• [llvm] 9f40d9f - [AMDGPU][MC][GFX11] Correct encoding of neg modifier for v_dot2_f32_bf16   Dmitry Preobrazhensky via llvm-commits
• [llvm] e7a3063 - [AMDGPU][GFX11] Correct tied src2 of v_fmac_f16_e64   Dmitry Preobrazhensky via llvm-commits
• [PATCH] D140470: [AMDGPU][MC][GFX11] Correct encoding of neg modifier for v_dot2_f32_bf16   Dmitry Preobrazhensky via Phabricator via llvm-commits
• [PATCH] D140299: [AMDGPU][GFX11] Correct tied src2 of v_fmac_f16_e64   Dmitry Preobrazhensky via Phabricator via llvm-commits
• [PATCH] D132455: [ADT] add ConcurrentHashtable class.   Duncan P. N. Exon Smith via Phabricator via llvm-commits
• [PATCH] D138760: BLAKE3: do not try to use neon on big-endian aarch64   Duncan P. N. Exon Smith via Phabricator via llvm-commits
• [PATCH] D140505: [BPF] Use SectionForGlobal() for section names computation in BTF   Eduard Zingerman via Phabricator via llvm-commits
• [PATCH] D140635: Enabled DFAJumpThreading by Default   Ehsan Amiri via Phabricator via llvm-commits
• [llvm] a0b7bd4 - [MC] [llvm-ml] Add support for the extrn keyword   Eric Astor via llvm-commits
• [PATCH] D140679: [MC] [llvm-ml] Add support for the extrn keyword   Eric Astor via Phabricator via llvm-commits
• [PATCH] D140679: [MC] [llvm-ml] Add support for the extrn keyword   Eric Astor via Phabricator via llvm-commits
• [PATCH] D140679: [MC] [llvm-ml] Add support for the extrn keyword   Eric Astor via Phabricator via llvm-commits
• [PATCH] D138807: [RISCV] Support vector crypto extension ISA string and assembly   Eric Gouriou via Phabricator via llvm-commits
• [lld] 6b9a80d - [lld] Fix iwyu problems after 83d59e05b201760e3f364ff6316301d347cbad95   Fangrui Song via llvm-commits
• [llvm] 82be8a1 - [X86] Emit RIP-relative access to local function in PIC medium code model   Fangrui Song via llvm-commits
• [llvm] 27751be - [XRay] Fix Hexagon sled version   Fangrui Song via llvm-commits
• [llvm] ee9ccb1 - CodingStandards: restrict CamelCase variable names guideline to llvm/clang/clang-tools-extra/polly/bolt   Fangrui Song via llvm-commits
• [compiler-rt] 975327a - [dfsan][test] Replace REQUIRES: x86_64-target-arch with lit.cfg.py check   Fangrui Song via llvm-commits
• [compiler-rt] 2468b3f - [XRay] Unsupport version<2 sled entry   Fangrui Song via llvm-commits
• [compiler-rt] df9400c - [test] Fix dfsan/stack_trace.c   Fangrui Song via llvm-commits
• [llvm] 484f69b - [ProfileData] Fix msan -fsanitize-memory-param-retval after D135929   Fangrui Song via llvm-commits
• [compiler-rt] 7f7a56b - [CMake] Remove unused ALL_SCUDO_SUPPORTED_ARCH after D138157   Fangrui Song via llvm-commits
• [compiler-rt] 99fc4d3 - [msan] Remove non-working MSAN_LINUX_X86_64_OLD_MAPPING   Fangrui Song via llvm-commits
• [llvm] 4d3f26b - [test] Opaquify cgprofile.ll   Fangrui Song via llvm-commits
• [llvm] 902614d - [docs] TestingGuide.rst: Fix incorrect description   Fangrui Song via llvm-commits
• [lld] 8dc7366 - [ELF] Support TLS GD/LD relaxations for x86-32 -fno-plt   Fangrui Song via llvm-commits
• [llvm] 2679e8b - [X86] Revert -fno-plt __tls_get_addr workaround for old GNU ld   Fangrui Song via llvm-commits
• [PATCH] D140655: [LowerTypeTests] Add ENDBR to .cfi.jumptable for x86 Indirect Branch Tracking   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D138760: BLAKE3: do not try to use neon on big-endian aarch64   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140593: [X86] Emit RIP-relative access to local function in PIC medium code model   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D113638: [xray] Add support for hexagon architecture   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140725: [XRay] Emit absolute address for versions less than 2   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140585: CodingStandards: restrict CamelCase variable names guideline to llvm/clang/clang-tools-extra/polly/bolt   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140689: [DFSan] Add `zeroext` attribute for callbacks with 8bit shadow variable arguments   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140689: [DFSan] Add `zeroext` attribute for callbacks with 8bit shadow variable arguments   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140585: CodingStandards: restrict CamelCase variable names guideline to llvm/clang/clang-tools-extra/polly/bolt   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140770: [dfsan] Support AArch64   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140770: [dfsan] Support Linux AArch64   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140770: [dfsan] Support Linux AArch64   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D138760: BLAKE3: do not try to use neon on big-endian aarch64   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D91620: [compiler-rt][test] Heed COMPILER_RT_DEBUG when compiling unittests   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140770: [dfsan] Support Linux AArch64   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140797: [dfsan] Remove injectMetadataGlobals   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140797: [dfsan] Remove injectMetadataGlobals   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140813: [ELF][X86] Support TLS GD/LD relaxation for gcc -fno-plt   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140270: MIPS: fix build from IR files, nan2008 and FpAbi   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices.   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D139807: [lld][ELF] Support relocation R_AVR_LDS_STS_16 on AVRTiny devices   Fangrui Song via Phabricator via llvm-commits
• [PATCH] D140627: [orc] Pass big JITTargetMachineBuilder parameters by reference to avoid unnecessary copies   Feng Zou via Phabricator via llvm-commits
• [llvm] 98265db - [ScheduleDAG] Support REQ_SEQUENCE unscheduling   Filipp Zhinkin via llvm-commits
• [PATCH] D138837: [ScheduleDAG] Support REQ_SEQUENCE unscheduling   Filipp Zhinkin via Phabricator via llvm-commits
• [PATCH] D138837: [ScheduleDAG] Support REQ_SEQUENCE unscheduling   Filipp Zhinkin via Phabricator via llvm-commits
• [llvm] 60359f5 - Revert "[IPSCCP] Enable specialization of functions."   Florian Hahn via llvm-commits
• [llvm] 36d70a6 - [VPlan] Remove redundant blocks by merging them into predecessors.   Florian Hahn via llvm-commits
• [llvm] e91e62d - [LV] Sink scalar operands and merge regions repeatedly.   Florian Hahn via llvm-commits
• [llvm] f5c766b - [LV] Convert a few tests to use opaque pointers (NFC).   Florian Hahn via llvm-commits
• [llvm] 71ed890 - [IVUsers] Precommit test for zext SCEV invalidation issue.   Florian Hahn via llvm-commits
• [llvm] a564048 - [SCEV] Properly clean up duplicated FoldCacheUser ID entries.   Florian Hahn via llvm-commits
• [llvm] aa24147 - [VPlan] Also consider operands of sink candidates in same block.   Florian Hahn via llvm-commits
• [llvm] cd16a3f - [VPlan] Move GraphTraits definitions to separate header (NFC).   Florian Hahn via llvm-commits
• [llvm] 8971881 - [VPlan] Adjust mergeReplicateRegions to be in line with mergeBlock (NFC)   Florian Hahn via llvm-commits
• [PATCH] D140210: [IPSCCP] Enable specialization of functions.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139927: [VPlan] Remove redundant blocks by merging them into predecessors.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139788: [LV] Sink scalar operands and merge regions repeatedly.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139788: [LV] Sink scalar operands and merge regions repeatedly.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D140246: [LV] Remove duplicate name set of vector header basic block. NFC   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D137505: [SCEV] Cache ZExt SCEV expressions.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D140676: [AArch64] `LowerZERO_EXTEND_VECTOR_INREG()`: recursively apply `zip1` until done   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D140676: [AArch64] `LowerZERO_EXTEND_VECTOR_INREG()`: recursively apply `zip1` until done   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D140500: [VPlan] Move GraphTraits definitions to separate header (NFC).   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139790: [VPlan] Consider all recipes in replicate blocks as sink candidates.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D139788: [LV] Sink scalar operands and merge regions repeatedly.   Florian Hahn via Phabricator via llvm-commits
• [PATCH] D140529: [RISCV][NFC] Move RISCVISAInfo back to Support   Francesco Petrogalli via Phabricator via llvm-commits
• [PATCH] D140263: [NFC] Vastly simplifies TypeSize   Guillaume Chatelet via Phabricator via llvm-commits
• [PATCH] D140263: [NFC] Vastly simplifies TypeSize   Guillaume Chatelet via Phabricator via llvm-commits
• [PATCH] D140702: [exegesis] "Skip codegen" dry-run mode   Guillaume Chatelet via Phabricator via llvm-commits
• [PATCH] D140263: [NFC] Vastly simplifies TypeSize   Guillaume Chatelet via Phabricator via llvm-commits
• [compiler-rt] 1ae7d83 - [profile] Add binary ids into indexed profiles   Gulfem Savrun Yeniceri via llvm-commits
• [llvm] 1ec0214 - [instrprof] Fix issue in binary-ids-padding.test   Gulfem Savrun Yeniceri via llvm-commits
• [PATCH] D135929: [profile] Add binary ids into indexed profiles   Gulfem Savrun Yeniceri via Phabricator via llvm-commits
• [PATCH] D135929: [profile] Add binary ids into indexed profiles   Gulfem Savrun Yeniceri via Phabricator via llvm-commits
• [PATCH] D135929: [profile] Add binary ids into indexed profiles   Gulfem Savrun Yeniceri via Phabricator via llvm-commits
• [PATCH] D138246: [AsmPrinter] Fix Crash when Emitting Global Constant of small bit width when targeting Big Endian arch   Henry Yu via Phabricator via llvm-commits
• [llvm] 740cb33 - [RISCV][NFC] Remove redundant setOperationAction.   Hsiangkai Wang via llvm-commits
• [llvm] 002005e - [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Hsiangkai Wang via llvm-commits
• [llvm] af5dd27 - [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative   Hsiangkai Wang via llvm-commits
• [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Hsiangkai Wang via Phabricator via llvm-commits
• [PATCH] D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative   Hsiangkai Wang via Phabricator via llvm-commits
• [PATCH] D140716: [RISCV][NFC] Remove redundant setOperationAction.   Hsiangkai Wang via Phabricator via llvm-commits
• [PATCH] D140716: [RISCV][NFC] Remove redundant setOperationAction.   Hsiangkai Wang via Phabricator via llvm-commits
• [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Hsiangkai Wang via Phabricator via llvm-commits
• [PATCH] D140530: [RISCV] Add integer scalar instructions to isAssociativeAndCommutative   Hsiangkai Wang via Phabricator via llvm-commits
• [PATCH] D140602: [RISCV] Add fmin/fmax scalar instructions to isAssociativeAndCommutative   Hsiangkai Wang via Phabricator via llvm-commits
• [PATCH] D138760: BLAKE3: do not try to use neon on big-endian aarch64   Håvard Eidnes via Phabricator via llvm-commits
• [PATCH] D138760: BLAKE3: do not try to use neon on big-endian aarch64   Håvard Eidnes via Phabricator via llvm-commits
• [PATCH] D134982: [X86] Add support for "light" AVX   Ilya Tokar via Phabricator via llvm-commits
• [PATCH] D134982: [X86] Add support for "light" AVX   Ilya Tokar via Phabricator via llvm-commits
• [PATCH] D134982: [X86] Add support for "light" AVX   Ilya Tokar via Phabricator via llvm-commits
• [llvm] 0a6dc9a - [AMDGPU][AsmParser] Refine parsing cache policy modifiers.   Ivan Kosarev via llvm-commits
• [PATCH] D140108: [AMDGPU][AsmParser] Refine parsing cache policy modifiers.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D140799: [AMDGPU][AsmParser][NFC] Refine defining i8- and i16-typed custom operands.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D140799: [AMDGPU][AsmParser][NFC] Refine defining i8- and i16-typed custom operands.   Ivan Kosarev via Phabricator via llvm-commits
• [PATCH] D132646: [LLVM][TableGen] Support combined cells in jupyter kernel   Jacques Pienaar via Phabricator via llvm-commits
• [PATCH] D140748: [MLIR][Tosa] Make Tosa_IntArrayAttr2 use DenseI64ArrayAttr   Jacques Pienaar via Phabricator via llvm-commits
• [PATCH] D140806: Change getProcessTriple to return different archs in universal binary   Jacques Pienaar via Phabricator via llvm-commits
• [PATCH] D140559: [InlineAdvisor] Restructure advisor plugin unittest cmake   Jake Egan via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140798: [InstCombine] Fold zero check followed by decrement to usub.sat   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140798: [InstCombine] Fold zero check followed by decrement to usub.sat   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140798: [InstCombine] Fold zero check followed by decrement to usub.sat   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140798: [InstCombine] Fold zero check followed by decrement to usub.sat   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140798: [InstCombine] Fold zero check followed by decrement to usub.sat   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140798: [InstCombine] Fold zero check followed by decrement to usub.sat   Jamie Hill-Daniel via Phabricator via llvm-commits
• [PATCH] D140708: [AMDGPU][GFX908] Only consider explicit defs of src reg in indirect agpr copy   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D140708: [AMDGPU][GFX908] Only consider explicit defs of src reg in indirect agpr copy   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D140708: [AMDGPU][GFX908] Only consider explicit defs of src reg in indirect agpr copy   Jeffrey Byrnes via Phabricator via llvm-commits
• [PATCH] D133311: [Assignment Tracking][16/*] Account for assignment tracking in mldst-motion   Jeremy Morse via Phabricator via llvm-commits
• [PATCH] D140208: [AMDGPU] Improved wide multiplies   Jessica Del via Phabricator via llvm-commits
• [PATCH] D140208: [AMDGPU] Improved wide multiplies   Jessica Del via Phabricator via llvm-commits
• [PATCH] D140208: [AMDGPU] Improved wide multiplies   Jessica Del via Phabricator via llvm-commits
• [PATCH] D140208: [AMDGPU] Improved wide multiplies   Jessica Del via Phabricator via llvm-commits
• [PATCH] D140208: [AMDGPU] Improved wide multiplies   Jessica Del via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Jez Ng via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Jez Ng via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Jez Ng via Phabricator via llvm-commits
• [PATCH] D140631: [lld-macho][test] Remove redundant -lSystem flags   Jez Ng via Phabricator via llvm-commits
• [PATCH] D140225: [lld-macho] Provide an option to ignore framework-not-found errors coming from LC_LINKER_OPTIONS.   Jez Ng via Phabricator via llvm-commits
• [PATCH] D140244: [lld-macho] Add option for ld64 autolink behavior   Jez Ng via Phabricator via llvm-commits
• [PATCH] D139512: [RISCV] Use vfirst.m to extract the first element from mask vector.   Jianjian Guan via Phabricator via llvm-commits
• [PATCH] D140717: [RISCV] Fix typos in RISCVUsage.rst   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140717: [RISCV] Fix typos in RISCVUsage.rst   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140717: [RISCV] Fix typos in RISCVUsage.rst   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Jie Fu via Phabricator via llvm-commits
• [PATCH] D140771: [RISCV] Add codegen support for RISCV XTHeadVdot Extension   Jiejie Rong via Phabricator via llvm-commits
• [PATCH] D140470: [AMDGPU][MC][GFX11] Correct encoding of neg modifier for v_dot2_f32_bf16   Joe Nash via Phabricator via llvm-commits
• [PATCH] D138868: AMDGPU/clang: Remove target features from address space test builtins   Joe Nash via Phabricator via llvm-commits
• [PATCH] D138868: AMDGPU/clang: Remove target features from address space test builtins   Joe Nash via Phabricator via llvm-commits
• [PATCH] D140299: [AMDGPU][GFX11] Correct tied src2 of v_fmac_f16_e64   Joe Nash via Phabricator via llvm-commits
• [PATCH] D138368: [MLGO] Add LoopPropertiesAnalysis pass   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D140715: [AAPointerInfo] Remove redundant check   Johannes Doerfert via Phabricator via llvm-commits
• [PATCH] D135462: [SelectionDAG] Do not second-guess alignment for alloca   Jonas Hahnfeld via Phabricator via llvm-commits
• [PATCH] D140802: [JITLink][RISCV] Order EdgeKind_riscv the same way as relocations   Jonas Hahnfeld via Phabricator via llvm-commits
• [PATCH] D140820: [JITLink][RISCV] Homogenize immediate handling   Jonas Hahnfeld via Phabricator via llvm-commits
• [PATCH] D140827: [JITLink][RISCV] Add R_RISCV_RVC_BRANCH and R_RISCV_RVC_JUMP   Jonas Hahnfeld via Phabricator via llvm-commits
• [PATCH] D140820: [JITLink][RISCV] Homogenize immediate handling   Jonas Hahnfeld via Phabricator via llvm-commits
• [PATCH] D140827: [JITLink][RISCV] Add R_RISCV_RVC_BRANCH and R_RISCV_RVC_JUMP   Jonas Hahnfeld via Phabricator via llvm-commits
• [PATCH] D133949: Make sure the right parameter extension attributes are added in various instrumentation passes.   Jonas Paulsson via Phabricator via llvm-commits
• [PATCH] D123394: [CodeGen] Late cleanup of redundant address/immediate definitions.   Jonas Paulsson via Phabricator via llvm-commits
• [PATCH] D138470: [bazel] Restore libpfm as a conditional dependency for exegesis.   Jordan Rupprecht via Phabricator via llvm-commits
• [PATCH] D138470: [bazel] Restore libpfm as a conditional dependency for exegesis.   Jordan Rupprecht via Phabricator via llvm-commits
• [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain   Kai Luo via Phabricator via llvm-commits
• [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain   Kai Luo via Phabricator via llvm-commits
• [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain   Kai Luo via Phabricator via llvm-commits
• [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain   Kai Luo via Phabricator via llvm-commits
• [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain   Kai Luo via Phabricator via llvm-commits
• [PATCH] D138229: [flang][OpenMP] Parser support for the unroll construct (5.1)   Kiran Chandramohan via Phabricator via llvm-commits
• [llvm] 00926c3 - [RISCV] Fix typos in RISCVUsage.rst   Kito Cheng via llvm-commits
• [PATCH] D136817: [RISCV] Add H extension   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D140692: [RISCV] Add Svbmpt extension support.   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D140717: [RISCV] Fix typos in RISCVUsage.rst   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D140674: [RISCV] Prefer ADDI over ORI if the known bits are disjoint.   Kito Cheng via Phabricator via llvm-commits
• [PATCH] D140692: [RISCV] Add Svpbmt extension support.   Kito Cheng via Phabricator via llvm-commits
• [llvm] 1e48ed3 - [gn build] Port 89aad1e6a397   LLVM GN Syncbot via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Liao Chunyu via Phabricator via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Liao Chunyu via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lin Runze via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lin Runze via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lin Runze via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lin Runze via Phabricator via llvm-commits
• [PATCH] D140670: [LoongArch][test] Regenerate checks for the ghc-cc.ll test case   Lin Runze via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lu Weining via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lu Weining via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140670: [LoongArch][test] Regenerate checks for the ghc-cc.ll test case   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140670: [LoongArch][test] Regenerate checks for the ghc-cc.ll test case   Lu Weining via Phabricator via llvm-commits
• [PATCH] D137495: [LoongArch] Add GHC Calling Convention   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140528: [msan] Add msan support for loongarch64   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140725: [XRay] Emit absolute address for versions less than 2   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140727: [XRay] Add initial support for loongarch64   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140725: [XRay] Emit absolute address for versions less than 2   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140727: [XRay] Add initial support for loongarch64   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140689: [DFSan] Add `zeroext` attribute for callbacks with 8bit shadow variable arguments   Lu Weining via Phabricator via llvm-commits
• [PATCH] D140704: [NVPTX] Replace PTX's ManagedStringPool with StringSaver   Luke Drummond via Phabricator via llvm-commits
• [PATCH] D139254: Enhance stack protector   LuoYuanke via Phabricator via llvm-commits
• [PATCH] D127812: [AArch64] FMV support and necessary target features dependencies.   Mariusz Ceier via Phabricator via llvm-commits
• [llvm] 8f8313d - [llvm][AsmPrinter][NFC] Cleanup `GCMetadataPrinters` field   Markus Böck via llvm-commits
• [PATCH] D140758: [llvm][AsmPrinter][NFC] Cleanup `GCMetadataPrinters` field   Markus Böck via Phabricator via llvm-commits
• [PATCH] D140758: [llvm][AsmPrinter][NFC] Cleanup `GCMetadataPrinters` field   Markus Böck via Phabricator via llvm-commits
• [PATCH] D140758: [llvm][AsmPrinter][NFC] Cleanup `GCMetadataPrinters` field   Markus Böck via Phabricator via llvm-commits
• [PATCH] D140758: [llvm][AsmPrinter][NFC] Cleanup `GCMetadataPrinters` field   Markus Böck via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Martin Storsjö via Phabricator via llvm-commits
• [PATCH] D140291: [llvm-objcopy] Use getNumberOfSymbols() instead of getRawNumberOfSymbols()   Martin Storsjö via Phabricator via llvm-commits
• [llvm] 0ec51a4 - DAG: Prevent store value forwarding to distinct addrspace load   Matt Arsenault via llvm-commits
• [llvm] e630d9b - AMDGPU/clang: Remove target features from address space test builtins   Matt Arsenault via llvm-commits
• [llvm] dd50e26 - [NFC][IR] Remove unused assignment to Offset   Matt Arsenault via llvm-commits
• [llvm] 3eecc83 - AMDGPU: Use default attributes on image dim intrinsics   Matt Arsenault via llvm-commits
• [llvm] f4b925e - IROutliner: Convert tests to opaque pointers   Matt Arsenault via llvm-commits
• [llvm] 7e720b0 - ValueTracking: Fix canCreateUndefOrPoison for saturating shifts   Matt Arsenault via llvm-commits
• [PATCH] D140658: [AMDGPU] Enable IAS in the AMDGPU backend   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D140569: [AVR] Custom lower 32-bit shift instructions   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D140708: [AMDGPU][GFX908] Only consider explicit defs of src reg in indirect agpr copy   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D140708: [AMDGPU][GFX908] Only consider explicit defs of src reg in indirect agpr copy   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D140741: [llvm-profdata] Remove unnecessary file size check   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D140747: [Transform] Rewrite LowerSwitch using APInt   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D138868: AMDGPU/clang: Remove target features from address space test builtins   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D138868: AMDGPU/clang: Remove target features from address space test builtins   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D115597: Prevent store value forwarding to distinct addrspace load   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D138868: AMDGPU/clang: Remove target features from address space test builtins   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D110179: [NFC][IR] Remove unused assignment to Offset   Matt Arsenault via Phabricator via llvm-commits
• [PATCH] D140790: [BranchRelaxation] Prevent analyzing indirectBr during uncondBr fixup   Matt Arsenault via Phabricator via llvm-commits
• [llvm] df8cedf - [IndVars][NFC] Factor out condition creation in optimizeLoopExitWithUnknownExitCount   Max Kazantsev via llvm-commits
• [llvm] 5f24f89 - [Test] Update inverse test for turn-to-invariant to what they meant to be   Max Kazantsev via llvm-commits
• [llvm] ba2bb63 - [Test] Add tests with logical AND/OR   Max Kazantsev via llvm-commits
• [PATCH] D139832: [IndVars] Support AND in optimizeLoopExitWithUnknownExitCount   Max Kazantsev via Phabricator via llvm-commits
• [PATCH] D139832: [IndVars] Support AND in optimizeLoopExitWithUnknownExitCount   Max Kazantsev via Phabricator via llvm-commits
• [PATCH] D139832: [IndVars] Support AND in optimizeLoopExitWithUnknownExitCount   Max Kazantsev via Phabricator via llvm-commits
• [PATCH] D139832: [IndVars] Support AND/OR in optimizeLoopExitWithUnknownExitCount   Max Kazantsev via Phabricator via llvm-commits
• [PATCH] D139934: [IndVars] Apply more optimistic SkipLastIter for AND conditions   Max Kazantsev via Phabricator via llvm-commits
• [PATCH] D139934: [IndVars] Apply more optimistic SkipLastIter for AND/OR conditions   Max Kazantsev via Phabricator via llvm-commits
• [PATCH] D139832: [IndVars] Support AND/OR in optimizeLoopExitWithUnknownExitCount   Max Kazantsev via Phabricator via llvm-commits
• [PATCH] D140585: CodingStandards: restrict CamelCase variable names guideline to llvm/clang/clang-tools-extra/polly/bolt   Mehdi AMINI via Phabricator via llvm-commits
• [PATCH] D140780: [Docs] TestingGuide.rst: Fix incorrect description   Mehdi AMINI via Phabricator via llvm-commits
• [llvm] 396b0b2 - [LV] Remove duplicate name set of vector header basic block. NFC   Michael Maitland via llvm-commits
• [PATCH] D139758: [LV] Cleanup widening of Phi instructions. NFC.   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D140246: [LV] Remove duplicate name set of vector header basic block. NFC   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D140246: [LV] Remove duplicate name set of vector header basic block. NFC   Michael Maitland via Phabricator via llvm-commits
• [PATCH] D139723: [OpenMP][AMDGPU] Enable use of abs labs and llabs math functions in C code   Michał Górny via Phabricator via llvm-commits
• [PATCH] D137505: [SCEV] Cache ZExt SCEV expressions.   Mikael Holmén via Phabricator via llvm-commits
• [PATCH] D123394: [CodeGen] Late cleanup of redundant address/immediate definitions.   Mikael Holmén via Phabricator via llvm-commits
• [PATCH] D140679: [MC] [llvm-ml] Add support for the extrn keyword   Mike Hommey via Phabricator via llvm-commits
• [PATCH] D140679: [MC] [llvm-ml] Add support for the extrn keyword   Mike Hommey via Phabricator via llvm-commits
• [PATCH] D138477: MC: Add .data. and .rodata. prefixes to MCContext section classification   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D138470: [bazel] Restore libpfm as a conditional dependency for exegesis.   NAKAMURA Takumi via Phabricator via llvm-commits
• [PATCH] D140270: MIPS: fix build from IR files, nan2008 and FpAbi   Nathan Chancellor via Phabricator via llvm-commits
• [PATCH] D139254: Enhance stack protector   Nathan Lanza via Phabricator via llvm-commits
• [PATCH] D140726: lld: CHECK->LLD_CHECK to reduce chance of conflict with other libraries   Nico Weber via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Nico Weber via Phabricator via llvm-commits
• [PATCH] D140800: Precompute OptTable prefixes union table through tablegen   Nico Weber via Phabricator via llvm-commits
• [PATCH] D140800: Precompute OptTable prefixes union table through tablegen   Nico Weber via Phabricator via llvm-commits
• [llvm] f5e0391 - [InferFunctionAttrs] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 36df3fd - [Internalize] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 7e5e4d6 - [LCSSA] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 3718844 - [InterleavedAccess] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 282c1e3 - [Tests] Rename InstMerge -> MergedLoadStoreMotion (NFC)   Nikita Popov via llvm-commits
• [llvm] 9845969 - [MergedLoadStoreMotion] Add tests for store without GEPs (NFC)   Nikita Popov via llvm-commits
• [llvm] 2c15b9d - [MergeLoadStoreMotion] Don't require GEP for sinking   Nikita Popov via llvm-commits
• [llvm] fb435e1 - [MergedLoadStoreMotion] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 8bf3116 - Revert "[MergeLoadStoreMotion] Don't require GEP for sinking"   Nikita Popov via llvm-commits
• [llvm] 81fa9ac - [GVNHoist] Make test more robust (NFC)   Nikita Popov via llvm-commits
• [llvm] cb03470 - Reapply [MergeLoadStoreMotion] Don't require GEP for sinking   Nikita Popov via llvm-commits
• [llvm] dfc4a95 - [LoopBoundSplit] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] ba1759c - [LoadStoreVectorizer] Convert some tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 314d0db - [LoadStoreVectorize] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] 0d18d36 - [LoadStoreVectorizer] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 43b26b4 - Reapply [MergedLoadStoreMotion] Convert tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 66cea84 - [InstCombine] Convert some tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] cd9e2ba - Revert "[InstCombine] Convert some tests to opaque pointers (NFC)"   Nikita Popov via llvm-commits
• [llvm] 4b04c30 - [InstCombine] Regenerate test checks (NFC)   Nikita Popov via llvm-commits
• [llvm] c93e7de - [InstCombine] Convert some tests to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] 51f2f59 - [InstCombine] Convert test to opaque pointers (NFC)   Nikita Popov via llvm-commits
• [llvm] f7bc8e0 - [InstCombine] Remove redundant evaluateGEPOffsetExpression() fold (NFCI)   Nikita Popov via llvm-commits
• [llvm] 66efb98 - [CVP] Expand bound `urem`s   Nikita Popov via llvm-commits
• [PATCH] D139832: [IndVars] Support AND/OR in optimizeLoopExitWithUnknownExitCount   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D133311: [Assignment Tracking][16/*] Account for assignment tracking in mldst-motion   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140647: Handle simple diamond CFG hoisting in DivRemPairs.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D139858: [SCEVExpander] Increase "cheap" expansion budget for loop invariants, but not loop exit values   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D138637: [InstCombine] Combine opaque pointer single index GEP and with src GEP which has result of array type   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D133311: [Assignment Tracking][16/*] Account for assignment tracking in mldst-motion   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140697: [MemCpyOpt] Merge succeeding undefs while attempting a `memset`   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140698: [LoopUnroll] Be more permissive to high-cost loop trip count SCEV's   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140647: Handle simple diamond CFG hoisting in DivRemPairs.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140751: Implement a FIXME for better poison handling in SimplifyCFG.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140747: [Transform] Rewrite LowerSwitch using APInt   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D122118: [MachineCopyPropagation] Eliminate spillage copies that might be caused by eviction chain   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140635: Enabled DFAJumpThreading by Default   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140798: [InstCombine] Fold zero check followed by decrement to usub.sat   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140796: Improve ComputeNumSignBits to handle Trunc.   Nikita Popov via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Noah Goldstein via Phabricator via llvm-commits
• [llvm] 88e85aa - Handle simple diamond CFG hoisting in DivRemPairs.   Owen Anderson via llvm-commits
• [PATCH] D140647: Handle simple diamond CFG hoisting in DivRemPairs.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140647: Handle simple diamond CFG hoisting in DivRemPairs.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140647: Handle simple diamond CFG hoisting in DivRemPairs.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140751: Implement a FIXME for better poison handling in SimplifyCFG.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140796: Improve ComputeNumSignBits to handle Trunc.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140831: Fix a phase-ordering problem in SimplifyCFG.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140796: [ValueTracking] Improve ComputeNumSignBits to handle Trunc   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140796: [ValueTracking] Improve ComputeNumSignBits to handle Trunc   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140751: Implement a FIXME for better poison handling in SimplifyCFG.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140751: Implement a FIXME for better poison handling in SimplifyCFG.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140836: Do not short circuit hoistIVInc when recomputation of poison flags is needed.   Owen Anderson via Phabricator via llvm-commits
• [PATCH] D140680: [AArch64][MachineScheduler] Set no side effect for movprfx   Paul Walker via Phabricator via llvm-commits
• [llvm] fe5cf48 - Reland "[AArch64] FMV support and necessary target features dependencies."   Pavel Iliin via llvm-commits
• [PATCH] D127812: [AArch64] FMV support and necessary target features dependencies.   Pavel Iliin via Phabricator via llvm-commits
• [PATCH] D140754: [NFC][Assignment Tracking Analysis] Add x86 triple to lower-offset-expression.ll   Pavel Kopyl via Phabricator via llvm-commits
• [PATCH] D140581: [NVPTX] Enforce minumum alignment of 4 for byval parametrs in a function prototype   Pavel Kopyl via Phabricator via llvm-commits
• [PATCH] D140581: [NVPTX] Enforce minumum alignment of 4 for byval parametrs in a function prototype   Pavel Kopyl via Phabricator via llvm-commits
• [PATCH] D140754: [NFC][Assignment Tracking Analysis] Add x86 triple to lower-offset-expression.ll   Pavel Kopyl via Phabricator via llvm-commits
• [PATCH] D140368: [lldb] Consider all breakpoints in breakpoint detection   Pavel Kosov via Phabricator via llvm-commits
• [PATCH] D140368: [lldb] Consider all breakpoints in breakpoint detection   Pavel Kosov via Phabricator via llvm-commits
• [PATCH] D139907: [FuzzMutate] RandomIRBuilder has more source and sink type now.   Peter Rong via Phabricator via llvm-commits
• [PATCH] D139907: [FuzzMutate] RandomIRBuilder has more source and sink type now.   Peter Rong via Phabricator via llvm-commits
• [PATCH] D140059: [APSInt] Fix bug in APSInt mentioned in https://github.com/llvm/llvm-project/issues/59515   Peter Rong via Phabricator via llvm-commits
• [PATCH] D140059: [APSInt] Fix bug in APSInt mentioned in https://github.com/llvm/llvm-project/issues/59515   Peter Rong via Phabricator via llvm-commits
• [PATCH] D140059: [APSInt] Fix bug in APSInt mentioned in https://github.com/llvm/llvm-project/issues/59515   Peter Rong via Phabricator via llvm-commits
• [PATCH] D139894: [FuzzMutate] introduce vector operations, select and fneg into InstInjectorStrategy   Peter Rong via Phabricator via llvm-commits
• [PATCH] D140747: [Transform] Rewrite LowerSwitch using APIntThis rewrite fixes https://github.com/llvm/llvm-project/issues/59316.Previously LowerSwitch uses int64_t, which will crash on case branches using integers with more than 64 bits.Using APInt fixes...   Peter Rong via Phabricator via llvm-commits
• [PATCH] D140747: [Transform] Rewrite LowerSwitch using APInt   Peter Rong via Phabricator via llvm-commits
• [PATCH] D140747: [Transform] Rewrite LowerSwitch using APInt   Peter Rong via Phabricator via llvm-commits
• [PATCH] D137451: [CMake] Use LLVM_RUNTIME_TRIPLE in runtimes   Petr Hosek via Phabricator via llvm-commits
• [PATCH] D140773: [WebAssembly] Use `shufflevector` for shuffle   Petr Penzin via Phabricator via llvm-commits
• [PATCH] D140773: [WebAssembly] Use `shufflevector` for shuffle   Petr Penzin via Phabricator via llvm-commits
• [PATCH] D134982: [X86] Add support for "light" AVX   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D134982: [X86] Add support for "light" AVX   Phoebe Wang via Phabricator via llvm-commits
• [PATCH] D140382: [CodeGen] Add user interface for DetectDeadLanes   Piyou Chen via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Qfrost via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Qfrost via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Qfrost via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Qfrost via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Qfrost via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Qfrost via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Qfrost via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Qfrost via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Qfrost via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Qfrost via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Qfrost via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Qfrost via Phabricator via llvm-commits
• [llvm] 0ad57bf - [PowerPC] Enable track-subreg-liveness by default   Qiu Chaofan via llvm-commits
• [llvm] d006808 - Fix failure of ldst-16-byte.mir   Qiu Chaofan via llvm-commits
• [PATCH] D138696: [PowerPC] Exploit test data class instruction for isinf/iszero   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D108902: [PowerPC] Enable track-subreg-liveness by default   Qiu Chaofan via Phabricator via llvm-commits
• [PATCH] D104268: [ptr_provenance] Introduce optional ptr_provenance operand to load/store   Ralf via Phabricator via llvm-commits
• [PATCH] D135808: [LoopInterchange] Correcting the profitability check   Ramkrishnan Narayanan Komala via Phabricator via llvm-commits
• [PATCH] D135808: [LoopInterchange] Correcting the profitability check   Ramkrishnan Narayanan Komala via Phabricator via llvm-commits
• [PATCH] D135808: [LoopInterchange] Correcting the profitability check   Ramkrishnan Narayanan Komala via Phabricator via llvm-commits
• [llvm] 46458aa - [NFC][AArch64] Add a few vector shuffle tests that should be `zip1`   Roman Lebedev via llvm-commits
• [llvm] 62fc5f1 - [DAGCombiner] Add a most basic `combineShuffleToZeroExtendVectorInReg()`   Roman Lebedev via llvm-commits
• [llvm] 83288f8 - [AArch64] Custom lower `ISD::ZERO_EXTEND_VECTOR_INREG`   Roman Lebedev via llvm-commits
• [llvm] e26e7ed - [DAG] `combineShuffleToZeroExtendVectorInReg()`: try to match w/ commuted operands   Roman Lebedev via llvm-commits
• [llvm] cc051b0 - [NFC][X86] Add some tests that can be matched as ZERO_EXTEND_VECTOR_INREG   Roman Lebedev via llvm-commits
• [llvm] c4f815d - [DAGCombine] `combineShuffleToZeroExtendVectorInReg()`: widen shuffle elements before trying to match   Roman Lebedev via llvm-commits
• [llvm] 498704d - [NFC][exegesis] By default, don't dump objects to disk   Roman Lebedev via llvm-commits
• [llvm] 778a7df - [NFC][Codegen][X86] Add exhaustive-ish test coverage for ZERO_EXTEND_VECTOR_INREG   Roman Lebedev via llvm-commits
• [llvm] 30af2e3 - [InstCombine] avoid miscompile in sinkNotIntoLogicalOp()   Roman Lebedev via llvm-commits
• [llvm] 248567a - [DAGCombiner] Try to partition ISD::EXTRACT_VECTOR_ELT to accomodate it's ISD::BUILD_VECTOR users   Roman Lebedev via llvm-commits
• [llvm] c823517 - [NFC][Codegen][X86] zero_extend_vector_inreg.ll: add SSE4.2 runline   Roman Lebedev via llvm-commits
• [llvm] 3d852d1 - [NFC][PhaseOrdering] Re-autogenerate check lines in one test   Roman Lebedev via llvm-commits
• [llvm] 36cb258 - [NFC][CVP] Add tests for urem expansion   Roman Lebedev via llvm-commits
• [llvm] 3cb827f - [NFC][CVP] `processURem()`: add statistic and increase readability   Roman Lebedev via llvm-commits
• [llvm] 66efb98 - [CVP] Expand bound `urem`s   Roman Lebedev via llvm-commits
• [llvm] a35b216 - [NFC][X86] Add exhaustive-ish coverage for broadcast of implicitly aext/zext element   Roman Lebedev via llvm-commits
• [llvm] e4d25a9 - [DAG] BUILD_VECTOR: absorb ZERO_EXTEND of a single first operand if all other ops are zeros   Roman Lebedev via llvm-commits
• [llvm] 603e849 - [NFC][TLI] Move `isLoadBitCastBeneficial()` implementation into source file   Roman Lebedev via llvm-commits
• [llvm] 2480164 - [NFC][Codegen][x86] Add tests for load/store of a single-element vectors   Roman Lebedev via llvm-commits
• [llvm] 16facf1 - [DAGCombiner][TLI] Do not fuse bitcast to <1 x ?> into a load/store of a vector   Roman Lebedev via llvm-commits
• [llvm] f77dcdf - [NFC][CVP] Add more tests for urem expansion   Roman Lebedev via llvm-commits
• [llvm] 08c2f4e - [CVP] When expanding `urem`, always freeze the nominator   Roman Lebedev via llvm-commits
• [llvm] a190b40 - [NFC][X86] Add tests for concatenation of shuffle's operand to the shuffle   Roman Lebedev via llvm-commits
• [llvm] 1337821 - [DAGCombiner][X86] Fold a CONCAT_VECTORS of SHUFFLE_VECTOR and it's operand into wider SHUFFLE_VECTOR   Roman Lebedev via llvm-commits
• [PATCH] D140665: [RISCV] Add DAG combine to fold (shl nuw (aextload), C) -> (shl nuw (zextload), C).   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140676: [AArch64] `LowerZERO_EXTEND_VECTOR_INREG()`: recursively apply `zip1` until done   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140677: [AArch64][DAG] `canCombineShuffleToExtendVectorInreg()`: allow illegal types before legalization   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140638: [Codegen][LegalizeIntegerTypes] New legalization strategy for scalar shifts: shift through stack   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140271: [NFCI][llvm-exegesis] Benchmark: parallelize codegen (5x ... 8x less wallclock)   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D139858: [SCEVExpander] Increase "cheap" expansion budget for loop invariants, but not loop exit values   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140698: [LoopUnroll] Be more permissive to high-cost loop trip count SCEV's   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D139858: [SCEVExpander] Increase "cheap" expansion budget for loop invariants, but not loop exit values   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140700: [NFC][exegesis] By default, don't dump objects to disk   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140702: [exegesis] "Skip codegen" dry-run mode   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140698: [LoopUnroll] Be more permissive to high-cost loop trip count SCEV's   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140710: [draft] CVP: expand bound URems   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140710: [draft] CVP: expand bound URems   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140271: [NFCI][llvm-exegesis] Benchmark: parallelize codegen (5x ... 8x less wallclock)   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D134982: [X86] Add support for "light" AVX   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140700: [NFC][exegesis] By default, don't dump objects to disk   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140702: [exegesis] "Skip codegen" dry-run mode   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140700: [NFC][exegesis] By default, don't dump objects to disk   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140702: [exegesis] "Skip codegen" dry-run mode   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140702: [exegesis] "Skip codegen" dry-run mode   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140734: [exegesis] Analysis: filtering for benchmark results   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140087: [X86] Replace (31/63 -/^ X) with (NOT X) and ignore (32/64 ^ X) when computing shift count   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140676: [AArch64] `LowerZERO_EXTEND_VECTOR_INREG()`: recursively apply `zip1` until done   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140676: [AArch64] `LowerZERO_EXTEND_VECTOR_INREG()`: recursively apply `zip1` until done   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140677: [AArch64][DAG] `canCombineShuffleToExtendVectorInreg()`: allow illegal types before legalization   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140811: [DAGCombiner][X86] `visitVECTOR_SHUFFLE()`: splats with a single non-undef element are not splats   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140677: [AArch64][DAG] `canCombineShuffleToExtendVectorInreg()`: allow illegal types before legalization   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140811: [DAGCombiner][X86] `visitVECTOR_SHUFFLE()`: splats with a single non-undef element are not splats   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D140677: [AArch64][DAG] `canCombineShuffleToExtendVectorInreg()`: allow illegal types before legalization   Roman Lebedev via Phabricator via llvm-commits
• [PATCH] D138323: [TableGen] RegisterInfo backend - Add abstraction layer between code generation logic and syntax output   Rot127 via Phabricator via llvm-commits
• [PATCH] D140529: [RISCV][NFC] Move RISCVISAInfo back to Support   Sam Elliott via Phabricator via llvm-commits
• [PATCH] D137838: [Support] Move TargetParsers to new component   Sam Elliott via Phabricator via llvm-commits
• [PATCH] D140837: [AAPointerInfo] fix assertion at the pass-through use of a pointer   Sameer Sahasrabuddhe via Phabricator via llvm-commits
• [llvm] 00c7840 - [InstCombine] replace undef in vector tests with poison; NFC   Sanjay Patel via llvm-commits
• [llvm] a0c8017 - [InstCombine] do not add "nuw" to 1<<X if the "1" has undefined elements   Sanjay Patel via llvm-commits
• [llvm] 862e35e - [InstCombine] preserve signbit semantics of NAN with fold to fabs   Sanjay Patel via llvm-commits
• [llvm] 7f0c115 - [InstCombine] add tests for udiv-by-constant demanded bits; NFC   Sanjay Patel via llvm-commits
• [llvm] 935a652 - [InstSimplify] add tests for div exact; NFC   Sanjay Patel via llvm-commits
• [llvm] b16d04d - [InstSimplify] fix formatting and add bool function argument comments; NFC   Sanjay Patel via llvm-commits
• [llvm] f0faea5 - [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Sanjay Patel via llvm-commits
• [llvm] e5a7309 - [InstCombine] add test for miscompile from sinkNotIntoLogicalOp(); NFC   Sanjay Patel via llvm-commits
• [llvm] 30af2e3 - [InstCombine] avoid miscompile in sinkNotIntoLogicalOp()   Sanjay Patel via llvm-commits
• [llvm] 94944f8 - [InstSimplify] add tests for select-of-bool; NFC   Sanjay Patel via llvm-commits
• [llvm] 6c232db - [InstSimplify] fold selects where true/false arm is the same as condition   Sanjay Patel via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140665: [SelectionDAG][RISCV][X86][AArch64][AMDGPU][PowerPC] Improve SimplifyDemandedBits for SHL with NUW/NSW flags.   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D139598: [InstCombine] Fold (X << Z) / (X * Y) -> (1 << Z) / Y   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D139785: [InstCombine] preserve signbit semantics of NAN with fold to fabs   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140733: [InstSimplify] fold exact divide to poison if it is known to not divide evenly   Sanjay Patel via Phabricator via llvm-commits
• [PATCH] D140646: [AMDGPU][NFC] DWARF extensions minor update   Scott Linder via Phabricator via llvm-commits
• [PATCH] D140359: [ItaniumDemangle] Fix substitution failure of _BitInt   Senran Zhang via Phabricator via llvm-commits
• [PATCH] D64834: [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions.   Sergei Barannikov via Phabricator via llvm-commits
• [PATCH] D132208: [LoopIntWrapPredication] Loop Integer Wrapping Predication Pass   Sergei Kachkov via Phabricator via llvm-commits
• [PATCH] D140715: [AAPointerInfo] Remove redundant check   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D140715: [AAPointerInfo] Remove redundant check   Shilei Tian via Phabricator via llvm-commits
• [PATCH] D140700: [NFC][exegesis] By default, don't dump objects to disk   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D140499: [SLP]Use ShuffleInstructionBuilder for vector shrinking.   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D134982: [X86] Add support for "light" AVX   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D140811: [DAGCombiner][X86] `visitVECTOR_SHUFFLE()`: splats with a single non-undef element are not splats   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D140789: [SLP] Unify GEP cost modeling for load, store and GEP nodes.   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D140747: [Transform] Rewrite LowerSwitch using APInt   Simon Pilgrim via Phabricator via llvm-commits
• [PATCH] D140741: [llvm-profdata] Remove unnecessary file size check   Snehasish Kumar via Phabricator via llvm-commits
• [PATCH] D140741: [llvm-profdata] Remove unnecessary file size check   Snehasish Kumar via Phabricator via llvm-commits
• [PATCH] D139603: [llvm-profdata] Add option to cap profile output size   Snehasish Kumar via Phabricator via llvm-commits
• [PATCH] D140764: [MemProf] Fix inline propagation of memprof metadata   Snehasish Kumar via Phabricator via llvm-commits
• [PATCH] D64826: [Xtensa 1/10] Recognize Xtensa in triple parsing code.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64827: [Xtensa 2/10] Add Xtensa ELF definitions.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64829: [Xtensa 3/10] Add initial version of the Xtensa backend.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64830: [Xtensa 4/10] Add basic *td files with Xtensa architecture description.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64831: [Xtensa 5/10] Add Xtensa MCTargetDescr initial functionality.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64832: [Xtensa 6/10] Add Xtensa basic assembler parser.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64833: [Xtensa 7/10] Add Xtensa instruction printer.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64834: [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64835: [Xtensa 9/10] Add basic support of Xtensa disassembler.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D64836: [Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions.   Stefan Stipanovic via Phabricator via llvm-commits
• [PATCH] D139184: [LLD][Windows]Feature "checksum" for Windows PE   Tanya Lattner via Phabricator via llvm-commits
• [llvm] 35c7e45 - [MemProf] Fix inline propagation of memprof metadata   Teresa Johnson via llvm-commits
• [PATCH] D140655: [LowerTypeTests] Add ENDBR to .cfi.jumptable for x86 Indirect Branch Tracking   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D140764: [MemProf] Fix inline propagation of memprof metadata   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D140764: [MemProf] Fix inline propagation of memprof metadata   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D140764: [MemProf] Fix inline propagation of memprof metadata   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D140764: [MemProf] Fix inline propagation of memprof metadata   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D140764: [MemProf] Fix inline propagation of memprof metadata   Teresa Johnson via Phabricator via llvm-commits
• [PATCH] D140786: [MemProf] Fix combined index handling for locals   Teresa Johnson via Phabricator via llvm-commits
• [llvm] 9aa0ee3 - [NFC][AMDGPU] Make method declarations in SIInstrInfo equivalent to their definitions.   Thomas Symalla via llvm-commits
• [PATCH] D140778: [NFC][AMDGPU] Make method declarations in SIInstrInfo equivalent to their definitions.   Thomas Symalla via Phabricator via llvm-commits
• [PATCH] D140778: [NFC][AMDGPU] Make method declarations in SIInstrInfo equivalent to their definitions.   Thomas Symalla via Phabricator via llvm-commits
• [PATCH] D140778: [NFC][AMDGPU] Make method declarations in SIInstrInfo equivalent to their definitions.   Thomas Symalla via Phabricator via llvm-commits
• [PATCH] D140788: [DWARFLinkerNext] add AddressesMap interface.   Thorsten via Phabricator via llvm-commits
• [PATCH] D140788: [DWARFLinkerNext] add AddressesMap interface.   Thorsten via Phabricator via llvm-commits
• [PATCH] D140791: [DWARFLinkerNext] Add simple list with thread safe insertions.   Thorsten via Phabricator via llvm-commits
• [PATCH] D140682: [PowerPC][NFC] add test case for ShouldTrackLaneMasks   Ting Wang via Phabricator via llvm-commits
• [PATCH] D140683: [PowerPC] enable Policy.ShouldTrackLaneMasks   Ting Wang via Phabricator via llvm-commits
• [PATCH] D140555: [lld][COFF]llvm-readobj COFFDumper print PEHeader CheckSum   Tobias Hieta via Phabricator via llvm-commits
• [PATCH] D140580: [SLP]Do not emit many extractelements, reuse the single one emitted.   Valeriy Dmitriev via Phabricator via llvm-commits
• [PATCH] D140785: [NFC] Test case intended to cover SLP cost for chain with masked gather loads.   Valeriy Dmitriev via Phabricator via llvm-commits
• [PATCH] D140785: [NFC] Test case intended to cover SLP cost for chain with masked gather loads.   Valeriy Dmitriev via Phabricator via llvm-commits
• [PATCH] D140789: [SLP] Unify GEP cost modeling for load, store and GEP nodes.   Valeriy Dmitriev via Phabricator via llvm-commits
• [llvm] 8eb3698 - [SLP] A couple of minor improvements for slp graph view - NFC.   Valery N Dmitriev via llvm-commits
• [llvm] ad956ed - [SLP] Fix debug print for cost in tryToVectorizeList - NFC.   Valery N Dmitriev via llvm-commits
• [llvm] 6bb4b2d - [NFC] Test case intended to cover SLP cost for chain with masked gather loads.   Valery N Dmitriev via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Vincent Lee via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Vincent Lee via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Vincent Lee via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Vincent Lee via Phabricator via llvm-commits
• [PATCH] D140592: [lld-macho] Skip re-loading archive if already loaded   Vincent Lee via Phabricator via llvm-commits
• [llvm] 8f70b84 - [CodeGen] Temporarily disable-lsr in HWASAN build   Vitaly Buka via llvm-commits
• [llvm] 6f3400e - Revert "[CodeGen] Temporarily disable-lsr in HWASAN build"   Vitaly Buka via llvm-commits
• [PATCH] D137838: [Support] Move TargetParsers to new component   Vitaly Buka via Phabricator via llvm-commits
• [PATCH] D137838: [Support] Move TargetParsers to new component   Wang Pengcheng via Phabricator via llvm-commits
• [llvm] 389079c - [LoongArch] Add GHC Calling Convention   Weining Lu via llvm-commits
• [llvm] 77fad4c - [LoongArch][test] Regenerate checks for the ghc-cc.ll test case   Weining Lu via llvm-commits
• [llvm] 14ce567 - [DFSan] Add `zeroext` attribute for callbacks with 8bit shadow variable arguments   Weining Lu via llvm-commits
• [PATCH] D140741: [llvm-profdata] Remove unnecessary file size check   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D140741: [llvm-profdata] Remove unnecessary file size check   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D139603: [llvm-profdata] Add option to cap profile output size   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D139603: [llvm-profdata] Add option to cap profile output size   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D140741: [llvm-profdata] Remove unnecessary file size check   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D139603: [llvm-profdata] Add option to cap profile output size   William Junda Huang via Phabricator via llvm-commits
• [PATCH] D140670: [LoongArch][test] Regenerate checks for the ghc-cc.ll test case   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D140685: [LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions   WÁNG Xuěruì via Phabricator via llvm-commits
• [PATCH] D136031: [DirectX backend] support ConstantBuffer to DXILResource.h   Xiang Li via Phabricator via llvm-commits
• [PATCH] D140528: [msan] Add msan support for loongarch64   Xiaodong Liu via Phabricator via llvm-commits
• [PATCH] D140685: [LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions   Xiaodong Liu via Phabricator via llvm-commits
• [PATCH] D140685: [LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions   Xiaodong Liu via Phabricator via llvm-commits
• [PATCH] D140685: [LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions   Xiaodong Liu via Phabricator via llvm-commits
• [PATCH] D140527: [LoongArch] Add intrinsics for CACOP instruction   Xiaodong Liu via Phabricator via llvm-commits
• [PATCH] D140635: Enabled DFAJumpThreading by Default   YangguangLi via Phabricator via llvm-commits
• [llvm] bd9c0f0 - [RISCV] Add Svpbmt extension support.   Yeting Kuo via llvm-commits
• [llvm] e2b65ff - [RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.   Yeting Kuo via llvm-commits
• [PATCH] D140669: [RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140692: [RISCV] Add Svbmpt extension support.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140692: [RISCV] Add Svpbmt extension support.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140692: [RISCV] Add Svpbmt extension support.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140692: [RISCV] Add Svpbmt extension support.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140782: [RISCV] Teach lowerCTLZ_CTTZ_ZERO_UNDEF to handle i32 vectors with conversion to f32 vectors.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140669: [RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140669: [RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140669: [RISCV] Use tail agnostic if inserting subvector/element at the end of a vector.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140782: [RISCV] Teach lowerCTLZ_CTTZ_ZERO_UNDEF to handle i32 vectors with conversion to f32 vectors.   Yeting Kuo via Phabricator via llvm-commits
• [PATCH] D140666: [InstCombine] combine intersection for inequality icmps   Yingchi Long via Phabricator via llvm-commits
• [PATCH] D140666: [InstCombine] combine intersection for inequality icmps   Yingchi Long via Phabricator via llvm-commits
• [PATCH] D139706: [RISCV][VP] expand vp intrinsics if no +v feature   Yingchi Long via Phabricator via llvm-commits
• [llvm] f27c490 - MC: Add .data. and .rodata. prefixes to MCContext section classification   Yonghong Song via llvm-commits
• [llvm] 5922d36 - [MC][BPF] Add bpf guard for MC test data-section-prefix.ll   Yonghong Song via llvm-commits
• [llvm] ed06838 - [BPF] Use SectionForGlobal() for section names computation in BTF   Yonghong Song via llvm-commits
• [PATCH] D138477: MC: Add .data. and .rodata. prefixes to MCContext section classification   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D138477: MC: Add .data. and .rodata. prefixes to MCContext section classification   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D140505: [BPF] Use SectionForGlobal() for section names computation in BTF   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D140505: [BPF] Use SectionForGlobal() for section names computation in BTF   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D138477: MC: Add .data. and .rodata. prefixes to MCContext section classification   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D140505: [BPF] Use SectionForGlobal() for section names computation in BTF   Yonghong Song via Phabricator via llvm-commits
• [PATCH] D140528: [msan] Add msan support for loongarch64   Youling Tang via Phabricator via llvm-commits
• [PATCH] D140528: [msan] Add msan support for loongarch64   Youling Tang via Phabricator via llvm-commits
• [PATCH] D140528: [msan] Add msan support for loongarch64   Youling Tang via Phabricator via llvm-commits
• [PATCH] D140689: [llvm][dfsan] Enable loongarch64 and add `zeroext` attribute   Youling Tang via Phabricator via llvm-commits
• [PATCH] D140689: [llvm][dfsan] Enable loongarch64 and add `zeroext` attribute   Youling Tang via Phabricator via llvm-commits
• [PATCH] D140689: [llvm][dfsan] Enable loongarch64 and add `zeroext` attribute   Youling Tang via Phabricator via llvm-commits
• [PATCH] D140689: [DFSan] Add `zeroext` attribute for callbacks with 8bit shadow variable arguments   Youling Tang via Phabricator via llvm-commits
• [PATCH] D140270: MIPS: fix build from IR files, nan2008 and FpAbi   YunQiang Su via Phabricator via llvm-commits
• [PATCH] D140270: MIPS: fix build from IR files, nan2008 and FpAbi   YunQiang Su via Phabricator via llvm-commits
• [PATCH] D137838: [Support] Move TargetParsers to new component   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D135202: [IR] Add a target extension type to LLVM.   Zixuan Wu via Phabricator via llvm-commits
• [PATCH] D140769: [lld-link] Add /lto-newpm-passes & /load-pass-plugin to CLI   cursey via Phabricator via llvm-commits
• [PATCH] D140820: [JITLink][RISCV] Homogenize immediate handling   luxufan via Phabricator via llvm-commits
• [PATCH] D140802: [JITLink][RISCV] Order EdgeKind_riscv the same way as relocations   luxufan via Phabricator via llvm-commits
• [PATCH] D139881: [clang] Use a StringRef instead of a raw char pointer to store builtin and call information   serge via Phabricator via llvm-commits
• [PATCH] D140699: [clang] Make ValuesCode initialisation of Options constexpr   serge via Phabricator via llvm-commits
• [PATCH] D140800: Precompute OptTable prefixes union table through tablegen   serge via Phabricator via llvm-commits
• [PATCH] D140800: Precompute OptTable prefixes union table through tablegen   serge via Phabricator via llvm-commits
• [llvm] 8c618e8 - [Xtensa 1/10] Recognize Xtensa in triple parsing code   via llvm-commits
• [llvm] 310f765 - [Xtensa 2/10] Add Xtensa ELF definitions   via llvm-commits
• [llvm] 52804a7 - [Xtensa 3/10] Add initial version of the Xtensa backend   via llvm-commits
• [llvm] 8a65520 - [Xtensa 4/10] Add basic *td files with Xtensa architecture description   via llvm-commits
• [llvm] 6017209 - [Xtensa 5/10] Add Xtensa MCTargetDescr initial functionality   via llvm-commits
• [llvm] 52ecf02 - [Xtensa 6/10] Add Xtensa basic assembler parser   via llvm-commits
• [llvm] 2758a01 - [Xtensa 7/10] Add Xtensa instruction printer   via llvm-commits
• [llvm] 4e0c1d9 - [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions   via llvm-commits
• [llvm] 71199af - [Xtensa 9/10] Add basic support of Xtensa disassembler   via llvm-commits
• [llvm] ff25800 - [Xtensa 10/10] Add relaxations and fixups. Add rest part of Xtensa Core Instructions   via llvm-commits
• [llvm] bb778cf - Commit changes to the Code of Conduct that make it more clear regarding behavior outside of LLVM spaces that impact the safety of our community members. Discussion may be found here: https://discourse.llvm.org/t/code-of-conduct-changes-related-to-llvm-project-policy-changes/64197   via llvm-commits
• [llvm] d9ab3e8 - [clang] Use a StringRef instead of a raw char pointer to store builtin and call information   via llvm-commits
• [llvm] c69d839 - [AArch64][MachineScheduler] Set no side effect for movprfx   via llvm-commits
• [lld] 239babe - llvm-readobj COFFDumper print PEHeader CheckSum   via llvm-commits
• [llvm] 3100021 - [JITLink][RISCV] Fix incorrectly use of uint32_t   via llvm-commits

Last message date: Sun Jan 1 22:18:21 PST 2023
Archived on: Sun Jan 1 22:18:23 PST 2023

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