[llvm] 30af2e3 - [InstCombine] avoid miscompile in sinkNotIntoLogicalOp()

[Roman Lebedev via llvm-commits]

Thanks!

On Thu, Dec 29, 2022 at 10:35 PM Sanjay Patel via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
>
> Author: Sanjay Patel
> Date: 2022-12-29T14:33:41-05:00
> New Revision: 30af2e31917021f68a3d16ee71335f048c9e6235
>
> URL: https://github.com/llvm/llvm-project/commit/30af2e31917021f68a3d16ee71335f048c9e6235
> DIFF: https://github.com/llvm/llvm-project/commit/30af2e31917021f68a3d16ee71335f048c9e6235.diff
>
> LOG: [InstCombine] avoid miscompile in sinkNotIntoLogicalOp()
>
> Fixes #59704
>
> Added:
>
>
> Modified:
>     llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
>     llvm/test/Transforms/InstCombine/sink-not-into-logical-and.ll
>
> Removed:
>
>
>
> ################################################################################
> diff  --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
> index 93bb120e6ae16..47f8c143b754c 100644
> --- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
> +++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
> @@ -3668,6 +3668,12 @@ bool InstCombinerImpl::sinkNotIntoLogicalOp(Instruction &I) {
>    Value *Op0, *Op1;
>    if (!match(&I, m_LogicalOp(m_Value(Op0), m_Value(Op1))))
>      return false;
> +
> +  // If this logic op has not been simplified yet, just bail out and let that
> +  // happen first. Otherwise, the code below may wrongly invert.
> +  if (Op0 == Op1)
> +    return false;
> +
>    Instruction::BinaryOps NewOpc =
>        match(&I, m_LogicalAnd()) ? Instruction::Or : Instruction::And;
>    bool IsBinaryOp = isa<BinaryOperator>(I);
>
> diff  --git a/llvm/test/Transforms/InstCombine/sink-not-into-logical-and.ll b/llvm/test/Transforms/InstCombine/sink-not-into-logical-and.ll
> index 7917e7ce3b462..8998be562abb9 100644
> --- a/llvm/test/Transforms/InstCombine/sink-not-into-logical-and.ll
> +++ b/llvm/test/Transforms/InstCombine/sink-not-into-logical-and.ll
> @@ -204,16 +204,18 @@ define i1 @t11(i32 %v0, i32 %v1, i32 %v2, i32 %v3, i1 %v4, i1 %v5) {
>    ret i1 %i4
>  }
>
> -; FIXME: This is a miscompile.
> +; This would miscompile by not handling the unsimplified select correctly.
>
>  define i1 @PR59704(i1 %c, i1 %b, i64 %arg) {
>  ; CHECK-LABEL: @PR59704(
>  ; CHECK-NEXT:  entry:
>  ; CHECK-NEXT:    br i1 [[C:%.*]], label [[IF:%.*]], label [[JOIN:%.*]]
>  ; CHECK:       if:
> +; CHECK-NEXT:    [[CMP_NOT:%.*]] = icmp eq i64 [[ARG:%.*]], 0
>  ; CHECK-NEXT:    br label [[JOIN]]
>  ; CHECK:       join:
> -; CHECK-NEXT:    ret i1 true
> +; CHECK-NEXT:    [[PHI:%.*]] = phi i1 [ true, [[ENTRY:%.*]] ], [ [[CMP_NOT]], [[IF]] ]
> +; CHECK-NEXT:    ret i1 [[PHI]]
>  ;
>  entry:
>    br i1 %c, label %if, label %join
>
>
>
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