[llvm] 47df55f - [gn] Don't include RISCV in targets build for 'all'

Alex Bradbury via llvm-commits llvm-commits at lists.llvm.org
Mon Dec 26 08:19:12 PST 2022


Scratch that - I see this was reverted.

Best,

Alex

On Mon, 26 Dec 2022 at 16:10, Alex Bradbury <asb at asbradbury.org> wrote:
>
> RISC-V has been a default target for a long time now, so any build or
> lit test failures should be showing up on the existing buildbots. If
> you're seeing issues, please do report them.
>
> Best,
>
> Alex
>
> On Wed, 21 Dec 2022 at 23:24, Nico Weber via llvm-commits
> <llvm-commits at lists.llvm.org> wrote:
> >
> >
> > Author: Nico Weber
> > Date: 2022-12-21T18:24:44-05:00
> > New Revision: 47df55f3ef57179ebd845290a1bee18c445ff180
> >
> > URL: https://github.com/llvm/llvm-project/commit/47df55f3ef57179ebd845290a1bee18c445ff180
> > DIFF: https://github.com/llvm/llvm-project/commit/47df55f3ef57179ebd845290a1bee18c445ff180.diff
> >
> > LOG: [gn] Don't include RISCV in targets build for 'all'
> >
> > RISCV build and tests are often broken.
> >
> > You can use `llvm_targets_to_build = "experimental"` to enable
> > _all_ targets, including the experimental ones. If RISCV is listed
> > in llvm_targets_to_build, it's built as before.
> >
> > Added:
> >
> >
> > Modified:
> >     llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
> >
> > Removed:
> >
> >
> >
> > ################################################################################
> > diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni b/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
> > index 14c5fdc6dd4be..45dce88e17960 100644
> > --- a/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
> > +++ b/llvm/utils/gn/secondary/llvm/lib/Target/targets.gni
> > @@ -8,7 +8,7 @@ declare_args() {
> >  }
> >
> >  # FIXME: Port the remaining targets.
> > -llvm_all_targets = [
> > +llvm_all_stable_targets = [
> >    "AArch64",
> >    "AMDGPU",
> >    "ARM",
> > @@ -27,6 +27,10 @@ llvm_all_targets = [
> >    "X86",
> >  ]
> >
> > +llvm_all_experimental_targets = [ "RISCV" ]
> > +
> > +llvm_all_targets = llvm_all_stable_targets + llvm_all_experimental_targets
> > +
> >  # FIXME: This should be based off target_cpu once cross compiles work.
> >  if (host_cpu == "arm64") {
> >    native_target = "AArch64"
> > @@ -43,6 +47,8 @@ if (host_cpu == "arm64") {
> >  if (llvm_targets_to_build == "host") {
> >    llvm_targets_to_build = [ native_target ]
> >  } else if (llvm_targets_to_build == "all") {
> > +  llvm_targets_to_build = llvm_all_stable_targets
> > +} else if (llvm_targets_to_build == "experimental") {
> >    llvm_targets_to_build = llvm_all_targets
> >  }
> >
> >
> >
> >
> > _______________________________________________
> > llvm-commits mailing list
> > llvm-commits at lists.llvm.org
> > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-commits


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