[PATCH] D140782: [RISCV] Teach lowerCTLZ_CTTZ_ZERO_UNDEF to handle i32 vectors with conversion to f32 vectors.

[Yeting Kuo via Phabricator via llvm-commits]

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Previously lowerCTLZ_CTTZ_ZERO_UNDEF converted the source to float value by
ISD::UINT_TO_FP. ISD::UINT_TO_FP uses dynamic rounding mode, so the rounding
may make the exponent of the result not as expected when converting i32 to f32.
This is the reason why we constrained lowerCTLZ_CTTZ_ZERO_UNDEF to only handle
an i32 source when the f64 type having the same element count as source is legal.

The patch teaches lowerCTLZ_CTTZ_ZERO_UNDEF converts i32 vectors to f32 vectors
by vfcvt.f.xu.v with RTZ rounding mode when it can't convert to f64 vectors. It
is not only benefited for zve32f/zve64f but also make zve64d target be able to
handle nxv16i32 (nxv16f64 is not legal).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D140782

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll

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