[llvm] 7f0c115 - [InstCombine] add tests for udiv-by-constant demanded bits; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 28 11:10:22 PST 2022


Author: Sanjay Patel
Date: 2022-12-28T14:08:47-05:00
New Revision: 7f0c11509e8f410f646febd17b52b6a253bbffe5

URL: https://github.com/llvm/llvm-project/commit/7f0c11509e8f410f646febd17b52b6a253bbffe5
DIFF: https://github.com/llvm/llvm-project/commit/7f0c11509e8f410f646febd17b52b6a253bbffe5.diff

LOG: [InstCombine] add tests for udiv-by-constant demanded bits; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/udiv-simplify.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/udiv-simplify.ll b/llvm/test/Transforms/InstCombine/udiv-simplify.ll
index de00e8951631..559800f18deb 100644
--- a/llvm/test/Transforms/InstCombine/udiv-simplify.ll
+++ b/llvm/test/Transforms/InstCombine/udiv-simplify.ll
@@ -83,25 +83,78 @@ define i177 @ossfuzz_4857(i177 %X, i177 %Y) {
   ret i177 %B1
 }
 
-define i32 @udiv_demanded(i32 %a) {
-; CHECK-LABEL: @udiv_demanded(
-; CHECK-NEXT:    [[U:%.*]] = udiv i32 [[A:%.*]], 12
-; CHECK-NEXT:    ret i32 [[U]]
+; 2 low bits are not needed because 12 has 2 trailing zeros
+
+define i8 @udiv_demanded_low_bits_set(i8 %a) {
+; CHECK-LABEL: @udiv_demanded_low_bits_set(
+; CHECK-NEXT:    [[U:%.*]] = udiv i8 [[A:%.*]], 12
+; CHECK-NEXT:    ret i8 [[U]]
+;
+  %o = or i8 %a, 3
+  %u = udiv i8 %o, 12
+  ret i8 %u
+}
+
+; TODO: This can't divide evenly, so it is poison.
+
+define i8 @udiv_exact_demanded_low_bits_set(i8 %a) {
+; CHECK-LABEL: @udiv_exact_demanded_low_bits_set(
+; CHECK-NEXT:    [[O:%.*]] = or i8 [[A:%.*]], 3
+; CHECK-NEXT:    [[U:%.*]] = udiv exact i8 [[O]], 12
+; CHECK-NEXT:    ret i8 [[U]]
+;
+  %o = or i8 %a, 3
+  %u = udiv exact i8 %o, 12
+  ret i8 %u
+}
+
+; All high bits are set, so this simplifies.
+
+define i8 @udiv_demanded_high_bits_set(i8 %x, i8 %y) {
+; CHECK-LABEL: @udiv_demanded_high_bits_set(
+; CHECK-NEXT:    ret i8 21
 ;
-  %o = or i32 %a, 3
-  %u = udiv i32 %o, 12
-  ret i32 %u
+  %o = or i8 %x, -4
+  %r = udiv i8 %o, 12
+  ret i8 %r
 }
 
-define i32 @udiv_exact_demanded(i32 %a) {
-; CHECK-LABEL: @udiv_exact_demanded(
-; CHECK-NEXT:    [[O:%.*]] = and i32 [[A:%.*]], -3
-; CHECK-NEXT:    [[U:%.*]] = udiv exact i32 [[O]], 12
-; CHECK-NEXT:    ret i32 [[U]]
+; TODO: This should fold the same as above.
+
+define i8 @udiv_exact_demanded_high_bits_set(i8 %x, i8 %y) {
+; CHECK-LABEL: @udiv_exact_demanded_high_bits_set(
+; CHECK-NEXT:    [[O:%.*]] = or i8 [[X:%.*]], -4
+; CHECK-NEXT:    [[R:%.*]] = udiv exact i8 [[O]], 12
+; CHECK-NEXT:    ret i8 [[R]]
+;
+  %o = or i8 %x, -4
+  %r = udiv exact i8 %o, 12
+  ret i8 %r
+}
+
+; 2 low bits are not needed because 12 has 2 trailing zeros
+
+define i8 @udiv_demanded_low_bits_clear(i8 %a) {
+; CHECK-LABEL: @udiv_demanded_low_bits_clear(
+; CHECK-NEXT:    [[U:%.*]] = udiv i8 [[A:%.*]], 12
+; CHECK-NEXT:    ret i8 [[U]]
+;
+  %o = and i8 %a, -4
+  %u = udiv i8 %o, 12
+  ret i8 %u
+}
+
+; TODO: This should fold the same as above.
+
+define i8 @udiv_exact_demanded_low_bits_clear(i8 %a) {
+; CHECK-LABEL: @udiv_exact_demanded_low_bits_clear(
+; CHECK-NEXT:    [[O:%.*]] = and i8 [[A:%.*]], -4
+; CHECK-NEXT:    [[U:%.*]] = udiv exact i8 [[O]], 12
+; CHECK-NEXT:    ret i8 [[U]]
 ;
-  %o = and i32 %a, -3
-  %u = udiv exact i32 %o, 12
-  ret i32 %u
+  %o = and i8 %a, -4
+  %u = udiv exact i8 %o, 12
+  ret i8 %u
 }
 
 define <vscale x 1 x i32> @udiv_demanded3(<vscale x 1 x i32> %a) {


        


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