[PATCH] D140680: [AArch64][MachineScheduler] Set no side effect for movprfx

Tue Dec 27 04:44:59 PST 2022

Allen marked an inline comment as done.
Allen added a comment.

In D140680#4017320 <https://reviews.llvm.org/D140680#4017320>, @paulwalker-arm wrote:

> Patch looks good to me but it looks like we're missing this information for all SVE instructions.  Not sure if it used to default to 0 and we missed the switch to ? but the information is missing regardless.  @Allen Is this something you plan to follow up on? or should I add it to my list?

Thanks, If you have time to complete, I am very welcome, I am not skilled in the function of instructions, need to query documents one by one, so it may be  too slow to finish that.

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Comment at: llvm/test/CodeGen/AArch64/sched-movprfx.ll:10-11
+; NOTE: The unused paramter ensures z0/z1 is free, avoiding the antidependence for schedule.
+define <vscale x 2 x i64> @and_i64_zero(<vscale x 2 x i1> %pg, <vscale x 2 x i64> %a, <vscale x 2 x i64> %b, <vscale x 2 x i64> %c, <vscale x 2 x i64>* %base) {
+; CHECK-LABEL: and_i64_zero:
+; CHECK:       // %bb.0:
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paulwalker-arm wrote:
> Not sure you need this test given the llvm-mca explicitly emits this bit and based on my general comment do we really want tests like this for every instruction?
Thanks, I think this case can be saved as demo for the improvement of schedule.
Yes, it is not needed for every instruction in the following batch modifying.

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