[PATCH] D140750: [TargetLowering] Teach BuildUDIV to take advantage of leading zeros in the dividend.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:6025
+  unsigned LeadingZeros = 0;
+  if (!VT.isVector() && isa<ConstantSDNode>(N1)) {
+    LeadingZeros = DAG.computeKnownBits(N0).countMinLeadingZeros();
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lebedev.ri wrote:
> Why not vectors?
Baby steps.

Wasn't sure if we need to apply the clip by divisor leading zeros uniformly across the whole vector when there are different divisors which would require another loop over the divisors. Or if we could treat each element individually and apply a clip inside BuildUDIVPattern.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D140750/new/

https://reviews.llvm.org/D140750