The Week Of Monday 9 March 2026 Archives by date

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Starting: Mon Mar 9 00:06:32 PDT 2026
Ending: Sun Mar 15 23:49:40 PDT 2026
Messages: 6123

• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Mikael Holmen via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Aaron Smull via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Aaron Smull via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] 443ce55 - [X86] TableGen-erate SDNode descriptions (#168421)   via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC] Fix spelling mistakes in emitted string replacing word anaylsis with analysis (PR #185233)   Tim Gymnich via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Zachary Yedidia via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Zachary Yedidia via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Steffen Larsen via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Steffen Larsen via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Jan Patrick Lehr via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [llvm] [VectorCombine] Fixing bitcast processing in VectorCombine (PR #185075)   Michal Paszkowski via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [llvm] [RISCV] Move llvm.experimental.cttz.elts tests to rvv folder. NFC (PR #185371)   Luke Lau via llvm-commits
• [llvm] [RISCV] Move llvm.experimental.cttz.elts tests to rvv folder. NFC (PR #185371)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [llvm] 0dad684 - [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (#184807)   via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   Juan Manuel Martinez Caamaño via llvm-commits
• [lldb] [llvm] Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185372)   Jan Patrick Lehr via llvm-commits
• [lldb] [llvm] Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185372)   via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [llvm] [SPIRV] In G_SELECT selection path: replace `removeFromParent` with `eraseFromParent` and return early (PR #184807)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185372)   via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation (PR #185373)   Vikram Hegde via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation (PR #185373)   Vikram Hegde via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation (PR #185373)   Vikram Hegde via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation ? (PR #185373)   Vikram Hegde via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation ? (PR #185373)   via llvm-commits
• [llvm] Add support for large AArch64 binaries. (PR #185374)   Marios Pomonis via llvm-commits
• [llvm] Add support for large AArch64 binaries. (PR #185374)   via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   Nikita Popov via llvm-commits
• [llvm] Add sancov support for large AArch64 binaries. (PR #185374)   Marios Pomonis via llvm-commits
• [llvm] Add sancov support for large AArch64 binaries. (PR #185374)   Marios Pomonis via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   via llvm-commits
• [llvm] [SimplifyCFG] process prof data when remove case in umin (PR #182261)   via llvm-commits
• [lldb] [llvm] Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation ? (PR #185373)   Vikram Hegde via llvm-commits
• [llvm] d0a8fcc - Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (#185372)   via llvm-commits
• [lldb] [llvm] Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185372)   Jan Patrick Lehr via llvm-commits
• [llvm] 78ab602 - [RISCV] Move llvm.experimental.cttz.elts tests to rvv folder. NFC (#185371)   via llvm-commits
• [llvm] [RISCV] Move llvm.experimental.cttz.elts tests to rvv folder. NFC (PR #185371)   Luke Lau via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation ? (PR #185373)   Vikram Hegde via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   Sam Parker via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ci][github][analyzer] Enable Z3 for Clang Static Analyzer on Linux (PR #184695)   Ella Ma via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   Jan Patrick Lehr via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   Sam Parker via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for local enums in CU's enums field (PR #185228)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [RISCV][TTI] Implement cost of llvm.experimental.vector.extract.last.active (PR #184067)   LLVM Continuous Integration via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [lldb] [llvm] Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185372)   LLVM Continuous Integration via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DebugInfo] Fix line 0 records incorrectly having is_stmt set (PR #166627)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [llvm] [DebugInfo] Fix endianness in DW_AT_const_value for constexpr arrays (PR #184804)   Michael Buch via llvm-commits
• [clang] [llvm] Reland "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (PR #184804)   Michael Buch via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   Ricardo Jesus via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   Ricardo Jesus via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [LV] Support float and pointer FindLast reductions (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 2b811f4 - Reland "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (#184804)   via llvm-commits
• [clang] [llvm] Reland "[DebugInfo] Emit DW_AT_const_value for constexpr array static members" (PR #184804)   Shivam Kunwar via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Alexis Engelke via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Alexis Engelke via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Alexis Engelke via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Alexis Engelke via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Alexis Engelke via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Alexis Engelke via llvm-commits
• [llvm] [ConstantFolding] Fix bitcasting vectors with non-integer ratios (PR #179640)   Kacper Doga via llvm-commits
• [llvm] 00efc1e - [NFC] Fix spelling mistakes in emitted string replacing word anaylsis with analysis (#185233)   via llvm-commits
• [llvm] [NFC] Fix spelling mistakes in emitted string replacing word anaylsis with analysis (PR #185233)   Tim Gymnich via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Matt Arsenault via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   Stefan Gränitz via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [llvm] [IV][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [IV][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   via llvm-commits
• [llvm] [IV][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Sietze Riemersma via llvm-commits
• [llvm] [IV][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Sietze Riemersma via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   Matt Arsenault via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   Matt Arsenault via llvm-commits
• [llvm] 38d4509 - AMDGPU: Fix selection failure on fast vector rootn (#185035)   via llvm-commits
• [llvm] AMDGPU: Fix selection failure on fast vector rootn (PR #185035)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   Juan Manuel Martinez Caamaño via llvm-commits
• [lldb] [llvm] Revert "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185372)   LLVM Continuous Integration via llvm-commits
• [llvm] Fix bazel build after #168421 (PR #185387)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build after #168421 (PR #185387)   Karlo Basioli via llvm-commits
• [llvm] 0da00c3 - [LV] Support float and pointer FindLast reductions (#184101)   via llvm-commits
• [llvm] [LV] Support float and pointer FindLast reductions (PR #184101)   Sander de Smalen via llvm-commits
• [llvm] Fix MSVC "not all control paths return a value" warning. NFC. (PR #185388)   Simon Pilgrim via llvm-commits
• [llvm] Fix MSVC "not all control paths return a value" warning. NFC. (PR #185388)   Simon Pilgrim via llvm-commits
• [llvm] [SimplifyCFG] correct and move debug info for mergeConditionalStoreToAddress (PR #180789)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [SimplifyCFG] correct and move debug info for mergeConditionalStoreToAddress (PR #180789)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [compiler-rt] [scudo] Add missing class name specifier in mem_map_fuchsia (PR #185389)   Fabio D'Urso via llvm-commits
• [compiler-rt] [scudo] Add missing class name specifier in mem_map_fuchsia (PR #185389)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Juan Manuel Martinez Caamaño via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Peter Smith via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Francisco Javier Trujillo Mata via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Robert Imschweiler via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Sjoerd Meijer via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Folkert de Vries via llvm-commits
• [llvm] 3e3c3ab - [llvm][tools] Improve llvm-gpu-loader checks (#184791)   via llvm-commits
• [llvm] [llvm][tools] Improve llvm-gpu-loader checks (PR #184791)   Alex Duran via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Folkert de Vries via llvm-commits
• [llvm] AMDGPU: Skip last corrections in afn f64 reciprocal (PR #183696)   Matt Arsenault via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] AMDGPU: Improve fsqrt f64 expansion with ninf (PR #183695)   Matt Arsenault via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   Shivam Gupta via llvm-commits
• [llvm] 57edc20 - [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (#185332)   via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   Shivam Gupta via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   Shivam Gupta via llvm-commits
• [llvm] [NVPTX][NFC] Fix TODO comment style in NVPTXMCAsmInfo.cpp (PR #185332)   via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Sjoerd Meijer via llvm-commits
• [llvm] 4994bce - Fix MSVC "not all control paths return a value" warning. NFC. (#185388)   via llvm-commits
• [llvm] Fix MSVC "not all control paths return a value" warning. NFC. (PR #185388)   Simon Pilgrim via llvm-commits
• [llvm] 56fe909 - kaleidoscope: add missing check in the FunctionAST::codegen (#76322)   via llvm-commits
• [llvm] kaleidoscope: add missing check in the FunctionAST::codegen (PR #76322)   Shivam Gupta via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [lldb] [llvm] [Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC) (PR #184572)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Jay Foad via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kelvin Li via llvm-commits
• [llvm] [Bazel] Fixes 5d52d2f (PR #185395)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [llvm] [Bazel] Fixes 5d52d2f (PR #185395)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [flang] [lldb] [llvm] Extending LLDB to work on AIX (PR #102601)   via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [LoopInfo] Don't recognize loop as parallel if it stores to out-of-loop alloca (PR #180551)   Julius Ikkala via llvm-commits
• [llvm] [AMDGPU] Implement getAddrSpaceCastPreservedPtrMask (PR #182658)   Jay Foad via llvm-commits
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• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Sergio Afonso via llvm-commits
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• [llvm] [VPlan] Explicitly unoll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
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• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   David Sherwood via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   David Sherwood via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Sjoerd Meijer via llvm-commits
• [llvm] [BOLT] Fix test with -DCLANG_DEFAULT_PIE_ON_LINUX=OFF (PR #185047)   Paschalis Mpeis via llvm-commits
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• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
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• [lld] [lld][MachO] Deduplicate branch-extension thunks for ICF-folded symbols (PR #185396)   Zhaoxuan Jiang via llvm-commits
• [llvm] [BOLT] Fix test with -DCLANG_DEFAULT_PIE_ON_LINUX=OFF (PR #185047)   Nikita Popov via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   David Sherwood via llvm-commits
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• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   David Sherwood via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   David Sherwood via llvm-commits
• [llvm] [VPlan] Explicitly unoll replicate-regions without live-outs by VF. (PR #170212)   David Sherwood via llvm-commits
• [llvm] [BOLT] Fix test with -DCLANG_DEFAULT_PIE_ON_LINUX=OFF (PR #185047)   Paschalis Mpeis via llvm-commits
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• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [AMDGPU] Fix crash with dead frame indices in debug values (PR #183297)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
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• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Xavier Roche via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
• [llvm] [X86] known-pow2.ll - add srl vector test for #182562 (PR #185405)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-pow2.ll - add srl vector test for #182562 (PR #185405)   Simon Pilgrim via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
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• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Diana Picus via llvm-commits
• [llvm] [X86] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [clang] [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
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• [clang] [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [clang] [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   via llvm-commits
• [clang] [llvm] [SimplifyLibCalls] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [clang] [llvm] [InstCombine] Combine sin/cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   David Sherwood via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   Stefan Gränitz via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [SLP]Invalid cost for non-power-of-2 bswaps (PR #185407)   Alexey Bataev via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   Stefan Gränitz via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Paul Walker via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] 70e49d8 - [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (#183532)   via llvm-commits
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• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   Hussam Alhassan via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   David Sherwood via llvm-commits
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• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
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• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [X86] known-pow2.ll - add srl vector test for #182562 (PR #185405)   Simon Pilgrim via llvm-commits
• [llvm] 914df0e - [X86] known-pow2.ll - add srl vector test for #182562 (#185405)   via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Björn Pettersson via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   David Sherwood via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [BOLT] Fix test with -DCLANG_DEFAULT_PIE_ON_LINUX=OFF (PR #185047)   Nikita Popov via llvm-commits
• [llvm] [NFC][AArch64] Improve semantics of findSuitableCompare in ConditionOptimizer (PR #183532)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make GCNHazardRecognizer "check" functions const. NFC. (PR #185416)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make GCNHazardRecognizer "check" functions const. NFC. (PR #185416)   via llvm-commits
• [llvm] [AMDGPU] Make GCNHazardRecognizer "check" functions const. NFC. (PR #185416)   Jay Foad via llvm-commits
• [llvm] [flang-rt] Fix EXECUTE_COMMAND_LINE() on Windows (PR #184875)   Michael Kruse via llvm-commits
• [llvm] [AArch64] Add extra sched predicates (PR #184801)   David Green via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
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• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   via llvm-commits
• [llvm] AMDGPU: Annotate group size ABI loads with range metadata (PR #185420)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] AMDGPU: Annotate group size ABI loads with range metadata (PR #185420)   Matt Arsenault via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] AMDGPU: Annotate group size ABI loads with range metadata (PR #185420)   Matt Arsenault via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   John Brawn via llvm-commits
• [llvm] AMDGPU: Annotate group size ABI loads with range metadata (PR #185420)   via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Sjoerd Meijer via llvm-commits
• [llvm] [lit] Add JSON diffing support to lit (PR #177513)   Balázs Benics via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [SLP]Invalid cost for non-power-of-2 bswaps (PR #185407)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Philipp Rados via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Dmitry Sidorov via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make GCNHazardRecognizer "check" functions const. NFC. (PR #185416)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Marcos Maronas via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-neative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Jay Foad via llvm-commits
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• [llvm] [AMDGPU] Make GCNHazardRecognizer "check" functions const. NFC. (PR #185416)   Jay Foad via llvm-commits
• [llvm] 3286c4c - [AMDGPU] Fix incorrect check prefixes in some MC tests (#185015)   via llvm-commits
• [llvm] [AMDGPU] Fix incorrect check prefixes in some MC tests (PR #185015)   Jay Foad via llvm-commits
• [llvm] [llvm][tools] Exted llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
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• [llvm] Prevent undefined behavior caused by combination of branch and load delay slots on MIPS1 (PR #185427)   via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [flang-rt] Fix EXECUTE_COMMAND_LINE() on Windows (PR #184875)   Eugene Epshteyn via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   Hussam Alhassan via llvm-commits
• [llvm] 51a9052 - [X86] Extract select to min/max combining into separate function (NFC)   Nikita Popov via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   Hussam Alhassan via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [llvm] Prevent undefined behavior caused by combination of branch and load delay slots on MIPS1 (PR #185427)   via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [flang-rt] Fix EXECUTE_COMMAND_LINE() on Windows (PR #184875)   Yi Wu via llvm-commits
• [llvm] [AArch64] Fold BUILD_VECTORs splats into users by using SVE immediates (PR #165559)   Sander de Smalen via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [llvm] Prevent undefined behavior caused by combination of branch and load delay slots on MIPS1 (PR #185427)   via llvm-commits
• [llvm] [SandboxVec][SeedCollection] Support pass argument for enabling different types (PR #155079)   Jan Patrick Lehr via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   Hussam Alhassan via llvm-commits
• [clang] [llvm] [llvm][tools] Exted llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [clang-tools-extra] [llvm] [Hexagon] Enable TSFlags2 usage (PR #183767)   Fateme Hosseini via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (PR #137549)   Robert Imschweiler via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Fix close map flag propagation for derived types in USM (PR #185330)   via llvm-commits
• [llvm] [Support] Improve jobserver concurrency handling (PR #178434)   Yaxun Liu via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [Hexagon] Add new register input/output types for qf instructions (PR #184398)   Fateme Hosseini via llvm-commits
• [flang] [llvm] [Flang][OpenMP] Fix close map flag propagation for derived types in USM (PR #185330)   Kareem Ergawy via llvm-commits
• [llvm] [Bazel] Fixes 5d52d2f (PR #185395)   Jordan Rupprecht via llvm-commits
• [llvm] [Bazel] Fixes 5d52d2f (PR #185395)   Jordan Rupprecht via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (alternative to #137549) (PR #185436)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   Manuel Carrasco via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [MVEGatherScatter] Fix GEP scale calculations (PR #185437)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [InstCombine] Canonicalize GEP source element types (PR #180745)   Nikita Popov via llvm-commits
• [llvm] [MVEGatherScatter] Fix GEP scale calculations (PR #185437)   via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [MVEGatherScatter] Fix GEP scale calculations (PR #185437)   via llvm-commits
• [llvm] [AArch64] Remove dangling function declaration in AArch64PointerAuth (PR #185439)   Victor Campos via llvm-commits
• [llvm] Introduction of typified section in ExtBinary format (PR #166553)   Sergey Shcherbinin via llvm-commits
• [llvm] d15ca01 - [gn] port 58efc426d70 (de-plugin lldb ItaniumABI)   Nico Weber via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ehsan Amiri via llvm-commits
• [llvm] 0da2aec - [SLP]Invalid cost for non-power-of-2 bswaps (#185407)   via llvm-commits
• [llvm] [SLP]Invalid cost for non-power-of-2 bswaps (PR #185407)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   Alexey Bataev via llvm-commits
• [libc] [llvm] Sinbf16 add (PR #185441)   via llvm-commits
• [llvm] c3d040b - [gn] port 443ce5569ee9854c (X86 SDNodeInfo)   Nico Weber via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Alexander Kornienko via llvm-commits
• [libc] [llvm] Sinbf16 add (PR #185441)   via llvm-commits
• [clang] [llvm] [llvm][tools] Exted llvm-objdump to support nested OffloadBinaries (PR #185425)   via llvm-commits
• [clang] [llvm] [llvm][tools] Exted llvm-objdump to support nested OffloadBinaries (PR #185425)   via llvm-commits
• [libc] [llvm] [libc][math][c23] sinbf16 function (PR #185441)   via llvm-commits
• [libc] [llvm] [libc][math][c23] sinbf16 function (PR #185441)   via llvm-commits
• [libc] [llvm] [libc][math][c23] sinbf16 function (PR #185441)   via llvm-commits
• [llvm] DAGCombiner::visitBITCAST: CastLoad strip AssertNoFPClass (PR #184952)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   YunQiang Su via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Peter Klausler via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   YunQiang Su via llvm-commits
• [libc] [llvm] [libc][math][c23] sinbf16 function (PR #185441)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Peter Klausler via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   Hussam Alhassan via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   Christudasan Devadasan via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve cmp adjustment semantics (PR #185426)   Hussam Alhassan via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   Alexandros Lamprineas via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Dmitry Sidorov via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   Jay Foad via llvm-commits
• [llvm] [ARM] Custom lower abdu and abds (PR #182696)   via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   YunQiang Su via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Jay Foad via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Kelvin Li via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Mircea Trofin via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Mircea Trofin via llvm-commits
• [llvm] [MVEGatherScatter] Fix GEP scale calculations (PR #185437)   John Brawn via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Mircea Trofin via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Mircea Trofin via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Mircea Trofin via llvm-commits
• [clang] [compiler-rt] halt_on_error flag for TySan and docs (PR #182479)   Matthew Nagy via llvm-commits
• [clang] [compiler-rt] halt_on_error flag for TySan and docs (PR #182479)   Matthew Nagy via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [compiler-rt] 2a9372f - halt_on_error flag for TySan and docs (#182479)   via llvm-commits
• [clang] [compiler-rt] halt_on_error flag for TySan and docs (PR #182479)   Matthew Nagy via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] AMDGPU: Annotate group size ABI loads with range metadata (PR #185420)   Krzysztof Drewniak via llvm-commits
• [llvm] c0a3996 - [gn] port 443ce5569ee9854c more   Nico Weber via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   Alexandros Lamprineas via llvm-commits
• [compiler-rt] [scudo] Add missing class name specifier in mem_map_fuchsia (PR #185389)   Sadaf Ebrahimi via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] e4580d2 - [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (#184946)   via llvm-commits
• [llvm] [SandboxVec][DAG] Fix unscheduled succs when nodes are scheduled (PR #184946)   via llvm-commits
• [llvm] 013bdbe - [MVEGatherScatter] Fix GEP scale calculations (#185437)   via llvm-commits
• [llvm] [MVEGatherScatter] Fix GEP scale calculations (PR #185437)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [Hexagon] Add new register input/output types for qf instructions (PR #184398)   Sergei Larin via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Peter Smith via llvm-commits
• [llvm] 43a0e59 - [Hexagon] Add new register input/output types for qf instructions (#184398)   via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ryotaro Kasuga via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [AArch64] Remove dangling function declaration in AArch64PointerAuth (PR #185439)   Victor Campos via llvm-commits
• [llvm] [InstCombine] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] [Hexagon] Add new register input/output types for qf instructions (PR #184398)   Fateme Hosseini via llvm-commits
• [llvm] [AArch64] Remove dangling function declaration in AArch64PointerAuth (PR #185439)   via llvm-commits
• [llvm] AMDGPU: Annotate group size ABI loads with range metadata (PR #185420)   Matt Arsenault via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [TableGen] Fix ordering of register classes with artificial members. (PR #185448)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] [TableGen] Fix ordering of register classes with artificial members. (PR #185448)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [NVPTX] Support lowering of `(l)lround` (PR #183901)   Balaji Krishna Yugandhar Atukuri via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   David Green via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   David Green via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   David Green via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (alternative to #137549) (PR #185436)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (alternative to #137549) (PR #185436)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (alternative to #137549) (PR #185436)   Frederik Harwath via llvm-commits
• [llvm] AMDGPU: Annotate group size ABI loads with range metadata (PR #185420)   Krzysztof Drewniak via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] [TableGen] Fix ordering of register classes with artificial members. (PR #185448)   Jay Foad via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Craig Topper via llvm-commits
• [llvm] [arm64ec] Fix missing sret return in Arm64EC entry thunks for large struct returns (PR #185452)   Daniel Paoliello via llvm-commits
• [llvm] [arm64ec] Fix missing sret return in Arm64EC entry thunks for large struct returns (PR #185452)   via llvm-commits
• [llvm] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Dharuni R Acharya via llvm-commits
• [llvm] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Dharuni R Acharya via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   via llvm-commits
• [llvm] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   via llvm-commits
• [llvm] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Dharuni R Acharya via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Ivan Kosarev via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Craig Topper via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Craig Topper via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   Alexandros Lamprineas via llvm-commits
• [llvm] [SLP] Check the Operands of Copyable elements as well in getBestOperand() (PR #182443)   Ryan Buchner via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [AMDGPU] IGLP: Fix static variables (alternative to #137549) (PR #185436)   Jeffrey Byrnes via llvm-commits
• [llvm] 2e3bff6 - [DA] Test AddRecs are nsw before strong SIV test (#183421)   via llvm-commits
• [llvm] [DA] Test AddRecs are nsw before strong SIV test (PR #183421)   Ehsan Amiri via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Andrei Elovikov via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   via llvm-commits
• [llvm] [X86] Enable i256 fshl/fshr lowering on avx512 targets (PR #185455)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   Maryam Moghadas via llvm-commits
• [llvm] [X86] Enable i256 fshl/fshr lowering on avx512 targets (PR #185455)   via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Mirko Brkušanin via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Mirko Brkušanin via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Craig Topper via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Craig Topper via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Craig Topper via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Craig Topper via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Craig Topper via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Paschalis Mpeis via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Craig Topper via llvm-commits
• [llvm] ffdb484 - [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (#182630)   via llvm-commits
• [llvm] [InstCombine/RISCV] Constant-fold bitcast(vmv.v.x) (PR #182630)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Min-Yih Hsu via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new fdot instructions (PR #184659)   Sander de Smalen via llvm-commits
• [llvm] [IV][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Craig Topper via llvm-commits
• [llvm] [IV][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Craig Topper via llvm-commits
• [llvm] [mlir] [OpenMP][MLIR] Fix GPU teams reduction buffer size for by-ref reductions (PR #185460)   Jeff Sandoval via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [llvm] [mlir] [OpenMP][MLIR] Fix GPU teams reduction buffer size for by-ref reductions (PR #185460)   via llvm-commits
• [llvm] [mlir] [OpenMP][MLIR] Fix GPU teams reduction buffer size for by-ref reductions (PR #185460)   via llvm-commits
• [llvm] [mlir] [OpenMP][MLIR] Fix GPU teams reduction buffer size for by-ref reductions (PR #185460)   via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Craig Topper via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   David Blaikie via llvm-commits
• [llvm] [X86] Fix wrong ImmT in several instructions and add assertion (PR #185461)   Fangrui Song via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Alina Sbirlea via llvm-commits
• [llvm] [X86] Fix wrong ImmT in several instructions and add assertion (PR #185461)   via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Jay Foad via llvm-commits
• [llvm] [LSR][RFC] Improve LCSSA preservation ? (PR #185373)   Vikram Hegde via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Derek Schuff via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Peter Smith via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Peter Smith via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Peter Smith via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Peter Smith via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64] Fold BUILD_VECTORs splats into users by using SVE immediates (PR #165559)   Benjamin Maxwell via llvm-commits
• [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [DirectX] Split long vectors in DXILResourceAccess (PR #184732)   Farzon Lotfi via llvm-commits
• [llvm] [cmake] use target names instead of legacy variables (PR #185463)   Andrew Marshall via llvm-commits
• [llvm] Use zlib cmake target rather than variables (PR #90322)   Andrew Marshall via llvm-commits
• [llvm] Use zlib cmake target rather than variables (PR #90322)   Andrew Marshall via llvm-commits
• [llvm] [cmake] use target names instead of legacy variables (PR #185463)   via llvm-commits
• [llvm] [NFC] Migrate NVPTX specific debug info code to separate class (PR #184709)   Laxman Sole via llvm-commits
• [llvm] [NFC] Migrate NVPTX specific debug info code to separate class (PR #184709)   Laxman Sole via llvm-commits
• [llvm] [MTE] [HWASan] do not remove lifetimes for unterminated lifetime (PR #184387)   Florian Mayer via llvm-commits
• [llvm] 2d6124c - [MTE] [HWASan] do not remove lifetimes for unterminated lifetime   via llvm-commits
• [llvm] [MTE] [HWASan] do not remove lifetimes for unterminated lifetime (PR #184387)   Florian Mayer via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Derek Schuff via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] 83c55c3 - [SandboxVec][NFC] Precommit test   Vasileios Porpodas via llvm-commits
• [llvm] c4431d4 - [TableGen] Fix ordering of register classes with artificial members. (#185448)   via llvm-commits
• [llvm] [TableGen] Fix ordering of register classes with artificial members. (PR #185448)   Ivan Kosarev via llvm-commits
• [llvm] [SelectionDAG] Second SimplifyDemandedBits pass for AND RHS using LHS known zeros (scalar only) (PR #185235)   Jay Foad via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [lld] [lld][MachO] Deduplicate branch-extension thunks for ICF-folded symbols (PR #185396)   Ellis Hoag via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Aaron Smull via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] 7fd291b - [GOFF] Set reference to ADA (#179734)   via llvm-commits
• [llvm] [SandboxVec][BottomUpVec] Improve handling of external uses (PR #185468)   via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [SandboxVec][BottomUpVec] Improve handling of external uses (PR #185468)   via llvm-commits
• [compiler-rt] [scudo] Add missing class name specifier in mem_map_fuchsia (PR #185389)   Roland McGrath via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Aleksandr Popov via llvm-commits
• [llvm] [SampleProfileMatcher] Match IR direct calls against profile indirect calls (PR #183631)   Wei Wang via llvm-commits
• [llvm] [SandboxVec][BottomUpVec] Improve handling of external uses (PR #185468)   via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Kai Nacke via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Mirko Brkušanin via llvm-commits
• [llvm] [AArch64] Fold BUILD_VECTORs splats into users by using SVE immediates (PR #165559)   via llvm-commits
• [llvm] [AArch64] Fold BUILD_VECTORs splats into users by using SVE immediates (PR #165559)   via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] fix Inefficient std::bit_floor(x) (PR #183361)   zhijian lin via llvm-commits
• [llvm] [SandboxVec][BottomUpVec] Improve handling of external uses (PR #185468)   via llvm-commits
• [llvm] [AArch64] Fold BUILD_VECTORs splats into users by using SVE immediates (PR #165559)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [compiler-rt] ae8f614 - [scudo] Add missing class name specifier in mem_map_fuchsia (#185389)   via llvm-commits
• [compiler-rt] [scudo] Add missing class name specifier in mem_map_fuchsia (PR #185389)   Fabio D'Urso via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] f7a48fb - [PowerPC] Add AMO load with Compare and Swap Not Equal (#178061)   via llvm-commits
• [clang] [llvm] Add AMO load with Compare and Swap Not Equal (PR #178061)   Maryam Moghadas via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Mirko Brkušanin via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] [AArch64] Specify SETCCCARRY as custom for MVT::i32 on AArch64 (PR #185477)   via llvm-commits
• [llvm] [AArch64] Specify SETCCCARRY as custom for MVT::i32 on AArch64 (PR #185477)   via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AArch64] Specify SETCCCARRY as custom for MVT::i32 on AArch64 (PR #185477)   via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Min-Yih Hsu via llvm-commits
• [llvm] 89d150a - [TableGen] Add let append/prepend syntax for field concatenation (#182382)   via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Min-Yih Hsu via llvm-commits
• [llvm] [TableGen] Add let append/prepend syntax for field concatenation (PR #182382)   Henrich Lauko via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] b7a0445 - [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (#184601)   via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   Matt Arsenault via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [clang] [llvm] [RFC] Better devirtualization for non-virtual interface (PR #185087)   Nikita Taranov via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_INTRINSIC_FPTRUNC_ROUND (PR #185491)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_INTRINSIC_FPTRUNC_ROUND (PR #185491)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_INTRINSIC_FPTRUNC_ROUND (PR #185491)   via llvm-commits
• [llvm] [mlir] [mlir][lsp] Use rootUri and rootPath for source files (PR #185479)   via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   Serge Pavlov via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Akshay Deodhar via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Akshay Deodhar via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   Łukasz Plewa via llvm-commits
• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   via llvm-commits
• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   Łukasz Plewa via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Igor Kudrin via llvm-commits
• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   Nick Sarnie via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   via llvm-commits
• [llvm] X86: Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor boilerplate NFC (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] 19a31b2 - [VectorCombine] Fixing bitcast processing in VectorCombine (#185075)   via llvm-commits
• [llvm] [VectorCombine] Fixing bitcast processing in VectorCombine (PR #185075)   Michal Paszkowski via llvm-commits
• [llvm] [VectorCombine] Fixing bitcast processing in VectorCombine (PR #185075)   via llvm-commits
• [llvm] [Offload][AMDGPU] Fix RPC server on mixed w32 w64 workloads (PR #185496)   Matt Arsenault via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   Meredith Julian via llvm-commits
• [compiler-rt] 3e9808b - [scudo] Use a fixed format for the milliseconds in latest release. (#185097)   via llvm-commits
• [compiler-rt] [scudo] Use a fixed format for the milliseconds in latest release. (PR #185097)   Christopher Ferris via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [Offload][AMDGPU] Fix RPC server on mixed w32 w64 workloads (PR #185496)   Joseph Huber via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] fa23f91 - [InstSimplify] Test Simplify and/or of trunc nuw to i1 with op replacement (NFC)   Andreas Jonson via llvm-commits
• [llvm] dacb629 - [InstSimplify] Simplify and/or of trunc nuw to i1 with op replacement   Andreas Jonson via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [SampleProfile] Skip counting mismatched weak symbols during profile loading (PR #185514)   via llvm-commits
• [llvm] [NFC][AMDGPU] Add debug print to `AMDGPULowerVGPREncoding.cpp` (PR #185331)   Shilei Tian via llvm-commits
• [llvm] [SampleProfile] Skip counting mismatched weak symbols during profile loading (PR #185514)   via llvm-commits
• [llvm] [Codegen, X86] Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [llvm] 6e8e8ea - Revert "[InstSimplify] Simplify and/or of trunc nuw to i1 with op replacement"   Andreas Jonson via llvm-commits
• [flang] [llvm] [flang][cuda][NFC] Add filename and line number in error reporting (PR #185516)   Valentin Clement バレンタイン クレメン via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Paul Kirth via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Paul Kirth via llvm-commits
• [llvm] [LIT] Fix env without subcommand causing early return in pipeline (PR #184028)   Paul Kirth via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Drew Kersnar via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   Vigneshwar Jayakumar via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Joseph Huber via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Nikita Popov via llvm-commits
• [llvm] [PowerPC][NFC] Clean up code in RegisterInfo.td (PR #185520)   Lei Huang via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [WebAssembly] Fold vselect(cond, vnot(x), zero) to v128.andnot (PR #184949)   Derek Schuff via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   Stefan Mada via llvm-commits
• [llvm] [LLVM] Fix assertion when dropping type tests with SelectInst users (PR #185523)   Paul Kirth via llvm-commits
• [llvm] [LLVM] Fix assertion when dropping type tests with SelectInst users (PR #185523)   Paul Kirth via llvm-commits
• [llvm] [LLVM] Fix assertion when dropping type tests with SelectInst users (PR #185523)   Paul Kirth via llvm-commits
• [llvm] [LLVM] Fix assertion when dropping type tests with SelectInst users (PR #185523)   Paul Kirth via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Use ExpandIntRes_CLMUL to expand vector CLMUL via narrower legal types (PR #184468)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   Petr Hosek via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Add `half` type overloads to `mul` and exercise them (PR #185506)   Farzon Lotfi via llvm-commits
• [llvm] 331a91c - [NFC][AMDGPU] Add debug print to `AMDGPULowerVGPREncoding.cpp` (#185331)   via llvm-commits
• [llvm] [NFC][AMDGPU] Add debug print to `AMDGPULowerVGPREncoding.cpp` (PR #185331)   Shilei Tian via llvm-commits
• [llvm] 1324ea1 - [WebAssembly] Fold any/alltrue SIMD boolean reductions with eqz (#184704)   via llvm-commits
• [llvm] [WebAssembly] Fold any/alltrue SIMD boolean reductions with eqz (PR #184704)   Derek Schuff via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [X86] Avoid trunc/zext in narrow shift by working over i32 (PR #185539)   Gergo Stomfai via llvm-commits
• [llvm] [X86] Avoid trunc/zext in narrow shift by working over i32 (PR #185539)   via llvm-commits
• [llvm] [X86] Avoid trunc/zext in narrow shift by working over i32 (PR #185539)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [llvm] [IR] Add BooleanMap matcher (PR #184463)   Gergo Stomfai via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   via llvm-commits
• [llvm] [SampleProfileMatcher] Add direct basename early matching for orphan functions (PR #184409)   Wei Wang via llvm-commits
• [llvm] [RFC][llvm] Added llvm.loop.vectorize.reassociate_fpreductions.enable metadata. (PR #141685)   Slava Zakharin via llvm-commits
• [llvm] [RFC][llvm] Added llvm.loop.vectorize.reassociate_fpreductions.enable metadata. (PR #141685)   Slava Zakharin via llvm-commits
• [llvm] [AMDGPU] Replace undef with poison in exp/exp2/exp10 cost tests NFC (PR #185527)   LLVM Continuous Integration via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   YunQiang Su via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   YunQiang Su via llvm-commits
• [llvm] [BOLT] Speed up dataflow analysis with RPO (PR #183704)   Haibo Jiang via llvm-commits
• [llvm] [InstCombine] Fold extended add/sub of the same type (PR #185259)   via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Elvis Wang via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Aiden Grossman via llvm-commits
• [lld] [lld][MachO] Deduplicate branch-extension thunks for ICF-folded symbols (PR #185396)   via llvm-commits
• [llvm] [DWARFLinker] Fix DW_AT_LLVM_stmt_sequence attributes patched to wrong offsets (PR #178486)   via llvm-commits
• [llvm] [DWARFLinker] Fix DW_AT_LLVM_stmt_sequence attributes patched to wrong offsets (PR #178486)   via llvm-commits
• [lld] 34b2de9 - [lld][MachO] Deduplicate branch-extension thunks for ICF-folded symbols (#185396)   via llvm-commits
• [lld] [lld][MachO] Deduplicate branch-extension thunks for ICF-folded symbols (PR #185396)   Kyungwoo Lee via llvm-commits
• [llvm] [DWARFLinker] Fix DW_AT_LLVM_stmt_sequence attributes patched to wrong offsets (PR #178486)   via llvm-commits
• [llvm] [DWARFLinker] Fix DW_AT_LLVM_stmt_sequence attributes patched to wrong offsets (PR #178486)   via llvm-commits
• [llvm] [DirectX] Fix assertion in PointerTypeAnalysis with empty global_ctors (PR #179034)   Kaitlin Peng via llvm-commits
• [llvm] [DirectX] Fix assertion in PointerTypeAnalysis with empty global_ctors (PR #179034)   Kaitlin Peng via llvm-commits
• [llvm] 3545e51 - Revert "AMDGPU: Annotate group size ABI loads with range metadata (#185420)" (#185521)   via llvm-commits
• [llvm] Revert "AMDGPU: Annotate group size ABI loads with range metadata (#185420)" (PR #185521)   Matt Arsenault via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   via llvm-commits
• [llvm] [RISCV] Handle sign_extend of i32 in insert_vector_elt for RV32 (PR #185548)   Jim Lin via llvm-commits
• [llvm] [RISCV] Handle sign_extend of i32 in insert_vector_elt for RV32 (PR #185548)   via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   via llvm-commits
• [llvm] eebc390 - [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (#184997)   via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for the Weak Zero SIV tests miss dependency (NFC) (PR #184998)   Ryotaro Kasuga via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   Jim Lin via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   Jim Lin via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Igor Kudrin via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Igor Kudrin via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Igor Kudrin via llvm-commits
• [llvm] [X86] fuse constant addition after sbb (PR #184541)   Takashi Idobe via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   Takashi Idobe via llvm-commits
• [llvm] [DA] Fix overflows when calculating Delta in the Weak Zero SIV tests (PR #184997)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [RISCV] Make Zbc imply Zbkc. (PR #185543)   Jim Lin via llvm-commits
• [llvm] [IA][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [compiler-rt] [copmiler-rt] Initial support for building profile library on the GPU (PR #185552)   Joseph Huber via llvm-commits
• [compiler-rt] [copmiler-rt] Initial support for building profile library on the GPU (PR #185552)   via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Joseph Huber via llvm-commits
• [llvm] [Mips] Fix $gp was restored when used as global register variable (PR #184975)   via llvm-commits
• [llvm] [IA][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   Levi Laine via llvm-commits
• [llvm] [DA] Add tests for the Weak Zero SIV tests miss dependency (NFC) (PR #184998)   Ryotaro Kasuga via llvm-commits
• [llvm] [IA][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [IA][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [DA] Fix test case for the Weak Zero SIV tests (NFC) (PR #185555)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix test case for the Weak Zero SIV tests (NFC) (PR #185555)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Fix test case for the Weak Zero SIV tests (NFC) (PR #185555)   via llvm-commits
• [llvm] [DA] Fix test case for the Weak Zero SIV tests (NFC) (PR #185555)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Weibo He via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Weibo He via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Weibo He via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Weibo He via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Weibo He via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [clang] [llvm] [RISCV] Make Zbc imply Zbkc. (PR #185543)   Craig Topper via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Craig Topper via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Zhaoxuan Jiang via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] [RISCV] Handle sign_extend of i32 in insert_vector_elt for RV32 (PR #185548)   Craig Topper via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Craig Topper via llvm-commits
• [llvm] [bazel] Explicitly disable pfm shared lib (PR #185542)   Jordan Rupprecht via llvm-commits
• [clang] [llvm] [RISCV] Make Zbc imply Zbkc. (PR #185543)   Pengcheng Wang via llvm-commits
• [llvm] 12de945 - [InferAS][NFC] Improve documentation for getAddrSpaceCastPreservedPtrMask (#185239)   via llvm-commits
• [llvm] [InferAS][NFC] Improve documentation for getAddrSpaceCastPreservedPtrMask (PR #185239)   Luo Yuanke via llvm-commits
• [llvm] [IA][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Chuanqi Xu via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Pengcheng Wang via llvm-commits
• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   via llvm-commits
• [llvm] [X86] Fix assertion when lowering FP_ROUND (PR #185562)   Aiden Grossman via llvm-commits
• [llvm] [X86] Fix assertion when lowering FP_ROUND (PR #185562)   via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Aiden Grossman via llvm-commits
• [llvm] [OpenMP][NFC] Fix stale DeviceRTL header path in OpenMPIRBuilder (PR #185563)   Muyao Xiao via llvm-commits
• [llvm] [OpenMP][NFC] Fix stale DeviceRTL header path in OpenMPIRBuilder (PR #185563)   via llvm-commits
• [clang] [llvm] [RFC][Coroutines] Implement HALO for coroutines that flow off final suspend (PR #185336)   Weibo He via llvm-commits
• [llvm] [OpenMP][NFC] Fix stale DeviceRTL header path in OpenMPIRBuilder (PR #185563)   via llvm-commits
• [llvm] [OpenMP][NFC] Fix stale DeviceRTL header path in OpenMPIRBuilder (PR #185563)   Muyao Xiao via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Sam Elliott via llvm-commits
• [llvm] 41ef3d0 - [FastISel] Lower call instruction with illegal type returned (#180322)   via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [clang] [llvm] [RISCV] Make Zbc imply Zbkc. (PR #185543)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Make Zbc imply Zbkc. (PR #185543)   Sam Elliott via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Alex Rønne Petersen via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Shilei Tian via llvm-commits
• [llvm] [X86] Fix assertion when lowering FP_ROUND (PR #185562)   Phoebe Wang via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Bill Wendling via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   Farzon Lotfi via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Bill Wendling via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Bill Wendling via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Bill Wendling via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Bill Wendling via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Farzon Lotfi via llvm-commits
• [llvm] 5464d68 - [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic (#184645)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic (PR #184645)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [llvm] [mlir] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   Brian Cain via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   Farzon Lotfi via llvm-commits
• [llvm] [TableGen] Complete the support for artificial registers (PR #183371)   Mikael Holmen via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   Muhammad Bassiouni via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Luke Lau via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Luke Lau via llvm-commits
• [llvm] [doc][RISCV] Add documentation for customizing VCIX scheduling info (PR #183129)   Luke Lau via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [LoongArch] Try to avoid casts around logical vector ops on lasx (PR #163523)   Zhaoxin Yang via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Luke Lau via llvm-commits
• [llvm] a266f60 - [SelectionDAG] Remove `NoNaNsFPMath` uses (#183448)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoNaNsFPMath` uses (PR #183448)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor dmul family to header-only (PR #182151)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [hlsl][dxil][spirv] Add `fma` function (PR #185304)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Luke Lau via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Farzon Lotfi via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Kito Cheng via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Kito Cheng via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Kito Cheng via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [llvm] a682073 - Fixing upper lane return source for X86 intrinsics (#185329)   via llvm-commits
• [llvm] Fixing upper lane return source for X86 intrinsics (PR #185329)   Phoebe Wang via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Farzon Lotfi via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Petr Hosek via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Fangrui Song via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Petr Hosek via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Petr Hosek via llvm-commits
• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Phoebe Wang via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan][PseudoProbe] Fix `pseudoprobe` duplication when `VF=1` (PR #185238)   David Sherwood via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Petr Hosek via llvm-commits
• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Make zvknha a subset of zvknhb (PR #178680)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Petr Hosek via llvm-commits
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• [clang] [llvm] [RISCV] Make zvknha a subset of zvknhb (PR #178680)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Phoebe Wang via llvm-commits
• [llvm] [MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (PR #185164)   Fangrui Song via llvm-commits
• [llvm] [MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (PR #185164)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix wrong ImmT in several instructions and add assertion (PR #185461)   Fangrui Song via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Alexis Engelke via llvm-commits
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• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Alexis Engelke via llvm-commits
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• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Alexis Engelke via llvm-commits
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• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Fold Fold zext-add/sub-min/max-trunc to uadd.sat or usub.sat (PR #185259)   via llvm-commits
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• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold Fold zext-add/sub-min/max-trunc to uadd.sat or usub.sat (PR #185259)   via llvm-commits
• [llvm] [RISCV] Refactor lowerBUILD_VECTOR splat opcode selection to avoid duplication. NFC. (PR #185573)   Pengcheng Wang via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   Elvis Wang via llvm-commits
• [llvm] [X86][GISEL] Port X86PostLegalizerCombiner to npm (PR #182787)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   Elvis Wang via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   via llvm-commits
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• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Fangrui Song via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Ralf Jung via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   Elvis Wang via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [NFC][LAI] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [X86][Gisel] add trivial arith tests for gisel x86-prelegalizer-combiner (PR #183544)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Enable CSA for RISCV EVL tail-folding with scalable vector. (PR #184068)   Florian Hahn via llvm-commits
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• [llvm] [X86] Fix fcmp+select to min/max lowering (PR #185594)   Nikita Popov via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] c1f3cb7 - [RISCV] Make zvknha a subset of zvknhb (#178680)   via llvm-commits
• [clang] [llvm] [RISCV] Make zvknha a subset of zvknhb (PR #178680)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] Fix fcmp+select to min/max lowering (PR #185594)   Nikita Popov via llvm-commits
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• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Ralf Jung via llvm-commits
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• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Ralf Jung via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [X86] Fix fcmp+select to min/max lowering (PR #185594)   Nikita Popov via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Ádám Kallai via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Ádám Kallai via llvm-commits
• [llvm] [X86] Fix fcmp+select to min/max lowering (PR #185594)   Nikita Popov via llvm-commits
• [llvm] [Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Phoebe Wang via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Mel Chen via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   Arseniy Obolenskiy via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Mel Chen via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Mel Chen via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] Fix fcmp+select to min/max lowering (PR #185594)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   via llvm-commits
• [llvm] [InstCombine] Fold Fold zext-add/sub-min/max-trunc to uadd.sat or usub.sat (PR #185259)   via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   via llvm-commits
• [llvm] [SDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
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• [llvm] [SDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   via llvm-commits
• [llvm] [SDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Florian Hahn via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [SDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Chuanqi Xu via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nuno Lopes via llvm-commits
• [llvm] [SDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   Liao Chunyu via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Nuno Lopes via llvm-commits
• [llvm] SelectionDAG: Use ISD::AssertNoFPClass for Load with nofpclass metadata (PR #184952)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Add disable-output to tests using vplan-print-after. (PR #184586)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add disable-output to tests using vplan-print-after. (PR #184586)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add disable-output to tests using vplan-print-after. (PR #184586)   Florian Hahn via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Remove dangling function declaration in AArch64PointerAuth (PR #185439)   Anatoly Trosinenko via llvm-commits
• [llvm] [X86] Enable i256 fshl/fshr lowering on avx512 targets (PR #185455)   Simon Pilgrim via llvm-commits
• [llvm] 53d6945 - [LangRef] Specify semantics for non-byte-sized loads and stores (#180739)   via llvm-commits
• [llvm] [LangRef] Specify semantics for non-byte-sized loads and stores (PR #180739)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   David Sherwood via llvm-commits
• [llvm] 335084f - [VPlan] Add disable-output to tests using vplan-print-after. (#184586)   via llvm-commits
• [llvm] [VPlan] Add disable-output to tests using vplan-print-after. (PR #184586)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   via llvm-commits
• [llvm] [X86] Use CUR_DIRECTION constant in more places. NFC (PR #185571)   Simon Pilgrim via llvm-commits
• [llvm] [SimplifyLibCalls] Avoid simplifying pow(x, 2.0) -> x * x with math-errno. (PR #183099)   Ricardo Jesus via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   Arseniy Obolenskiy via llvm-commits
• [llvm] AMDGPU: Annotate grid_dims ABI load with range metadata (PR #185610)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Annotate grid_dims ABI load with range metadata (PR #185610)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Annotate grid_dims ABI load with range metadata (PR #185610)   via llvm-commits
• [llvm] AMDGPU: Annotate grid_dims ABI load with range metadata (PR #185610)   Matt Arsenault via llvm-commits
• [llvm] 04abe44 - [X86] Enable i256 fshl/fshr lowering on avx512 targets (#185455)   via llvm-commits
• [llvm] [X86] Enable i256 fshl/fshr lowering on avx512 targets (PR #185455)   Simon Pilgrim via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   Luke Lau via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   Luke Lau via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   Luke Lau via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   Stefan Gränitz via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_INTRINSIC_FPTRUNC_ROUND (PR #185491)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for atomic fmin/fmax num (PR #185504)   Petar Avramovic via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SelectionDAG] Expand CTTZ_ELTS[_ZERO_POISON] and handle splitting (PR #185605)   via llvm-commits
• [llvm] [SelectionDAG] Expand CTTZ_ELTS[_ZERO_POISON] and handle splitting (PR #185605)   via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   Jay Foad via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   Jan Patrick Lehr via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   Jan Patrick Lehr via llvm-commits
• [llvm] [X86] Add i128 funnel shift coverage to match i256/i512 tests (PR #185612)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add i128 funnel shift coverage to match i256/i512 tests (PR #185612)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   Jan Patrick Lehr via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize cvt_pk_u16/i16/pkrtz (PR #185534)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize cvt_pk_u16/i16/pkrtz (PR #185534)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize cvt_pk_u16/i16/pkrtz (PR #185534)   Petar Avramovic via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Dmitry Sidorov via llvm-commits
• [llvm] [InferAS][NFC] Improve documentation for getAddrSpaceCastPreservedPtrMask (PR #185239)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Make ShouldPreferAnother const. NFC. (PR #185606)   Matt Arsenault via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   Stefan Gränitz via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   Dmitry Sidorov via llvm-commits
• [llvm] 73a05f6 - [ORC] Disable waiting-on-graph-capture-replay.test on Windows/AArch64.   Lang Hames via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   CHANDRA GHALE via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   CHANDRA GHALE via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Dmitry Sidorov via llvm-commits
• [llvm] 5e4f1e7 - [X86] Add i128 funnel shift coverage to match i256/i512 tests (#185612)   via llvm-commits
• [llvm] [X86] Add i128 funnel shift coverage to match i256/i512 tests (PR #185612)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] AMDGPU: Fix dead checks in test (PR #185613)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix dead checks in test (PR #185613)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix dead checks in test (PR #185613)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix dead checks in test (PR #185613)   via llvm-commits
• [llvm] [AMDGPU] Add f32 cost model for exp/exp2/exp10 intrinsics (PR #185369)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Ulrich Weigand via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Pengcheng Wang via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Simon Pilgrim via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Jay Foad via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Benjamin Maxwell via llvm-commits
• [llvm] [WIP][Don't Merge] Check whether lines are covered by existing tests (PR #184637)   via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [llvm] AMDGPU: Fix dead checks in test (PR #185613)   Matt Arsenault via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Viktoria Maximova via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Run AMDGPULowerVGPREncoding before hazard recognizers. NFCI. (PR #184987)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Run AMDGPULowerVGPREncoding before hazard recognizers. NFCI. (PR #184987)   Jay Foad via llvm-commits
• [llvm] 19a5a35 - [SPIR-V] Add overload of getConstraintType for inline asm lowering (#185422)   via llvm-commits
• [llvm] [SPIR-V] Add overload of getConstraintType for inline asm lowering (PR #185422)   Dmitry Sidorov via llvm-commits
• [llvm] [mlir] [openmp] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] Revert "[AMDGPU] Enable scheduler mfma rewrite stage by default" (PR #185604)   Jay Foad via llvm-commits
• [llvm] Revert "[AMDGPU] Enable scheduler mfma rewrite stage by default" (PR #185604)   Jay Foad via llvm-commits
• [clang] [llvm] [RISCV] Add release notes for Zvabd (PR #185617)   Pengcheng Wang via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   via llvm-commits
• [llvm] [CodeGen] Make ShouldPreferAnother const. NFC. (PR #185606)   Jay Foad via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [mlir] [openmp] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [openmp] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [openmp] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [mlir] [openmp] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [LoongArch] Try to avoid casts around logical vector ops on lasx (PR #163523)   via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] 278dba3 - AMDGPU: Fix dead checks in test (#185613)   via llvm-commits
• [llvm] AMDGPU: Fix dead checks in test (PR #185613)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   Sander de Smalen via llvm-commits
• [llvm] Revert "[AMDGPU] Enable scheduler mfma rewrite stage by default" (PR #185604)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   Sander de Smalen via llvm-commits
• [llvm] [OpenMP][NFC] Fix stale DeviceRTL header path in OpenMPIRBuilder (PR #185563)   Tom Eccles via llvm-commits
• [llvm] [X86] Add i128 funnel shift coverage to match i256/i512 tests (PR #185612)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [X86] fuse constant addition after sbb (PR #184541)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Jay Foad via llvm-commits
• [llvm] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> type (PR #184328)   Simon Pilgrim via llvm-commits
• [llvm] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> type (PR #184328)   Simon Pilgrim via llvm-commits
• [llvm] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> type (PR #184328)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Codegen for min/max instructions for gfx1170 (PR #185625)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU] Codegen for min/max instructions for gfx1170 (PR #185625)   via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[AMDGPU] Enable scheduler mfma rewrite stage by default" (PR #185604)   Jan Patrick Lehr via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (PR #182513)   Anatoly Trosinenko via llvm-commits
• [llvm] ca5bc14 - Revert "[AMDGPU] Enable scheduler mfma rewrite stage by default" (#185604)   via llvm-commits
• [llvm] Revert "[AMDGPU] Enable scheduler mfma rewrite stage by default" (PR #185604)   Jan Patrick Lehr via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AArch64] Fold BUILD_VECTORs splats into users by using SVE immediates (PR #165559)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [Dexter] Add missing calls to SBDebugger::{Initialize,Terminate} (PR #185535)   Stephen Tozer via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   Manuel Carrasco via llvm-commits
• [llvm] [DA] Remove outdated comments (NFC) (PR #185621)   Ryotaro Kasuga via llvm-commits
• [llvm] c61f2be - [DA] Remove outdated comments (NFC) (#185621)   via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] 122f0b1 - [ORC] Use std::move for Expected return value to fix bot error.   Lang Hames via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Lang Hames via llvm-commits
• [llvm] 2e5e38c - [AMDGPU] Update register class numbers in some tests (#185623)   via llvm-commits
• [llvm] [AMDGPU] Update register class numbers in some tests (PR #185623)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   via llvm-commits
• [llvm] [ORC] Add WaitingOnGraph record / replay facility and test tool. (PR #185275)   Jan Patrick Lehr via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV][Debug Info] DebugCompilationUnit refactor for DebugFunction support (PR #183117)   Manuel Carrasco via llvm-commits
• [llvm] c79a058 - [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (#182146)   via llvm-commits
• [llvm] [VPlan] Materialize VectorTripCount in narrowInterleaveGroups. (PR #182146)   Florian Hahn via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Alexey Bataev via llvm-commits
• [llvm] 3bc1de1 - [PowerPC][NFC] Clean up code in RegisterInfo.td (#185520)   via llvm-commits
• [llvm] [PowerPC][NFC] Clean up code in RegisterInfo.td (PR #185520)   Lei Huang via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Phoebe Wang via llvm-commits
• [llvm] [TableGen] Fix inferring missing sub-classes for various subreg indices (PR #185638)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Fix inferring missing sub-classes for various subreg indices (PR #185638)   Mikael Holmen via llvm-commits
• [llvm] [InstSimplify] Implement `Cond ? V : V` -> `V` when no Refinment allowed (PR #183291)   Gábor Spaits via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Phoebe Wang via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Balázs Benics via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Balázs Benics via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Balázs Benics via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Balázs Benics via llvm-commits
• [llvm] [X86] Use CUR_DIRECTION constant in more places. NFC (PR #185571)   Aiden Grossman via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Krzysztof Parzyszek via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [llvm] [X86] Fix assertion when lowering FP_ROUND (PR #185562)   Aiden Grossman via llvm-commits
• [llvm] [TableGen] Do not order register classes based on heap addresses (PR #185644)   Ivan Kosarev via llvm-commits
• [llvm] [X86] Fix assertion when lowering FP_ROUND (PR #185562)   Aiden Grossman via llvm-commits
• [llvm] [TableGen] Do not order register classes based on heap addresses (PR #185644)   via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Florian Hahn via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Ádám Kallai via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [llvm] aca0639 - [ORC] Flush streams in WaitingOnGraphOpStreamRecorder record ops.   Lang Hames via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [flang] [llvm] [Flang] Adding lowering for the allocation and deallocation of coarrays (PR #182110)   Jean-Didier PAILLEUX via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [llubi] Add support for common library function calls (PR #185645)   Zhige Chen via llvm-commits
• [llvm] [InstSimplify] Implement `Cond ? V : V` -> `V` when no Refinment allowed (PR #183291)   Gábor Spaits via llvm-commits
• [polly] [Polly] Use GenDT in assertion (PR #179433)   Michael Kruse via llvm-commits
• [llvm] [llubi] Add support for common library function calls (PR #185645)   via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Jack Styles via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Jack Styles via llvm-commits
• [llvm] [PowerPC][NFC] Refactor Register class and operand definitons (PR #185647)   Lei Huang via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Jack Styles via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Jack Styles via llvm-commits
• [llvm] [PowerPC][NFC] Refactor Register class and operand definitons (PR #185647)   via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Krzysztof Parzyszek via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Florian Hahn via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Amit Tiwari via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Simon Pilgrim via llvm-commits
• [llvm] [Verifier] Add checks for loop metadata nodes (PR #182252)   Michael Kruse via llvm-commits
• [llvm] 1813603 - [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (#184904)   via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   Yaxun Liu via llvm-commits
• [llvm] [X86] Use CUR_DIRECTION constant in more places. NFC (PR #185571)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use CUR_DIRECTION constant in more places. NFC (PR #185571)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Florian Hahn via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Florian Hahn via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Alexey Bataev via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Alexey Bataev via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Anshil Gandhi via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   via llvm-commits
• [llvm] [TableGen] Do not order register classes based on heap addresses (PR #185644)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Amit Tiwari via llvm-commits
• [clang] [llvm] Minimal support of floating-point operand bundles (PR #135658)   Serge Pavlov via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Anshil Gandhi via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [llvm] e9aa580 - [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (#185642)   via llvm-commits
• [llvm] [OpenMP] Add definitions of FLATTEN and SPLIT to OMP.td (PR #185642)   Krzysztof Parzyszek via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Florian Hahn via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Refactor isel of 128-bit constant splats. (PR #185652)   Graham Hunter via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [llvm] [PPC] Remove the long-standing workaround for the "ANDI glue bug" in the PowerPC backend and the associated dead PPCISD opcodes. (PR #185546)   via llvm-commits
• [llvm] [llubi] Add support for common library function calls (PR #185645)   via llvm-commits
• [llvm] [AArch64] Specify SETCCCARRY as custom for MVT::i32 on AArch64 (PR #185477)   via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   via llvm-commits
• [llvm] 525e484 - [X86] Fix -Wunused-variable   Aiden Grossman via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Refactor isel of 128-bit constant splats. (PR #185652)   Paul Walker via llvm-commits
• [llvm] 4fffee0 - [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (#183669)   via llvm-commits
• [llvm] [Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (PR #183669)   Brian Cain via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Petar Avramovic via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Refactor isel of 128-bit constant splats. (PR #185652)   David Sherwood via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Refactor isel of 128-bit constant splats. (PR #185652)   Paul Walker via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Refactor isel of 128-bit constant splats. (PR #185652)   Graham Hunter via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   Jakub Kuderski via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   Jakub Kuderski via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   via llvm-commits
• [llvm] [Dexter] Add missing calls to SBDebugger::{Initialize,Terminate} (PR #185535)   Jonas Devlieghere via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   Jakub Kuderski via llvm-commits
• [llvm] [NVPTX] Support lowering of `(l)lround` (PR #183901)   Mitch Briles via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] 97bffdd - [TableGen] Do not order register classes based on heap addresses (#185644)   via llvm-commits
• [llvm] [TableGen] Do not order register classes based on heap addresses (PR #185644)   Ivan Kosarev via llvm-commits
• [llvm] [X86] LowerFP_EXTEND - X86ISD::CVTPH2PS doesn't take a rounding mode (PR #185659)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use CUR_DIRECTION constant in more places. NFC (PR #185571)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerFP_EXTEND - X86ISD::CVTPH2PS doesn't take a rounding mode (PR #185659)   via llvm-commits
• [llvm] [Bazel] Fixes 05d96d5 (PR #185660)   via llvm-commits
• [llvm] [Bazel] Fixes 05d96d5 (PR #185660)   via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] 2133002 - [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (#184662)   via llvm-commits
• [llvm] [AMDGPU] Poison invalid globals after emitting error in LowerBufferFatPointers pass (PR #184662)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)   Graham Hunter via llvm-commits
• [lld] [lld] Generalize BP compression sort to support arbitrary section groups (PR #185661)   Zhaoxuan Jiang via llvm-commits
• [llvm] 56a4315 - [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (#135076)   via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   via llvm-commits
• [llvm] 084aa5a - [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (#185074)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Implement isel for maximumnum/minimumnum. (PR #185074)   Paul Walker via llvm-commits
• [llvm] [Bazel] Fixes 05d96d5 (PR #185660)   Aiden Grossman via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] b99970d - [AArch64] Remove dangling function declaration in AArch64PointerAuth (#185439)   via llvm-commits
• [llvm] [AArch64] Remove dangling function declaration in AArch64PointerAuth (PR #185439)   Victor Campos via llvm-commits
• [llvm] [BOLT] Error out on SHF_COMPRESSED debug sections (PR #185662)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Error out on SHF_COMPRESSED debug sections (PR #185662)   Amina Chabane via llvm-commits
• [llvm] [AMDGPU] Widen sub-dword constant loads with dword alignment to match SelectionDAG behavior (PR #184790)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix VCC s1 phi instruction selection failure (PR #184632)   Arseniy Obolenskiy via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [llvm] [X86] LowerFP_EXTEND - X86ISD::CVTPH2PS doesn't take a rounding mode (PR #185659)   Simon Pilgrim via llvm-commits
• [llvm] [X86] LowerFP_EXTEND - X86ISD::CVTPH2PS doesn't take a rounding mode (PR #185659)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Farzon Lotfi via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Alex Duran via llvm-commits
• [llvm] 673a71f - [CodeGen] Make ShouldPreferAnother const. NFC. (#185606)   via llvm-commits
• [llvm] [CodeGen] Make ShouldPreferAnother const. NFC. (PR #185606)   Jay Foad via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Farzon Lotfi via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Joseph Huber via llvm-commits
• [llvm] [TableGen] Fix duplicate enum definitions in register class intersections (PR #183139)   Rahul Joshi via llvm-commits
• [llvm] [CMake] Prevent builtins from clobbering runtimes configuration (PR #185664)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [Runtimes] Prevent builtins from clobbering runtimes configuration (PR #185664)   Joseph Huber via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones (cpu-only) (PR #177428)   Wael Yehia via llvm-commits
• [clang] [llvm] [RISCV] Add release notes for Zvabd (PR #185617)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add release notes for Zvabd (PR #185617)   Luke Lau via llvm-commits
• [llvm] dff05ac - [NewPM] Add port for aarch64-simd-scalar (#185256)   via llvm-commits
• [llvm] [NewPM] Add port for aarch64-simd-scalar (PR #185256)   Anshul Nigham via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   Steven Perron via llvm-commits
• [llvm] [Runtimes] Prevent builtins from clobbering runtimes configuration (PR #185664)   Saleem Abdulrasool via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Alex Duran via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   David Spickett via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Luke Lau via llvm-commits
• [compiler-rt] [llvm] [copmiler-rt] Initial support for building profile library on the GPU (PR #185552)   Joseph Huber via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] cc38e42 - [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (#160956)   via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   via llvm-commits
• [llvm] [SPIR-V] Make SPIRVModuleAnalysis::MAI a non static member (PR #160956)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] 38a3de6 - [SLP][NFC]Add RISC_V test with a regression in reduction vectorization, NFC   Alexey Bataev via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   via llvm-commits
• [llvm] [SPIRV] fix `alloca` -> `OpVariable` lowering (PR #164175)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Runtimes] Prevent builtins from clobbering runtimes configuration (PR #185664)   Joseph Huber via llvm-commits
• [llvm] [LV] Inline createStepForVF, stripping redundant optz (PR #185668)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [TSan] Fix determining static TLS blocks (PR #183106)   Stefan Schulze Frielinghaus via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Alex Duran via llvm-commits
• [llvm] [LV] Inline createStepForVF, stripping redundant optz (PR #185668)   via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   Robert Imschweiler via llvm-commits
• [clang] [llvm] [FMV][AIX] Implement target_clones (cpu-only) (PR #177428)   Wael Yehia via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Peter Klausler via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] 379d95c - [X86] LowerFP_EXTEND - X86ISD::CVTPH2PS doesn't take a rounding mode (#185659)   via llvm-commits
• [llvm] [X86] LowerFP_EXTEND - X86ISD::CVTPH2PS doesn't take a rounding mode (PR #185659)   Simon Pilgrim via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Alex Duran via llvm-commits
• [llvm] [PPC] Combine sub with carry to SUBE (PR #185671)   via llvm-commits
• [llvm] [PPC] Combine sub with carry to SUBE (PR #185671)   via llvm-commits
• [llvm] [PPC] Combine sub with carry to SUBE (PR #185671)   via llvm-commits
• [llvm] [PPC] Combine sub with carry to SUBE (PR #185671)   via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Nick Sarnie via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Nick Sarnie via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Steven Perron via llvm-commits
• [llvm] [AMDGPU] Add note about inactive VGPR lanes being preserved (PR #185672)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add note about inactive VGPR lanes being preserved (PR #185672)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add note about inactive VGPR lanes being preserved (PR #185672)   via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV] Emit hidden/local function decls as Import linkage (PR #185673)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Add note about inactive VGPR lanes being preserved (PR #185672)   Jay Foad via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Steven Perron via llvm-commits
• [llvm] [AMDGPU] Add note about inactive VGPR lanes being preserved (PR #185672)   Matt Arsenault via llvm-commits
• [compiler-rt] [llvm] [copmiler-rt] Initial support for building profile library on the GPU (PR #185552)   Matt Arsenault via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Add interface to extend image validation (PR #185663)   Kevin Sala Penades via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   via llvm-commits
• [llvm] InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (PR #184123)   Matt Arsenault via llvm-commits
• [compiler-rt] [llvm] [copmiler-rt] Initial support for building profile library on the GPU (PR #185552)   Joseph Huber via llvm-commits
• [llvm] [SPIRV] Emit hidden/local function decls as Import linkage (PR #185673)   Nick Sarnie via llvm-commits
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• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Improve DoUpdateThreadList() (PR #183981)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU][AMDGPUBaseInfo] Replace Waitcnt members with array (PR #182927)   via llvm-commits
• [llvm] [AArch64] Add extra sched predicates (PR #184801)   Nashe Mncube via llvm-commits
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• [llvm] [Utils][UpdateTestChecks] Generalize INLINEASM register class IDs with [[#]] (PR #185678)   Christudasan Devadasan via llvm-commits
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• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Florian Hahn via llvm-commits
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• [llvm] [llubi] Add support for bitcast (PR #185205)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Nikita Popov via llvm-commits
• [llvm] [Utils][UpdateTestChecks] Generalize INLINEASM register class IDs with [[#]] (PR #185678)   via llvm-commits
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• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Luke Lau via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Luke Lau via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE] Support SVE load/store non-zero address space pointers (#183265) (PR #184197)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Replace hardcoded register class IDs with [[#]] (NFC) (PR #185402)   Christudasan Devadasan via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Luke Lau via llvm-commits
• [llvm] [X86] EmitTruncSStore - X86ISD::VTRUNCSTORES/VTRUNCSTOREUS no longer take a mask operand (PR #185676)   Sergei Barannikov via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Luke Lau via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Drew Kersnar via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Craig Topper via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   antoine moynault via llvm-commits
• [llvm] [X86] EmitTruncSStore - X86ISD::VTRUNCSTORES/VTRUNCSTOREUS no longer take a mask operand (PR #185676)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Drew Kersnar via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Modify zero-indexed GEPs in place rather than cloning (PR #185053)   Nikita Popov via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
• [llvm] [ARM] Port LowerSELECTWithCmpZero to ARM (PR #151890)   via llvm-commits
• [llvm] [Utils][UpdateTestChecks] Generalize INLINEASM register class IDs with [[#]] (PR #185678)   Christudasan Devadasan via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
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• [llvm] [X86] Use CUR_DIRECTION constant in more places. NFC (PR #185571)   Craig Topper via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Farzon Lotfi via llvm-commits
• [llvm] 29061b5 - Add constant folding for llvm.experimental.cttz.elts #182324 (#182895)   via llvm-commits
• [llvm] Add constant folding for llvm.experimental.cttz.elts #182324 (PR #182895)   Luke Lau via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Syadus Sefat via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Graham Hunter via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
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• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Farzon Lotfi via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Florian Hahn via llvm-commits
• [llvm] [MC,CodeGen] Update .prefalign for symbol-based preferred alignment (PR #184032)   Fangrui Song via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Farzon Lotfi via llvm-commits
• [llvm] b0d9d4d - [X86] EmitTruncSStore - X86ISD::VTRUNCSTORES/VTRUNCSTOREUS no longer take a mask operand (#185676)   via llvm-commits
• [llvm] [X86] EmitTruncSStore - X86ISD::VTRUNCSTORES/VTRUNCSTOREUS no longer take a mask operand (PR #185676)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   Craig Topper via llvm-commits
• [flang] [llvm] [mlir] [mlir][IR] Rename `DenseIntOrFPElementsAttr` to `DenseTypedElementsAttr` (PR #185687)   Matthias Springer via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [X86] Add mayLoad/mayStore to legacy instructions CMPS/LODS/MOVS/SCAS/STOS (PR #185689)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [X86] Add mayLoad/mayStore to legacy instructions CMPS/LODS/MOVS/SCAS/STOS (PR #185689)   via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Benjamin Maxwell via llvm-commits
• [llvm] [Codegen, X86] Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Benjamin Maxwell via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
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• [lld] [lld] Generalize BP compression sort to support arbitrary section groups (PR #185661)   Ellis Hoag via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Anshil Gandhi via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Farzon Lotfi via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRV backend case (PR #185686)   via llvm-commits
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• [lld] [lld][MachO] Add N_COLD_FUNC support (PR #183909)   Ellis Hoag via llvm-commits
• [llvm] [SLP]Initial support for ordered reductions (PR #182644)   via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Viktoria Maximova via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Viktoria Maximova via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize cvt_pk_u16/i16/pkrtz (PR #185534)   via llvm-commits
• [llvm] AMDGPU: Document two more in-flight address spaces (PR #185690)   Nicolai Hähnle via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
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• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] AMDGPU: Document two more in-flight address spaces (PR #185690)   Nicolai Hähnle via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] AMDGPU: Document two more in-flight address spaces (PR #185690)   Nicolai Hähnle via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
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• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   Steven Perron via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
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• [llvm] AMDGPU: Document two more in-flight address spaces (PR #185690)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Fix incorrect VGPR usage for `s` constrained inline asm (PR #184910)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Move constraining of the reg class during SGPR to VGPR copy to existing loop (PR #182104)   Chinmay Deshpande via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Syadus Sefat via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (PR #184564)   Petar Avramovic via llvm-commits
• [llvm] [BOLT] Error out on SHF_COMPRESSED debug sections (PR #185662)   Amir Ayupov via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   Thibault Monnier via llvm-commits
• [llvm] [llubi] Add support for bitcast (PR #185205)   Yingwei Zheng via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][docs]: fix a couple typos in Statistic.h (PR #185657)   Jakub Kuderski via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Alexey Bataev via llvm-commits
• [llvm] [Utils][UpdateTestChecks] Generalize INLINEASM register class IDs with [[#]] (PR #185678)   Christudasan Devadasan via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [SLP]Prefer copyable over alternate (PR #183777)   Alexey Bataev via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   LLVM Continuous Integration via llvm-commits
• [lld] [lld] update maintainers (PR #183803)   Farid Zakaria via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ehsan Amiri via llvm-commits
• [llvm] [AMDGPU] Fix GFX1250 hazard: S_SET_VGPR_MSB dropped (PR #184904)   LLVM Continuous Integration via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   via llvm-commits
• [llvm] [AMDGPU] ISel & PEI for whole wave functions (PR #145858)   Jay Foad via llvm-commits
• [llvm] [DataLayout] Add a specifier for element-aligned vectors (PR #180617)   Helena Kotas via llvm-commits
• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Fangrui Song via llvm-commits
• [llvm] [SLP] Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [llvm] [bazel] Explicitly disable pfm shared lib (PR #185542)   Keith Smiley via llvm-commits
• [clang] [llvm] [X86] Accept 'a' modifier for 'p' constraint in inline asm (PR #185590)   Fangrui Song via llvm-commits
• [llvm] [SLP] Initial support for ordered reductions (PR #182644)   Alexey Bataev via llvm-commits
• [lld] [lld] clang-format sources (PR #183805)   Farid Zakaria via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Ryan Buchner via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [flang] [llvm] [mlir] [mlir][IR] Rename `DenseIntOrFPElementsAttr` to `DenseTypedElementsAttr` (PR #185687)   Jeremy Kun via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Alexey Bataev via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Steven Perron via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [Offload][L0] Add support for OffloadBinary format in L0 plugin (PR #185404)   Alex Duran via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRV backend case (PR #185686)   via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FPOWI (PR #185454)   Diego Novillo via llvm-commits
• [llvm] Add sancov support for large AArch64 binaries. (PR #185374)   Vitaly Buka via llvm-commits
• [llvm] Add sancov support for large AArch64 binaries. (PR #185374)   Vitaly Buka via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Kelvin Li via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Jaydeep Chauhan via llvm-commits
• [llvm] [lldb] Fix type checking in lldbDataFormatters (NFC) (PR #185706)   Dave Lee via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [X86] Add mayLoad/mayStore to legacy instructions CMPS/LODS/MOVS/SCAS/STOS (PR #185689)   via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Nicolai Hähnle via llvm-commits
• [llvm] [HLSL][SPIR-V] Add resource load level intrinsics and SPIR-V backend support (PR #185707)   Steven Perron via llvm-commits
• [llvm] [HLSL][SPIR-V] Add resource load level intrinsics and SPIR-V backend support (PR #185707)   via llvm-commits
• [llvm] [HLSL][SPIR-V] Add resource load level intrinsics and SPIR-V backend support (PR #185707)   via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Paul Walker via llvm-commits
• [llvm] 5c4856c - [InstCombine] Fold trunc (usub.sat 1, x) to i1 -> icmp eq x, 0 (#185524)   via llvm-commits
• [llvm] [Support] Fix symbolizer markup backtrace; reenable test (PR #181035)   Daniel Thornburgh via llvm-commits
• [llvm] [InstCombine] Fold trunc (usub.sat 1, x) to i1 -> icmp eq x, 0 (PR #185524)   Andreas Jonson via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Paul Walker via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [lld] 40cd48f - [lld][WebAssembly] Restore inactive checks relocatable.ll test. NFC (#185569)   via llvm-commits
• [lld] [lld][WebAssembly] Restore inactive checks relocatable.ll test. NFC (PR #185569)   Sam Clegg via llvm-commits
• [llvm] [SystemZ][z/OS] Remove use of subsections. (PR #184167)   Kai Nacke via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [SystemZ][z/OS] Remove use of subsections. (PR #184167)   Kai Nacke via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Sam Clegg via llvm-commits
• [llvm] [mlir] [openmp] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   via llvm-commits
• [llvm] [llvm-symbolizer] Eagerly flush markup-less line fragments (PR #185568)   via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Dimitrij Mijoski via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Craig Topper via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Alexey Bataev via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Matt Arsenault via llvm-commits
• [llvm] Add llvm-extract-bundle-entry to extend llvm-objcopy (PR #169386)   David Salinas via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Alexey Bataev via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[llvm][clang] Enable IO sandbox for assert builds" (PR #184545)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   Matt Arsenault via llvm-commits
• [llvm] 30f13b1 - [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (#185430)   via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Demetrius Kanios via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Jessica Clarke via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [lld] [llvm] [RISCV] Teach RISCVMergeBaseOffset to merge %lo into load/store folding arithmetic (PR #185353)   Sam Elliott via llvm-commits
• [llvm] [X86] Add mayLoad/mayStore to legacy instructions CMPS/LODS/MOVS/SCAS/STOS (PR #185689)   via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Sam Clegg via llvm-commits
• [llvm] [VPlan] Introduce dedicated canonical IV inc recipe (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce dedicated canonical IV inc recipe (PR #185739)   via llvm-commits
• [llvm] [VPlan] Fix `pseudoprobe` being treated a vector intrinsic (PR #185347)   Henry Jiang via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Demetrius Kanios via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Nick Sarnie via llvm-commits
• [llvm] AMDGPU: Track AGPR pressure (PR #150288)   Dhruva Chakrabarti via llvm-commits
• [llvm] b50cf35 - [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (#184564)   via llvm-commits
• [llvm] [IR] LangRef: document behavior of double-lifetime.start (PR #184296)   Ralf Jung via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Brox Chen via llvm-commits
• [llvm] [RISCV] Use RISCVCC::getInverseBranchOpcode in RISCVInstrInfo::reverseBranchCondition. NFC (PR #185752)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCVCC::getInverseBranchOpcode in RISCVInstrInfo::reverseBranchCondition. NFC (PR #185752)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Brox Chen via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerFormalArguments` (PR #180263)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerFormalArguments` (PR #180263)   Derek Schuff via llvm-commits
• [llvm] [RISCV] Use RISCVCC::getInverseBranchOpcode in RISCVInstrInfo::reverseBranchCondition. NFC (PR #185752)   Sam Elliott via llvm-commits
• [llvm] [X86] Fix assertion when lowering FP_ROUND (PR #185562)   Craig Topper via llvm-commits
• [llvm] 7615f58 - [NewPM] Port AArch64BranchTargets (#185585)   via llvm-commits
• [llvm] [NewPM] Port AArch64BranchTargets (PR #185585)   Anshul Nigham via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][CodeGen] Use COPY instead of V_MOV for non-imm operand (PR #185754)   Brox Chen via llvm-commits
• [llvm] [X86] Fix assertion when lowering FP_ROUND (PR #185562)   Aiden Grossman via llvm-commits
• [llvm] [mailmap] Map quicinc.com addresses to qti.qualcomm.com/oss.qualcomm.com; fix sort order (PR #181426)   Brian Cain via llvm-commits
• [llvm] [AMDGPU][CodeGen] Use COPY instead of V_MOV for non-imm operand (PR #185754)   Brox Chen via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Nicolai Hähnle via llvm-commits
• [llvm] [CodeGen] Improve `getLoadExtAction` and friends (PR #181104)   Nicolai Hähnle via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerFormalArguments` (PR #180263)   Derek Schuff via llvm-commits
• [llvm] [VPlan] Introduce dedicated canonical IV inc recipe (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [WebAssembly][GlobalISel] CallLowering `lowerFormalArguments` (PR #180263)   Derek Schuff via llvm-commits
• [llvm] [AMDGPU][CodeGen] Use COPY instead of V_MOV for non-imm operand (PR #185754)   via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   Joseph Huber via llvm-commits
• [llvm] [Psuedoprobe] Enable pseudo probes for MachO (PR #185758)   Henry Jiang via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   Joseph Huber via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   Joseph Huber via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   Joseph Huber via llvm-commits
• [llvm] [llvm-symbolizer] Eagerly flush markup-less line fragments (PR #185568)   Joshua Seaton via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [llvm] a4244bc - [LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (#180888)   via llvm-commits
• [llvm] [LegalizeTypes] Emit FSHL/FSHR from ExpandShiftByConstant when Legal. (PR #180888)   Craig Topper via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [clang] [flang] [llvm] [flang] Add runtime trampoline pool for W^X compliance (PR #183108)   Peter Klausler via llvm-commits
• [llvm] [SandboxVec][SeedCollection] Support pass argument for enabling different types (PR #155079)   via llvm-commits
• [llvm] [SandboxVec][SeedCollection] Support pass argument for enabling different types (PR #155079)   via llvm-commits
• [llvm] [InstCombine][profcheck] Set unknown branch weights when folding booleans (PR #185769)   Alan Zhao via llvm-commits
• [llvm] [InstCombine][profcheck] Set unknown branch weights when folding booleans (PR #185769)   via llvm-commits
• [compiler-rt] [libunwind] [llvm] Fix compiling/using libunwind for wasm targets (PR #185770)   Alex Crichton via llvm-commits
• [compiler-rt] [libunwind] [llvm] Fix compiling/using libunwind for wasm targets (PR #185770)   via llvm-commits
• [compiler-rt] [libunwind] [llvm] Fix compiling/using libunwind for wasm targets (PR #185770)   Alex Crichton via llvm-commits
• [compiler-rt] [libunwind] [llvm] Fix compiling/using libunwind for wasm targets (PR #185770)   via llvm-commits
• [llvm] [InstCombine][profcheck] Set unknown branch weights when folding booleans (PR #185769)   Mircea Trofin via llvm-commits
• [llvm] [InstCombine][profcheck] Set unknown branch weights when folding booleans (PR #185769)   Alan Zhao via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Arthur Eubanks via llvm-commits
• [compiler-rt] [libunwind] [llvm] Fix compiling/using libunwind for wasm targets (PR #185770)   Sam Clegg via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (#176015)" (PR #179553)   Artem Belevich via llvm-commits
• [llvm] [llvm-symbolizer] Eagerly flush markup-less line fragments (PR #185568)   Joshua Seaton via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable alloca promotion (PR #184855)   Justin Fargnoli via llvm-commits
• [llvm] [SystemZ] Disable PCH on z/OS. (PR #185750)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][MC] Improving assembler error message for unsupported instructions (PR #185778)   Jun Wang via llvm-commits
• [llvm] [AMDGPU][MC] Improving assembler error message for unsupported instructions (PR #185778)   via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (#176015)" (PR #179553)   Artem Belevich via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   Derek Schuff via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   via llvm-commits
• [llvm] [llvm-symbolizer] Eagerly flush markup-less line fragments (PR #185568)   Joshua Seaton via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable alloca promotion (PR #184855)   Justin Fargnoli via llvm-commits
• [compiler-rt] [libunwind] [llvm] [WebAssembly] Move __cpp_exception to libunwind (PR #185770)   Alex Crichton via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Sam Clegg via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Sam Clegg via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Fangrui Song via llvm-commits
• [llvm] 2410418 - [RISCV] Refactor lowerBUILD_VECTOR splat opcode selection to avoid duplication. NFC. (#185573)   via llvm-commits
• [llvm] [RISCV] Refactor lowerBUILD_VECTOR splat opcode selection to avoid duplication. NFC. (PR #185573)   Jim Lin via llvm-commits
• [lld] [lld][Hexagon] Add "hexagonlinux" emulation alias (PR #185743)   Fangrui Song via llvm-commits
• [llvm] [Docs] Migrate LLVM docs to furo (PR #184440)   Anshul Nigham via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   Liao Chunyu via llvm-commits
• [clang] [llvm] [RISCV] Add release notes for Zvabd (PR #185617)   Brandon Wu via llvm-commits
• [compiler-rt] [libunwind] [llvm] [WebAssembly] Move __cpp_exception to libunwind (PR #185770)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][Hexagon] Add "hexagonlinux" emulation alias (PR #185743)   Brian Cain via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] AMDGPU: Track AGPR pressure (PR #150288)   Christudasan Devadasan via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBitXor function (PR #185776)   via llvm-commits
• [llvm] 482bb3d - [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (#185519)   via llvm-commits
• [llvm] [SandboxVec][DAG] Mark UnscheduledSuccs as invalid when vectorized (PR #185519)   via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [llvm] [AMDGPU] Add asm comments if setreg changes MSBs (PR #185774)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add asm comments if setreg changes MSBs (PR #185774)   Shilei Tian via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   Liao Chunyu via llvm-commits
• [llvm] [AMDGPU] Add target feature for SWMMAC instructions (PR #185785)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Add target feature for SWMMAC instructions (PR #185785)   via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Phoebe Wang via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] AMDGPU: Track AGPR pressure (PR #150288)   Dhruva Chakrabarti via llvm-commits
• [llvm] AMDGPU: Track AGPR pressure (PR #150288)   Dhruva Chakrabarti via llvm-commits
• [llvm] AMDGPU: Track AGPR pressure (PR #150288)   Dhruva Chakrabarti via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [compiler-rt] [scudo] Display flags on secondary cache entries. (PR #185786)   Christopher Ferris via llvm-commits
• [compiler-rt] [scudo] Display flags on secondary cache entries. (PR #185786)   via llvm-commits
• [llvm] 53a2fd9 - [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (#180889)   via llvm-commits
• [llvm] [DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (PR #180889)   Craig Topper via llvm-commits
• [compiler-rt] [scudo] Display flags on secondary cache entries. (PR #185786)   Christopher Ferris via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [SandboxVec][DAG][NFC] Remove argument from setScheduelued() (PR #185787)   via llvm-commits
• [llvm] [SandboxVec][DAG][NFC] Remove argument from setScheduelued() (PR #185787)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
• [llvm] [WebAssembly] Look through freeze nodes when folding vector load + ext (PR #185143)   Heejin Ahn via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   via llvm-commits
• [llvm] e950a80 - [WebAssembly] Look through freeze nodes when folding vector load + ext (#185143)   via llvm-commits
• [llvm] [WebAssembly] Look through freeze nodes when folding vector load + ext (PR #185143)   Derek Schuff via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Elvis Wang via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Elvis Wang via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Elvis Wang via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Elvis Wang via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Elvis Wang via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   via llvm-commits
• [llvm] [LV] Enable scalable FindLast on RISCV. (PR #184931)   Luke Lau via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] f2f5845 - [WebAssembly][FastISel] Fold AND mask operations into ZExt load (#183743)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   via llvm-commits
• [llvm] [WebAssembly][FastISel] Omit redundant AND for zext of i8/i16 loads (PR #182240)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   Craig Topper via llvm-commits
• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Pengcheng Wang via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   Xinlong Chen via llvm-commits
• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   Sam Elliott via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [AMDGPU] Add target feature for SWMMAC instructions (PR #185785)   Shilei Tian via llvm-commits
• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Pengcheng Wang via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [lld] [ELF] Fix -u with TLS symbols: propagate type from STT_NOTYPE to STT_TLS (PR #185794)   Fangrui Song via llvm-commits
• [lld] [ELF] Fix -u with TLS symbols: propagate type from STT_NOTYPE to STT_TLS (PR #185794)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Scalarize extractelement from single-use vector load (PR #185795)   Jianjian Guan via llvm-commits
• [llvm] [InstCombine] Scalarize extractelement from single-use vector load (PR #185795)   via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [llvm] [InstCombine] Scalarize extractelement from single-use vector load (PR #185795)   Jianjian Guan via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   via llvm-commits
• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   Pengcheng Wang via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   via llvm-commits
• [lld] [lld] Two-level compression sort grouping with glob-based section matching (PR #185661)   Zhaoxuan Jiang via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] [DA] Add tests for the Weak Zero SIV tests miss dependency (NFC) (PR #184998)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for the Weak Zero SIV tests miss dependency (NFC) (PR #184998)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for the Weak Zero SIV tests miss dependency (NFC) (PR #184998)   Ryotaro Kasuga via llvm-commits
• [llvm] [InstCombine] Fold patterns which uses <2N x iM> type for comparisons on <N x i2M> vector types (PR #184328)   Fuad Ismail via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   Demetrius Kanios via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
• [libc] [llvm] [libc][math][c23] Add sinbf16 function (PR #185441)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add cosbf16 math function (PR #185801)   via llvm-commits
• [compiler-rt] [llvm] [WebAssembly] Remove `__c_longjmp` from compiler-rt (PR #185798)   Sam Clegg via llvm-commits
• [llvm] 7a43f77 - [WebAssembly] Remove `__c_longjmp` from compiler-rt (#185798)   via llvm-commits
• [compiler-rt] [llvm] [WebAssembly] Remove `__c_longjmp` from compiler-rt (PR #185798)   Sam Clegg via llvm-commits
• [llvm] a95f4ac - [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (#185790)   via llvm-commits
• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   Craig Topper via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize for atomic fmin/fmax num (PR #185504)   Syadus Sefat via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] [OpenMP][NFC] Fix stale DeviceRTL header path in OpenMPIRBuilder (PR #185563)   Muyao Xiao via llvm-commits
• [llvm] [OpenMP][NFC] Fix stale DeviceRTL header path in OpenMPIRBuilder (PR #185563)   Muyao Xiao via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   LLVM Continuous Integration via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Mikael Holmen via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   via llvm-commits
• [llvm] [SLP] Create SLP trees starting from constant stride stores (PR #175126)   Ryan Buchner via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] Add AVX512BMM support for AMD Zen 6 (znver6) (PR #182556)   via llvm-commits
• [compiler-rt] [llvm] [WebAssembly] Remove `__c_longjmp` from compiler-rt (PR #185798)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   via llvm-commits
• [llvm] [AMDGPU] Introduce ASYNC_CNT on GFX1250 (PR #185810)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   via llvm-commits
• [llvm] [AMDGPU] Introduce ASYNC_CNT on GFX1250 (PR #185810)   via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] refactor Exact SIV bounds inference (NFC) (PR #185719)   Ruoyu Qiu via llvm-commits
• [llvm] [AMDGPU] Introduce ASYNC_CNT on GFX1250 (PR #185810)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] db7e0da - [RISCV][MC] Add support of Zvzip extension (#185614)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   Pengcheng Wang via llvm-commits
• [llvm] [WebAssembly] Define `__funcref_call_table` in generated asm and objects (PR #180900)   Demetrius Kanios via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Address post-commit comments for #180864 (PR #183232)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [DA] refactor Exact SIV bounds inference (NFC) (PR #185719)   Ryotaro Kasuga via llvm-commits
• [llvm] 98eb241 - [RISCV] Add tests for vwaddu_wv+vabd(u) combine   via llvm-commits
• [llvm] [DA] refactor Exact SIV bounds inference (NFC) (PR #185719)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] refactor bounds inference in exactSIVtest and exactRDIVtest (NFC) (PR #185719)   Ruoyu Qiu via llvm-commits
• [llvm] [DA] refactor bounds inference in exactSIVtest and exactRDIVtest (NFC) (PR #185719)   Ruoyu Qiu via llvm-commits
• [llvm] [RISCV] Combine vwaddu_wv+vabd(u) to vwabda(u) (PR #184603)   Pengcheng Wang via llvm-commits
• [llvm] 8cfcf33 - [RISCV] Combine vwaddu_wv+vabd(u) to vwabda(u)   via llvm-commits
• [llvm] [RISCV] Combine vwaddu_wv+vabd(u) to vwabda(u) (PR #184603)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [compiler-rt] [llvm] [WebAssembly] Remove `__c_longjmp` from compiler-rt (PR #185798)   Heejin Ahn via llvm-commits
• [clang] [llvm] [RISCV][MC] Add support of Zvzip extension (PR #185614)   LLVM Continuous Integration via llvm-commits
• [llvm] MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (PR #185820)   YunQiang Su via llvm-commits
• [llvm] MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (PR #185820)   via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   Ruoyu Qiu via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] [X86] Reject 'p' constraint without 'a' modifier in inline asm (PR #185799)   Fangrui Song via llvm-commits
• [llvm] [X86] Reject 'p' constraint without 'a' modifier in inline asm (PR #185799)   Fangrui Song via llvm-commits
• [llvm] [X86] Reject 'p' constraint without 'a' modifier in inline asm (PR #185799)   Fangrui Song via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Luke Lau via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   Ryotaro Kasuga via llvm-commits
• [llvm] Prevent LCSSA from creating phi operands for lifetime intrinsics. (PR #172929)   Chang Lin via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Martin Storsjö via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   Ruoyu Qiu via llvm-commits
• [llvm] [X86] Reject 'p' constraint without 'a' modifier in inline asm (PR #185799)   LIU Hao via llvm-commits
• [llvm] [DA] Refactor the signature of the Weak Zero SIV tests (NFC) (PR #185825)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Refactor the signature of the Weak Zero SIV tests (NFC) (PR #185825)   Ryotaro Kasuga via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Luke Lau via llvm-commits
• [llvm] [DA] Refactor the signature of the Weak Zero SIV tests (NFC) (PR #185825)   via llvm-commits
• [llvm] [llvm-readobj, ELF] Support reading binary with more than PN_XNUM segments. (PR #165278)   via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] [llvm] Add format check for MCSubtargetFeatures (PR #180943)   Georgiy Samoylov via llvm-commits
• [llvm] MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (PR #185820)   YunQiang Su via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Luke Lau via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Luke Lau via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Luke Lau via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [X86] Reject 'p' constraint without 'a' modifier in inline asm (PR #185799)   Phoebe Wang via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [DA] Fix debug log format (PR #185804)   Ruoyu Qiu via llvm-commits
• [llvm] [AMDGPU] Add asm comments if setreg changes MSBs (PR #185774)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [HLSL][Matrix] Add `half` type overloads to `mul` and exercise them (PR #185506)   LLVM Continuous Integration via llvm-commits
• [llvm] [DA] Fix debug log format (PR #185804)   Ryotaro Kasuga via llvm-commits
• [llvm] Prevent LCSSA from creating phi operands for lifetime intrinsics. (PR #172929)   via llvm-commits
• [llvm] Prevent LCSSA from creating phi operands for lifetime intrinsics. (PR #172929)   via llvm-commits
• [llvm] [AMDGPU] Add asm comments if setreg changes MSBs (PR #185774)   Stanislav Mekhanoshin via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy][NFC] Remove the `ObjCModuleTest.cpp` unit test (PR #185832)   Victor Chernyakin via llvm-commits
• [llvm] [DA] Fix debug log format (PR #185804)   Ruoyu Qiu via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy][NFC] Remove the `ObjCModuleTest.cpp` unit test (PR #185832)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy][NFC] Remove the `ObjCModuleTest.cpp` unit test (PR #185832)   via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   via llvm-commits
• [llvm] [DA] Fix debug log format (PR #185804)   Ruoyu Qiu via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [X86] Reject 'p' constraint without 'a' modifier in inline asm (PR #185799)   LIU Hao via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   Gergely Bálint via llvm-commits
• [llvm] [llubi] Extract the declaration of class InstExecutor (PR #185817)   Zhige Chen via llvm-commits
• [llvm] [AMDGPU] New test for untested line in AMDGPUMarkLastScratchLoad (PR #185430)   via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [llvm] [Delinearization] Fix comment in Delinearization.cpp/h (PR #182596)   Ruoyu Qiu via llvm-commits
• [llvm] [AMDGPU] Multi dword spilling for unaligned tuples (PR #183701)   via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Chuanqi Xu via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Chuanqi Xu via llvm-commits
• [llvm] [llubi] Extract the declaration of class InstExecutor (PR #185817)   Nikita Popov via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [SandboxVec][DAG][NFC] Remove argument from setScheduelued() (PR #185787)   Jan Patrick Lehr via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 52ea06f - [SPIRV] Add tests documenting incorrect lowering of load/store atomic (#185628)   via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Adds AGPR pressure during candidate init in GCN scheduler. (PR #185733)   Christudasan Devadasan via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   LLVM Continuous Integration via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Add tests documenting incorrect lowering of load/store atomic (PR #185628)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [llvm] [MacroFusion] Add [[maybe_unused]] to suppress some warings (PR #185833)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV][CostModel] Fix invalid cost for vector select on targets without FP vector support (PR #183158)   Luke Lau via llvm-commits
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• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   Jay Foad via llvm-commits
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• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Pierre van Houtryve via llvm-commits
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• [llvm] [TableGen] Use CHECK-LABEL in aritficial registers tests. NFC. (PR #185846)   Jay Foad via llvm-commits
• [llvm] [NFC][SPIRV] New test for untested SPIRV backend case (PR #185686)   via llvm-commits
• [llvm] [TableGen] Use CHECK-LABEL in aritficial registers tests. NFC. (PR #185846)   Jay Foad via llvm-commits
• [llvm] [AArch64] Adding FeatureFuseFCmpFCSel (PR #184881)   LLVM Continuous Integration via llvm-commits
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• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Nikolas Klauser via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Nikolas Klauser via llvm-commits
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• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [TableGen] Fix MUL case in DAG default operands test (PR #185847)   Jay Foad via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Fold fptrunc(x) ord/uno [ C | fptrunc(y) ] (PR #185844)   Kunqiu Chen via llvm-commits
• [llvm] [InstCombine] Fold fptrunc(x) ord/uno [ C | fptrunc(y) ] (PR #185844)   Kunqiu Chen via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Sander de Smalen via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Sander de Smalen via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Sander de Smalen via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Sander de Smalen via llvm-commits
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• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Jay Foad via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Jay Foad via llvm-commits
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• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Sander de Smalen via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   via llvm-commits
• [llvm] Fold `fcmp ord/uno (fptrunc X), C` to `fcmp ord/uno X, C` (PR #185848)   Tirthankar Mazumder via llvm-commits
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• [llvm] [InstCombine] Fold fptrunc(x) ord/uno [ C | fptrunc(y) ] (PR #185844)   Kunqiu Chen via llvm-commits
• [llvm] Fold `fcmp ord/uno (fptrunc X), C` to `fcmp ord/uno X, C` (PR #185848)   via llvm-commits
• [llvm] [RISCV]Lower one active interleaved load to normal segmented load (PR #185602)   Liao Chunyu via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   Matt Arsenault via llvm-commits
• [llvm] Fold `fcmp ord/uno (fptrunc X), C` to `fcmp ord/uno X, C` (PR #185848)   Tirthankar Mazumder via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Tomohiro Kashiwada via llvm-commits
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• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] [TableGen] Use CHECK-LABEL in artificial registers tests. NFC. (PR #185846)   Jay Foad via llvm-commits
• [llvm] [InstCombine] Fold `fcmp ord/uno (fptrunc X), C` to `fcmp ord/uno X, C` (PR #185848)   Tirthankar Mazumder via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   Matt Arsenault via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy][NFC] Remove the `ObjCModuleTest.cpp` unit test (PR #185832)   Baranov Victor via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [llvm] [TableGen] Use CHECK-LABEL in artificial registers tests. NFC. (PR #185846)   Jay Foad via llvm-commits
• [llvm] a257e16 - [TableGen] Use CHECK-LABEL in aritficial registers tests. NFC. (#185846)   via llvm-commits
• [llvm] [Dexter] Add missing calls to SBDebugger::{Initialize,Terminate} (PR #185535)   Stephen Tozer via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Florian Hahn via llvm-commits
• [llvm] [SLP] Loop aware cost model/tree building (PR #150450)   Paul Osmialowski via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [lld] [ELF] Fix -u with TLS symbols: propagate type from STT_NOTYPE to STT_TLS (PR #185794)   Peter Smith via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix matchUseVectorTruncate to check element order before folding (PR #185834)   David Green via llvm-commits
• [llvm] [InstCombine] Fold `fcmp ord/uno (fptrunc X), C` to `fcmp ord/uno X, C` (PR #185848)   via llvm-commits
• [libcxx] [llvm] [libc++] Fix iostream size ABI break (PR #185839)   Nikolas Klauser via llvm-commits
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• [llvm] [InstCombine] Fold `fcmp ord/uno (fptrunc X), C` to `fcmp ord/uno X, C` (PR #185848)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix matchUseVectorTruncate to check element order before folding (PR #185834)   Igor Gorban via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Simon Pilgrim via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Florian Hahn via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Florian Hahn via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Florian Hahn via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Florian Hahn via llvm-commits
• [llvm] [AArch64][GlobalISel] Add G_SQDMULL node (PR #185842)   Hari Limaye via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Luke Lau via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Luke Lau via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Luke Lau via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Luke Lau via llvm-commits
• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Mikhail Gudim via llvm-commits
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• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
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• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Florian Hahn via llvm-commits
• [llvm] [offload][l0][nfc] remove duplicated entry (PR #185855)   Alex Duran via llvm-commits
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• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Kshitij Paranjape via llvm-commits
• [llvm] [LoopAccessAnalysis] Fix type mismatch (PR #183116)   Kshitij Paranjape via llvm-commits
• [llvm] [offload][l0][nfc] remove duplicated entry (PR #185855)   Alex Duran via llvm-commits
• [llvm] [X86] LowerINTRINSIC_W_CHAIN - ensure the X86ISD::CMPCCXADD X86CondCode is a i8 target constant (PR #185856)   Simon Pilgrim via llvm-commits
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• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Mikhail Gudim via llvm-commits
• [llvm] 72914a2 - [X86] Enable i512 fshl/fshr lowering on avx512 targets (#185615)   via llvm-commits
• [llvm] [AMDGPU] Implement LSR cost model for GFX9+ (PR #184138)   via llvm-commits
• [llvm] [X86] Enable i512 fshl/fshr lowering on avx512 targets (PR #185615)   Simon Pilgrim via llvm-commits
• [llvm] [mlir] [openmp] [mlir][llvmir][OpenMP] Translate affinity clause in task construct to llvmir (PR #182223)   Tom Eccles via llvm-commits
• [llvm] [AMDGPU] ISel & PEI for whole wave functions (PR #145858)   Diana Picus via llvm-commits
• [llvm] [X86] LowerINTRINSIC_W_CHAIN - ensure the X86ISD::CMPCCXADD X86CondCode is a i8 target constant (PR #185856)   Sergei Barannikov via llvm-commits
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• [llvm] [NFC][SPIRV] New test for untested SPIRV backend case (PR #185686)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] New test for untested SPIRV backend case (PR #185686)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   Luke Lau via llvm-commits
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• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   via llvm-commits
• [llvm] [SPIRV] fix `alloca` -> `OpVariable` lowering (PR #164175)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] fix `alloca` -> `OpVariable` lowering (PR #164175)   Juan Manuel Martinez Caamaño via llvm-commits
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• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Peter Smith via llvm-commits
• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   Luke Lau via llvm-commits
• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   David Green via llvm-commits
• [llvm] [SPIRV] fix `alloca` -> `OpVariable` lowering (PR #164175)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Kshitij Paranjape via llvm-commits
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• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Luke Lau via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Luke Lau via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Luke Lau via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Luke Lau via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   Luke Lau via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Florian Hahn via llvm-commits
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• [llvm] [RISCV] Replace HasStdExtZbcOrZbkc with HasStdExtZbkc. NFC (PR #185790)   LLVM Continuous Integration via llvm-commits
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• [llvm] aa90add - [SLP]Track vectorized values in reductions for correct handling between vectorization   Alexey Bataev via llvm-commits
• [llvm] [VPlan] Handle FindLast in VPIRFlags::printFlags (PR #185857)   Benjamin Maxwell via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Alexey Bataev via llvm-commits
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• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Kshitij Paranjape via llvm-commits
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• [llvm] [InstCombine] Fold `fcmp ord/uno (fptrunc X), C` to `fcmp ord/uno X, C` (PR #185848)   Tirthankar Mazumder via llvm-commits
• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   via llvm-commits
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• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Steven Perron via llvm-commits
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• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Steven Perron via llvm-commits
• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   Florian Hahn via llvm-commits
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• [llvm] [X86] Add mayLoad/mayStore to legacy instructions CMPS/LODS/MOVS/SCAS/STOS (PR #185689)   Simon Pilgrim via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Mikael Holmen via llvm-commits
• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   Florian Hahn via llvm-commits
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• [libcxx] [llvm] [libc++] Switch to the new docker image in the CI (PR #185843)   Nikolas Klauser via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [AArch64] Optimize vector slide shuffles with zeros to use shift instructions (PR #185170)   David Green via llvm-commits
• [llvm] [LV] Simplify the chain traversal in `getScaledReductions()` (NFCI) (PR #184830)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [BOLT][AArch64] Add minimal support for liveness analysis. (PR #183298)   Alexandros Lamprineas via llvm-commits
• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Florian Hahn via llvm-commits
• [llvm] 78a4b8e - [AArch64] fuse constant addition after sbb (#185117)   via llvm-commits
• [llvm] [AArch64] fuse constant addition after sbb (PR #185117)   David Green via llvm-commits
• [llvm] d432263 - [LAA] Fix type mismatch in getStartAndEndForAccess. (#183116)   via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   Mirko Brkušanin via llvm-commits
• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Kshitij Paranjape via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   via llvm-commits
• [llvm] [AMDGPU][MC] Update old and add new min/max instructions for gfx1170 (PR #184601)   Mirko Brkušanin via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   via llvm-commits
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• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [CoroSplit] Fix infinite loop in CoroSplit (PR #185599)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] 18cb220 - [SPIR-V] Fix lowering of declarations with hidden visibility (#185029)   via llvm-commits
• [llvm] [SPIR-V] Fix lowering of declarations with hidden visibility (PR #185029)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Handled `NonContig` Descriptor `DimCount` (PR #181987)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (PR #185882)   Jay Foad via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Support expression semantics in target update fields with non-contiguous array sections (PR #176708)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   Arseniy Obolenskiy via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
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• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
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• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Peter Smith via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   Steven Perron via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
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• [llvm] [ARM] Use FPRegs for fastcc calling convention detection. (PR #184593)   David Green via llvm-commits
• [llvm] [HLSL][SPIRV] Codegen unbound array as OpTypeRuntimeArray (PR #185551)   Steven Perron via llvm-commits
• [lld] [LLD][ELF][RISCV] Support big-endian RISC-V linking (PR #180912)   Djordje Todorovic via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
• [llvm] [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (PR #185882)   Jay Foad via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Graham Hunter via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Graham Hunter via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Nick Sarnie via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   Steven Perron via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   Alexandre Ganea via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   Steven Perron via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
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• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (PR #185882)   Jay Foad via llvm-commits
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• [llvm] [OFFLOAD] Enable Level Zero unittests (PR #185492)   Łukasz Plewa via llvm-commits
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• [llvm] [SPIRV] fix `alloca` -> `OpVariable` lowering (PR #164175)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIRV] fix `alloca` -> `OpVariable` lowering (PR #164175)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Shivam Gupta via llvm-commits
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• [llvm] [SPIRV] fix `alloca` -> `OpVariable` lowering (PR #164175)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Kshitij Paranjape via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [LAA] Fix type mismatch in getStartAndEndForAccess. (PR #183116)   Kshitij Paranjape via llvm-commits
• [llvm] [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (PR #185882)   Shilei Tian via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RISCV] Make `GPR` and `FRP` "canonical" classes. (PR #185887)   Mikhail Gudim via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   via llvm-commits
• [clang] [llvm] [NVPTX] Fix scoped atomic when given runtime values (PR #185883)   Lewis Crawford via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Graham Hunter via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Graham Hunter via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [clang] [llvm] [NVPTX] Fix scoped atomic when given runtime values (PR #185883)   Joseph Huber via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Nick Sarnie via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Simon Tatham via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Nick Sarnie via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
• [llvm] [AMDGPU][True16] Use COPY instead of V_MOV for non-imm operand in movePackToVALU lowering (PR #185754)   Joe Nash via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [llvm] [ARM] Port LowerSELECTWithCmpZero to ARM (PR #151890)   Simon Pilgrim via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [llvm] [AMDGPU] Codegen for min/max instructions for gfx1170 (PR #185625)   Mirko Brkušanin via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Yury Plyakhin via llvm-commits
• [llvm] [HLSL][SPIR-V] Add resource load level intrinsics and SPIR-V backend support (PR #185707)   Nathan Gauër via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   Nathan Gauër via llvm-commits
• [clang] [llvm] [AMDGPU] Restrict `@llvm.amdgcn.image.*` intrinsic's dmask argument (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [ARM] Port LowerSELECTWithCmpZero to ARM (PR #151890)   via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] [LoopUnroll][NFC] Move unroll pragma helper functions to LoopUnroll.cpp (PR #185895)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll][NFC] Move unroll pragma helper functions to LoopUnroll.cpp (PR #185895)   via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [llvm] [LoopUnroll][NFC] Move unroll pragma helper functions to LoopUnroll.cpp (PR #185895)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [lldb] [llvm] [lldb-dap][windows] add integratedTerminal support (PR #174635)   Charles Zablit via llvm-commits
• [llvm] [ARM] Create ConvertToComparesPass (PR #155530)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   via llvm-commits
• [llvm] [CodeGenPrepare] Failure to hoist bitcast to legal type causes register splitting (PR #183067)   via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [llvm] [WebAssembly][FastISel] Fold AND mask operations into ZExt load (PR #183743)   Derek Schuff via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   Mirko Brkušanin via llvm-commits
• [llvm] 7fed2b1 - [llubi] Add support for freeze (#185718)   via llvm-commits
• [llvm] [llubi] Add support for freeze (PR #185718)   Yingwei Zheng via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   Adel Ejjeh via llvm-commits
• [llvm] [ValueTracking] Conservative nosync check prevents vectorization (PR #181345)   Kshitij Paranjape via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   Mirko Brkušanin via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy][NFC] Remove the `ObjCModuleTest.cpp` unit test (PR #185832)   via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   antoine moynault via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   Mirko Brkušanin via llvm-commits
• [llvm] [PowerPC][NFC] Refactor Register class and operand definitons (PR #185647)   Amy Kwan via llvm-commits
• [llvm] [PowerPC][NFC] Refactor Register class and operand definitons (PR #185647)   Amy Kwan via llvm-commits
• [llvm] [PowerPC][NFC] Refactor Register class and operand definitons (PR #185647)   Amy Kwan via llvm-commits
• [llvm] 9348026 - [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (#185413)   via llvm-commits
• [clang] [llvm] [llvm][offload] Change Intel's SPIRV wrapper from ELF to OffloadBinary (PR #185413)   Alex Duran via llvm-commits
• [llvm] [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (PR #185882)   Jay Foad via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoopUnroll][NFC] Move unroll pragma helper functions to LoopUnroll.cpp (PR #185895)   Jan Patrick Lehr via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   via llvm-commits
• [llvm] [AMDGPU] Codegen for min/max instructions for gfx1170 (PR #185625)   via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   Adel Ejjeh via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Anshil Gandhi via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [ARM] Fold SELECT (AND(X,1) == 0), C1, C2 -> XOR(C1,AND(NEG(AND(X,1)),XOR(C1,C2)) in Thumb1 (PR #185898)   via llvm-commits
• [llvm] [ARM] Port LowerSELECTWithCmpZero to ARM (PR #151890)   via llvm-commits
• [llvm] [LoopUnroll][NFC] Move unroll pragma helper functions to LoopUnroll.cpp (PR #185895)   Adel Ejjeh via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   Peter Klausler via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   Adel Ejjeh via llvm-commits
• [llvm] [TableGen] Let -register-info-debug dump the Artificial flag (PR #185899)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   Adel Ejjeh via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [TableGen] Let -register-info-debug dump the Artificial flag (PR #185899)   via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Fabian Ritter via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Fabian Ritter via llvm-commits
• [llvm] [X86] Blocklist instructions that are unsafe for masked-load folding. (PR #178888)   via llvm-commits
• [llvm] b2a3c22 - InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (#184123)   via llvm-commits
• [llvm] InstCombine: Baseline tests for SimplifyDemandedFPClass phi support (PR #184123)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Support basic phis in SimplifyDemandedFPClass (PR #184124)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Support basic phis in SimplifyDemandedFPClass (PR #184124)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Support basic phis in SimplifyDemandedFPClass (PR #184124)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Petar Avramovic via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Let -register-info-debug dump the Artificial flag (PR #185899)   Ivan Kosarev via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix matchUseVectorTruncate to check element order before folding (PR #185834)   David Green via llvm-commits
• [llvm] 3a8a43f - [AArch64][GlobalISel] Fix matchUseVectorTruncate to check element order before folding (#185834)   via llvm-commits
• [llvm] [MacroFusion] Add [[maybe_unused]] to suppress some warings (PR #185833)   Matt Arsenault via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   Farzon Lotfi via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Fabian Ritter via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop `using llvm::AMDGPU` (PR #180782)   via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Brox Chen via llvm-commits
• [llvm] [VectorCombine] Consolidate fragmented loads from shuffle chains into wide loads (PR #177571)   via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Ramkumar Ramachandra via llvm-commits
• [llvm] AMDGPU: Add more tests for fp min/max combines (PR #184336)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [offload][lit] XFAIL new tests failing on intelgpu (PR #185908)   Nick Sarnie via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Dexter] Add missing calls to SBDebugger::{Initialize,Terminate} (PR #185535)   Jonas Devlieghere via llvm-commits
• [llvm] [TableGen] Let -register-info-debug dump the Artificial flag (PR #185899)   Jay Foad via llvm-commits
• [llvm] [offload][lit] XFAIL new tests failing on intelgpu (PR #185908)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL new tests failing on intelgpu (PR #185908)   Nick Sarnie via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] 6fc6de0 - [DirectX] Split long vectors in DXILResourceAccess (#184732)   via llvm-commits
• [llvm] [DirectX] Split long vectors in DXILResourceAccess (PR #184732)   Justin Bogner via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Simon Pilgrim via llvm-commits
• [llvm] [bazel][mlir] Remove non-existent file mlir/run_lit.sh (PR #185729)   Jordan Rupprecht via llvm-commits
• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   via llvm-commits
• [llvm] b1bc05d - [DataLayout] Add a specifier for element-aligned vectors (#180617)   via llvm-commits
• [llvm] [DataLayout] Add a specifier for element-aligned vectors (PR #180617)   Justin Bogner via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   Viktoria Maximova via llvm-commits
• [llvm] 79d2444 - [TableGen] Let -register-info-debug dump the Artificial flag (#185899)   via llvm-commits
• [llvm] [TableGen] Let -register-info-debug dump the Artificial flag (PR #185899)   Jay Foad via llvm-commits
• [llvm] [Runtimes] Prevent builtins from clobbering runtimes configuration (PR #185664)   Petr Hosek via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Aiden Grossman via llvm-commits
• [llvm] 0195511 - [InstCombine] Fix profile metadata propagation in InstCombine select folding (#179743)   via llvm-commits
• [clang] [llvm] [DirectX] Specify element-aligned vectors (PR #180622)   Justin Bogner via llvm-commits
• [llvm] [InstCombine] Fix profile metadata propagation in InstCombine select folding (PR #179743)   Snehasish Kumar via llvm-commits
• [llvm] [InstCombine] Propagate profile metadata when factoring logic operations (PR #179744)   Snehasish Kumar via llvm-commits
• [llvm] 2f5d9b6 - InstCombine: Support basic phis in SimplifyDemandedFPClass (#184124)   via llvm-commits
• [llvm] InstCombine: Support basic phis in SimplifyDemandedFPClass (PR #184124)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Jay Foad via llvm-commits
• [llvm] a5aa136 - [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (#185878)   via llvm-commits
• [llvm] [AMDGPU] Add GFX11_7Insts feature, eliminate isGFX1170 helpers. NFC (PR #185878)   Mirko Brkušanin via llvm-commits
• [llvm] [offload][lit] XFAIL new tests failing on intelgpu (PR #185908)   Nick Sarnie via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Craig Topper via llvm-commits
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• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   Petar Avramovic via llvm-commits
• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Drop MaxCounter member variable (PR #181092)   Jay Foad via llvm-commits
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• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Graham Hunter via llvm-commits
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• [llvm] [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (PR #185882)   Jay Foad via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Benjamin Maxwell via llvm-commits
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• [llvm] [LLVM][CodeGen][SVE] Refactor isel of 128-bit constant splats. (PR #185652)   Benjamin Maxwell via llvm-commits
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• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Luke Lau via llvm-commits
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• [llvm] [AArch64] Fold NEON splats into users by using SVE immediates (PR #165559)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Florian Hahn via llvm-commits
• [llvm] [DWARFLinker] Fix DW_AT_LLVM_stmt_sequence attributes patched to wrong offsets (PR #178486)   LLVM Continuous Integration via llvm-commits
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• [llvm] ae920e2 - [Docs] Remove references to IWG in GitRepositoryPolicy (#185919)   via llvm-commits
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• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Shivam Gupta via llvm-commits
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• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
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• [clang] [llvm] [HLSL] Implement Texture2D::Load methods and builtin (PR #185708)   Steven Perron via llvm-commits
• [llvm] [TableGen] Fix MUL case in DAG default operands test (PR #185847)   Jay Foad via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] [TableGen] Fix MUL case in DAG default operands test (PR #185847)   Jay Foad via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
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• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Shivam Gupta via llvm-commits
• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [TableGen] Fix MUL case in DAG default operands test (PR #185847)   Simon Tatham via llvm-commits
• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Analysis] Extend llvm.experimental.cttz.elts to type-based-cost (PR #184578)   Graham Hunter via llvm-commits
• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)   via llvm-commits
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• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   via llvm-commits
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• [llvm] 319808c - [TableGen] Fix MUL case in DAG default operands test (#185847)   via llvm-commits
• [llvm] [TableGen] Fix MUL case in DAG default operands test (PR #185847)   Jay Foad via llvm-commits
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• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] e8275df - [SamplePGO] Add a flag to disable salvage-unused-profile for large modules. (#185354)   via llvm-commits
• [llvm] [SamplePGO] Add a flag to disable salvage-unused-profile for large modules. (PR #185354)   Snehasish Kumar via llvm-commits
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• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Shafik Yaghmour via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Update WCG's IsExpertMode and MaxCounter per MF (PR #185916)   Jay Foad via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Yaxun Liu via llvm-commits
• [llvm] [DirectX] replace Br with UncondBr and CondBr in DXILBitCodeWriter (PR #185925)   via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add poisoning value handle for VPValue. (NFCI) (PR #185054)   Luke Lau via llvm-commits
• [llvm] [X86][llvm-exegesis] Add support for emeraldrapids (PR #185928)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Ensure FPR128 callee-save stack offsets are aligned (PR #184314)   via llvm-commits
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• [llvm] [LSR] Narrow search space by merging users outside and inside loop (PR #185929)   John Brawn via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
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• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Update WCG's IsExpertMode and MaxCounter per MF (PR #185916)   via llvm-commits
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• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   Arseniy Obolenskiy via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Aiden Grossman via llvm-commits
• [llvm] 208c70f - [HLSL][SPIRV] Update reversebits codegen for half types (#184936)   via llvm-commits
• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   via llvm-commits
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• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Brox Chen via llvm-commits
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• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn sin cos intrinsics. (PR #185934)   Syadus Sefat via llvm-commits
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• [llvm] [DirectX] replace Br with UncondBr and CondBr in DXILBitCodeWriter (PR #185925)   Farzon Lotfi via llvm-commits
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• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn sin cos intrinsics. (PR #185934)   via llvm-commits
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• [clang] [llvm] [WebAssembly] Support acquire-release atomics in CodeGen (PR #184900)   Derek Schuff via llvm-commits
• [compiler-rt] Revert "[CFI] Expand test to include minimal runtime" (PR #185935)   Nico Weber via llvm-commits
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• [flang] [llvm] [mlir] [mlir][IR] Rename `DenseIntOrFPElementsAttr` to `DenseTypedElementsAttr` (PR #185687)   Jacques Pienaar via llvm-commits
• [flang] [llvm] [mlir] [mlir][IR] Rename `DenseIntOrFPElementsAttr` to `DenseTypedElementsAttr` (PR #185687)   Jacques Pienaar via llvm-commits
• [compiler-rt] compiler-rt/arm: Check for overflow when adding float denorms (PR #185245)   Keith Packard via llvm-commits
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• [llvm] [NFC] Make bit20 fixed for Sys Register move instructions (PR #185709)   via llvm-commits
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• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   Florian Hahn via llvm-commits
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• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Vy Nguyen via llvm-commits
• [lld] [ELF] Fix -u with TLS symbols: propagate type from STT_NOTYPE to STT_TLS (PR #185794)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Make `GPR` and `FPR` "canonical" classes. (PR #185887)   Mikhail Gudim via llvm-commits
• [lld] [ELF] Fix -u with TLS symbols: propagate type from STT_NOTYPE to STT_TLS (PR #185794)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Make `GPR` and `FPR` "canonical" classes. (PR #185887)   Mikhail Gudim via llvm-commits
• [flang] [llvm] [mlir] [mlir][IR] Rename `DenseIntOrFPElementsAttr` to `DenseTypedElementsAttr` (PR #185687)   Renato Golin via llvm-commits
• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Vy Nguyen via llvm-commits
• [llvm] [lldb] Add function signatures types in lldbDataFormatters (PR #185940)   via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)   Anshul Nigham via llvm-commits
• [compiler-rt] d371f42 - Revert "[CFI] Expand test to include minimal runtime" (#185935)   via llvm-commits
• [compiler-rt] Revert "[CFI] Expand test to include minimal runtime" (PR #185935)   Nico Weber via llvm-commits
• [llvm] [RISCV] Make `GPR` and `FPR` "canonical" classes. (PR #185887)   Mikhail Gudim via llvm-commits
• [llvm] [lldb] Add function signatures types in lldbDataFormatters (PR #185940)   Med Ismail Bennani via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   Paschalis Mpeis via llvm-commits
• [llvm] Add default code reviewers for some AMDGPU-related files (PR #185942)   Jacob Lambert via llvm-commits
• [llvm] [green dragon] update lldb-ubuntu to handle aarch64 multibranch pipeline (PR #185917)   Justice Adams via llvm-commits
• [lld] 0da4396 - [ELF] Fix -u with TLS symbols: propagate type from STT_NOTYPE to STT_TLS (#185794)   via llvm-commits
• [lld] [ELF] Fix -u with TLS symbols: propagate type from STT_NOTYPE to STT_TLS (PR #185794)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Add asm comments if setreg changes MSBs (PR #185774)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Add asm comments if setreg changes MSBs (PR #185774)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [lldb] Add function signatures types in lldbDataFormatters (PR #185940)   Dave Lee via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [lldb] Add types to function signatures in lldbDataFormatters (PR #185940)   Dave Lee via llvm-commits
• [llvm] Add default code reviewers for some AMDGPU-related files (PR #185942)   Jacob Lambert via llvm-commits
• [llvm] Add default code reviewers for some AMDGPU-related files (PR #185942)   Jacob Lambert via llvm-commits
• [llvm] ac2567c - [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (#185840)   via llvm-commits
• [llvm] [SPIR-V] Fix crash in SPIRVEmitIntrinsics for llvm.assume with operand bundles (PR #185840)   Dmitry Sidorov via llvm-commits
• [llvm] Add default code reviewers for some AMDGPU-related files (PR #185942)   Jacob Lambert via llvm-commits
• [llvm] Add default code reviewers for some AMDGPU-related files (PR #185942)   Jacob Lambert via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] ed42ac3 - [X86] Use shift+add/sub for vXi8 splat multiplies (#174110)   via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   via llvm-commits
• [llvm] [LLVM] [SeparateConstOffsetFromGEP] Fix sep-const-offset-from-gep invalid assumption (PR #183402)   Meredith Julian via llvm-commits
• [clang] [llvm] [DirectX] Specify element-aligned vectors (PR #180622)   Farzon Lotfi via llvm-commits
• [compiler-rt] [libc] [libc] Remove unused AOR_v20.02 directory (PR #185951)   via llvm-commits
• [llvm] [RISCV] Make `GPR` and `FPR` "canonical" classes. (PR #185887)   Mikhail Gudim via llvm-commits
• [compiler-rt] [libc] [libc] Remove unused AOR_v20.02 directory (PR #185951)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Update G_TRUNC tests (PR #180647)   Anshil Gandhi via llvm-commits
• [compiler-rt] [libc] [libc] Remove unused AOR_v20.02 directory (PR #185951)   Schrodinger ZHU Yifan via llvm-commits
• [clang] [llvm] [DirectX] Specify element-aligned vectors (PR #180622)   Finn Plummer via llvm-commits
• [compiler-rt] [libc] [libc] Remove unused AOR_v20.02 directory (PR #185951)   via llvm-commits
• [llvm] [RISCV][WIP] Let RA do the CSR saves. (PR #90819)   Craig Topper via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   via llvm-commits
• [llvm] [bazel] Add -Wno-vla-cxx-extension to macOS lldb srcs (PR #185945)   Keith Smiley via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   via llvm-commits
• [compiler-rt] [asan] Implement address sanitizer on AIX: shadow memory (PR #136874)   via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [lld] [lld] Two-level compression sort grouping with glob-based section matching (PR #185661)   Ellis Hoag via llvm-commits
• [llvm] [RISCV] Make selectShiftMask32/selectShiftMask64 a template function. NFC (PR #185957)   Craig Topper via llvm-commits
• [clang] [llvm] [DirectX] Specify element-aligned vectors (PR #180622)   Finn Plummer via llvm-commits
• [llvm] [AMDGPU] Recover high VGPRs from S_SETREG_IMM32_B32 in disasm (PR #185968)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Recover high VGPRs from S_SETREG_IMM32_B32 in disasm (PR #185968)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Recover high VGPRs from S_SETREG_IMM32_B32 in disasm (PR #185968)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [DA] Refactor the signature of the Weak Zero SIV tests (NFC) (PR #185825)   Ehsan Amiri via llvm-commits
• [llvm] [AMDGPU] Recover high VGPRs from S_SETREG_IMM32_B32 in disasm (PR #185968)   via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [SLP] Create SLP trees starting from constant stride stores (PR #185964)   Ryan Buchner via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   via llvm-commits
• [llvm] [SLP] Create SLP trees starting from constant stride stores (PR #185964)   Ryan Buchner via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   via llvm-commits
• [llvm] [LV] Fix crash in epilog vectorization (PR #185480)   Florian Hahn via llvm-commits
• [llvm] [SLP] Create SLP trees starting from constant stride stores (PR #185964)   Alexey Bataev via llvm-commits
• [llvm] [NFC] autogenerate disassembler tests with invalid MSR/MRS use (PR #185970)   via llvm-commits
• [llvm] [NFC] autogenerate disassembler tests with invalid MSR/MRS use (PR #185970)   via llvm-commits
• [llvm] [RISCV][P-ext] Remove unncessary patterns for setgt/setugt. NFC (PR #185971)   Craig Topper via llvm-commits
• [llvm] [RISCV][P-ext] Remove unncessary patterns for setgt/setugt. NFC (PR #185971)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Carlos Galvez via llvm-commits
• [llvm] [NFC] autogenerate disassembler tests with invalid MSR/MRS use (PR #185970)   via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   via llvm-commits
• [clang] [llvm] [sancov] add -fsanitize-coverage=trace-pc-entry-exit (PR #185972)   Jann Horn via llvm-commits
• [clang] [llvm] [sancov] add -fsanitize-coverage=trace-pc-entry-exit (PR #185972)   via llvm-commits
• [llvm] 9480187 - AMDGPU/GlobalISel: RegBankLegalize cvt_pk_u16/i16/pkrtz (#185534)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize cvt_pk_u16/i16/pkrtz (PR #185534)   via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Johannes Doerfert via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [llvm] [RISCV] Update Andes45 vector permutation scheduling info (PR #185591)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update Andes45 vector permutation scheduling info (PR #185591)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Update Andes45 vector permutation scheduling info (PR #185591)   Min-Yih Hsu via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [PowerPC][NFC] Refactor Register class and operand definitons (PR #185647)   Lei Huang via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [OpenMP] Move OpenMP implicit argument to the end and reformat (PR #185989)   Shilei Tian via llvm-commits
• [llvm] 6e93c4a - [DirectX] Specify element-aligned vectors (#180622)   via llvm-commits
• [clang] [llvm] [DirectX] Specify element-aligned vectors (PR #180622)   Justin Bogner via llvm-commits
• [clang] [llvm] [clang][DirectX] Specify element-aligned vectors in TargetInfo (PR #185954)   Justin Bogner via llvm-commits
• [clang] [llvm] AMDGPU: Add dereferenceable attribute to dispatch ptr intrinsic (PR #185955)   Shilei Tian via llvm-commits
• [llvm] [StackSlotColoring] Check for zero stack slot size in RemoveDeadStores (PR #182673)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU: Add more tests for fp min/max combines (PR #184336)   Shilei Tian via llvm-commits
• [llvm] [SLP] Create SLP trees starting from constant stride stores (PR #185964)   via llvm-commits
• [llvm] [RISCV] Use PatGprImm for riscv_psslai. NFC (PR #185996)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use PatGprImm for riscv_psslai. NFC (PR #185996)   via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for ds_read_tr* (PR #186006)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for ds_read_tr* (PR #186006)   via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] 472c8f8 - MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (#185820)   via llvm-commits
• [llvm] MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (PR #185820)   YunQiang Su via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   via llvm-commits
• [llvm] expandIS_FPCLASS: Support fcNegative and fcPositive (PR #184788)   YunQiang Su via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Jin Huang via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Snehasish Kumar via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Snehasish Kumar via llvm-commits
• [llvm] MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (PR #185820)   YunQiang Su via llvm-commits
• [llvm] MIPSr6: Fix COPY of reg:fgr64cc without fcmp in the same BB (PR #185820)   YunQiang Su via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Hubert Tong via llvm-commits
• [llvm] [docs][QualGroup] Update Qualification WG sync-up schedule and calendar links (PR #186011)   via llvm-commits
• [llvm] [docs][QualGroup] Update Qualification WG sync-up schedule and calendar links (PR #186011)   via llvm-commits
• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Chandler Carruth via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Artem Belevich via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Artem Belevich via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Artem Belevich via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Artem Belevich via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Artem Belevich via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Artem Belevich via llvm-commits
• [llvm] [QualGroup][docs] Clarify biannual membership review and active contributor status (PR #185884)   via llvm-commits
• [llvm] [docs][QualGroup] Update Qualification WG sync-up schedule and calendar links (PR #186011)   via llvm-commits
• [llvm] [docs][QualGroup] Update Qualification WG sync-up schedule and calendar links (PR #186011)   via llvm-commits
• [llvm] [LoopUnroll][NVPTX] Boost full unroll threshold to enable alloca promotion (PR #184855)   Akshay Deodhar via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Nathan Chancellor via llvm-commits
• [llvm] [SLP] Pre-commit tests for constant strided stores (PR #185990)   LLVM Continuous Integration via llvm-commits
• [llvm] 0b332de - [RISCV] Update Andes45 vector permutation scheduling info (#185591)   via llvm-commits
• [llvm] [RISCV] Update Andes45 vector permutation scheduling info (PR #185591)   Jim Lin via llvm-commits
• [llvm] 3ca069c - [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (#184942)   via llvm-commits
• [llvm] [CodeGen][TTI] Reduce funnel shift cost for constant shift amounts (PR #184942)   Jim Lin via llvm-commits
• [llvm] [QualGroup][docs] Clarify biannual membership review and active contributor status (PR #185884)   Zaky Hermawan via llvm-commits
• [llvm] [QualGroup][docs] Clarify biannual membership review and active contributor status (PR #185884)   Zaky Hermawan via llvm-commits
• [llvm] [QualGroup][docs] Clarify biannual membership review and active contributor status (PR #185884)   Zaky Hermawan via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Craig Topper via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for FFBH/FFBL (PR #186017)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for FFBH/FFBL (PR #186017)   via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [profcheck][coro] Adding Branch weights PGO in Coroutines Passes (PR #184466)   Chuanqi Xu via llvm-commits
• [llvm] [NewPM] Port for AArch64CompressJumpTables (PR #186020)   Anshul Nigham via llvm-commits
• [llvm] [NewPM] Port for AArch64CompressJumpTables (PR #186020)   via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] [GISel] Add operands check for G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR in buildInstr (PR #186021)   Jianjian Guan via llvm-commits
• [llvm] [GISel] Add operands check for G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR in buildInstr (PR #186021)   via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   via llvm-commits
• [llvm] [RISCV][GISel] Support select G_INSERT_SUBVECTOR (PR #171092)   Jianjian Guan via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ds_swizzle (PR #186024)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ds_swizzle (PR #186024)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [clang] [llvm] [mlir] [OpenMP] Move OpenMP implicit argument to the end and reformat (PR #185989)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [GISel] Add operands check for G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR in buildInstr (PR #186021)   Craig Topper via llvm-commits
• [llvm] 0535075 - [RISCV] Use PatGprImm for riscv_psslai. NFC (#185996)   via llvm-commits
• [llvm] [RISCV] Use PatGprImm for riscv_psslai. NFC (PR #185996)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   Phoebe Wang via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   Phoebe Wang via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Luke Lau via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBitXor function (PR #185776)   Kaitlin Peng via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   via llvm-commits
• [llvm] [SystemZ] Memoize findCCUse result to prune repetitive recursive calls for already computed SDValue Node (PR #186027)   via llvm-commits
• [clang] [llvm] [inlineasm] Add special support for "rm" inline asm constraints (PR #181973)   Fangrui Song via llvm-commits
• [llvm] [SystemZ] Memoize findCCUse result to prune repetitive recursive calls for already computed SDValue Node (PR #186027)   via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add computeKnownBits fallback DemandedElts handling and tests (PR #186025)   Youngsun Yoo via llvm-commits
• [clang] [llvm] [mlir] [OpenMP] Move OpenMP implicit argument to the end and reformat (PR #185989)   Kevin Sala Penades via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Craig Topper via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   Phoebe Wang via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   Phoebe Wang via llvm-commits
• [llvm] [x86][GlobalISel] Select MOV32ri64 for unsigned 32-bit i64 constants (PR #185182)   Levi Laine via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [clang] [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jason Molenda via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for kernarg_segment_ptr (PR #186029)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Create a WCG instance per MF (PR #185916)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [openmp] [OFFLOAD] Add spirv implementation for named barrier (PR #180393)   via llvm-commits
• [llvm] [openmp] [OFFLOAD] Add spirv implementation for named barrier (PR #180393)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Create a WCG instance per MF (PR #185916)   via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Nicolai Hähnle via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Shivam Kunwar via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for lds_param_load (PR #186035)   via llvm-commits
• [llvm] [LoopUnrollPass] Remove unecessary `!TripCount` checks (NFC) (PR #186036)   Justin Fargnoli via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [llvm] [QualGroup][docs] Clarify biannual membership review and active contributor status (PR #185884)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Yanzuo Liu via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Zeyi Xu via llvm-commits
• [llvm] [AMDGPU] Make chain functions receive a stack pointer (PR #184616)   via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [llvm] 2f8c731 - [X86] Remove `NoSignedZerosFPMath` uses (#163902)   via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Fangrui Song via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   via llvm-commits
• [llvm] [llvm][support] Refactor symlink handling and add readlink (PR #184256)   Michael Spencer via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Igor Kudrin via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   via llvm-commits
• [llvm] [AMDGPU] Add hint for MFMA Dst and OpC (PR #185218)   Josh Hutton via llvm-commits
• [llvm] [AMDGPU] Add hint for MFMA Dst and OpC (PR #185218)   via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   LLVM Continuous Integration via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Kevin Sala Penades via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] 9ca9ca3 - [MacroFusion] Add [[maybe_unused]] to suppress some warings (#185833)   via llvm-commits
• [llvm] [MacroFusion] Add [[maybe_unused]] to suppress some warings (PR #185833)   Pengcheng Wang via llvm-commits
• [llvm] 763de90 - [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (#184963)   via llvm-commits
• [llvm] [RISCV] Add register group overlap checks to the assembler for vector indexed segment load (PR #184963)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Shih-Po Hung via llvm-commits
• [llvm] [X86] Remove `NoNaNsFPMath` uses (PR #185582)   via llvm-commits
• [llvm] 7cb3005 - AMDGPU: Add dereferenceable attribute to dispatch ptr intrinsic (#185955)   via llvm-commits
• [clang] [llvm] AMDGPU: Add dereferenceable attribute to dispatch ptr intrinsic (PR #185955)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Fangrui Song via llvm-commits
• [lldb] [llvm] [lldb] Skip tests that are incompatible with MTE (PR #186043)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [lldb] Skip tests that are incompatible with MTE (PR #186043)   Jonas Devlieghere via llvm-commits
• [lldb] [llvm] [lldb] Skip tests that are incompatible with MTE (PR #186043)   via llvm-commits
• [lldb] [llvm] [lldb] Skip tests that are incompatible with MTE (PR #186043)   via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] [MacroFusion] Add [[maybe_unused]] to suppress some warings (PR #185833)   LLVM Continuous Integration via llvm-commits
• [llvm] Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options. NFC (PR #186044)   Fangrui Song via llvm-commits
• [llvm] Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options. NFC (PR #186044)   Fangrui Song via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] Prototype: removing the `IncludeStyle` option (PR #185879)   Victor Chernyakin via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] fddc2c0 - [SimplifyCFG] Simplify identical predecessors (#173022)   via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   Kunqiu Chen via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   via llvm-commits
• [llvm] [X86] Remove `NoNaNsFPMath` uses (PR #185582)   via llvm-commits
• [llvm] [X86] Remove `NoNaNsFPMath` uses (PR #185582)   via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [llvm] 11e0d6a - [SystemZ] Limit depth of findCCUse() (#185922)   via llvm-commits
• [llvm] [SystemZ] Limit depth of findCCUse() (PR #185922)   Nikita Popov via llvm-commits
• [llvm] [DWARFLinker] Fix DW_AT_LLVM_stmt_sequence attributes patched to wrong offsets (PR #178486)   LLVM Continuous Integration via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Florian Hahn via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   Simon Pilgrim via llvm-commits
• [llvm] 1f583c6 - [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (#152831)   via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP][Offload] Add offload runtime support for dyn_groupprivate clause (PR #152831)   Kevin Sala Penades via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Dharuni R Acharya via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [InstCombine] Fold `bitcast [x, ..., x] to iN` to `mul x, C` (PR #185907)   Kunqiu Chen via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Gergo Stomfai via llvm-commits
• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   Arseniy Obolenskiy via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LoongArch] Type legalize v2f32 loads by using an f64 load and a scalar_to_vector (PR #164943)   Zhaoxin Yang via llvm-commits
• [llvm] 44eb037 - [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (#185896)   via llvm-commits
• [llvm] [X86] Improve handling of i512 SRL(SIGN_BIT, Amt) (PR #185896)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   LLVM Continuous Integration via llvm-commits
• [llvm] [SimplifyCFG] Simplify identical predecessors (PR #173022)   LLVM Continuous Integration via llvm-commits
• [llvm] MIPS/expandAtomicBinOp: Remove tailing kill dead register operands (PR #186055)   YunQiang Su via llvm-commits
• [llvm] MIPS/expandAtomicBinOp: Remove tailing kill dead register operands (PR #186055)   via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   David Spickett via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   David Spickett via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Load methods and builtin (PR #185708)   Nathan Gauër via llvm-commits
• [llvm] [docs][QualGroup] Update Qualification WG sync-up schedule and calendar links (PR #186011)   via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Ádám Kallai via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   David Spickett via llvm-commits
• [llvm] [Support] formatv: non-negative-plus for integral numbers (PR #185008)   David Spickett via llvm-commits
• [llvm] [llvm][Support] formatv: non-negative-plus for integral numbers (PR #185008)   David Spickett via llvm-commits
• [llvm] [llvm][Support] formatv: non-negative-plus for integral numbers (PR #185008)   David Spickett via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #185410)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   David Sherwood via llvm-commits
• [lldb] [llvm] [lldb] Skip tests that are incompatible with MTE (PR #186043)   David Spickett via llvm-commits
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• [lldb] [llvm] [lldb] Skip tests that are incompatible with MTE (PR #186043)   David Spickett via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   Chuanqi Xu via llvm-commits
• [llvm] [VPlan] Extend interleave-group-narrowing to WidenCast (PR #183204)   Ramkumar Ramachandra via llvm-commits
• [llvm] [BOLT] Spawn buildid-list perf job at perf2bolt start. NFC (PR #185865)   Ádám Kallai via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Create a WCG instance per MF (PR #185916)   Jay Foad via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Jay Foad via llvm-commits
• [libcxx] [llvm] [libc++] Update to Clang 21 as the oldest supported version (PR #186062)   Nikolas Klauser via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add support for arbitrary precision integer constants in instruction printer (PR #185306)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested case in SILowerSGPRSpills (PR #186067)   via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] C1-Ultra Scheduling model (PR #182251)   Nashe Mncube via llvm-commits
• [llvm] Revert "[SDAG] (abs (add nsw a, -b)) -> (abds a, b)" (#17580) (PR #186068)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[SDAG] (abs (add nsw a, -b)) -> (abds a, b)" (#17580) (PR #186068)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[SDAG] (abs (add nsw a, -b)) -> (abds a, b)" (#17580) (PR #186068)   via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Dimitrij Mijoski via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Jay Foad via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [libcxx] [llvm] [libc++] Fix checks for terminal and flushes in std::print() (PR #70321)   Nikolas Klauser via llvm-commits
• [llvm] [Offload] AMD Flang bot to use CMake cache file (PR #186070)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] AMD Flang bot to use CMake cache file (PR #186070)   via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Rohit Aggarwal via llvm-commits
• [llvm] [RISCV] Disable use of scalable vectors for VLEN=32 (PR #185553)   Luke Lau via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Jay Foad via llvm-commits
• [llvm] [Offload] AMD Flang bot to use CMake cache file (PR #186070)   Michael Kruse via llvm-commits
• [llvm] Revert "[VPlan] Extend interleave-group-narrowing to WidenCast" (PR #186072)   Ramkumar Ramachandra via llvm-commits
• [llvm] Revert "[VPlan] Extend interleave-group-narrowing to WidenCast" (PR #186072)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   Stefan Gränitz via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   via llvm-commits
• [llvm] [AArch64] Tweak the cost-model of partial reductions to mitigate regressions from #181706 (PR #181707)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Mel Chen via llvm-commits
• [llvm] [Inliner] Fix return attribute propagation across multiple return sites (PR #186076)   Yunbo Ni via llvm-commits
• [llvm] [Inliner] Fix return attribute propagation across multiple return sites (PR #186076)   via llvm-commits
• [llvm] [X86] 2011-12-15-vec_shift.ll - regenerate test checks (PR #186077)   Simon Pilgrim via llvm-commits
• [llvm] 99b8be8 - [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (#185882)   via llvm-commits
• [llvm] [AMDGPU] Use an X-macro to define ELF machine types and names. NFCI. (PR #185882)   Jay Foad via llvm-commits
• [llvm] [X86] 2011-12-15-vec_shift.ll - regenerate test checks (PR #186077)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested case in SILowerSGPRSpills (PR #186067)   via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested case in SILowerSGPRSpills (PR #186067)   via llvm-commits
• [llvm] c5eacac - [LV] Fix another invalidated iterator in handleFindLastReductions (#185712)   via llvm-commits
• [llvm] [LV] Fix another invalidated iterator in handleFindLastReductions (PR #185712)   Graham Hunter via llvm-commits
• [llvm] 9b6391f - [AArch64][SVE] Add unpacked fp ISel patterns for clastb (#185688)   via llvm-commits
• [llvm] [AArch64][SVE] Add unpacked fp ISel patterns for clastb (PR #185688)   Graham Hunter via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Peter Smith via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [X86] Fix fcmp+select to min/max lowering (PR #185594)   Nikita Popov via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Durgadoss R via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Honey Goyal via llvm-commits
• [llvm] [Offload] AMD Flang bot to use CMake cache file (PR #186070)   Jan Patrick Lehr via llvm-commits
• [llvm] [X86] Blocklist instructions that are unsafe for masked-load folding. (PR #178888)   Simon Pilgrim via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   Alexandros Lamprineas via llvm-commits
• [llvm] [SPIR-V] Fix aggregate PHI type mismatch in loops (PR #186086)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix aggregate PHI type mismatch in loops (PR #186086)   via llvm-commits
• [llvm] [SPIR-V] Fix aggregate PHI type mismatch in loops (PR #186086)   Arseniy Obolenskiy via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Convert gather loads with constant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [clang] [llvm] [clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a shift operations (PR #186087)   via llvm-commits
• [clang] [llvm] [clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a shift operations (PR #186087)   via llvm-commits
• [clang] [llvm] [clang][AArch64][SVE2p3][SME2p3] Add intrinsics for v9.7a shift operations (PR #186087)   via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Simon Pilgrim via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Alex Duran via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Peter Smith via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Durgadoss R via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Peter Smith via llvm-commits
• [llvm] 6fc7b3f - [X86] 2011-12-15-vec_shift.ll - regenerate test checks (#186077)   via llvm-commits
• [llvm] [X86] 2011-12-15-vec_shift.ll - regenerate test checks (PR #186077)   Simon Pilgrim via llvm-commits
• [llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)   Alexandros Lamprineas via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Durgadoss R via llvm-commits
• [llvm] [llvm][Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [llvm][Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [Offload] AMD Flang bot to use CMake cache file (PR #186070)   Jan Patrick Lehr via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested case in SILowerSGPRSpills (PR #186067)   via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL] Implement Texture2D::Load methods and builtin (PR #185708)   Steven Perron via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] insert_subvector(undef, splat(C), 0) -> splat(C). (PR #186090)   Paul Walker via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] insert_subvector(undef, splat(C), 0) -> splat(C). (PR #186090)   via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] Refactor isel of 128-bit constant splats. (PR #185652)   Paul Walker via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   Jack Styles via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   Jack Styles via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Piotr Fusik via llvm-commits
• [llvm] [SPIR-V] Fix aggregate PHI type mismatch in loops (PR #186086)   via llvm-commits
• [llvm] [SPIR-V] Fix aggregate PHI type mismatch in loops (PR #186086)   via llvm-commits
• [llvm] 0fb8f7f - [DAG] Fold away identity FSHL and FSHR patterns (#185667)   via llvm-commits
• [llvm] [DAG] Fold away identity FSHL and FSHR patterns (PR #185667)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm][utils] Handle Issue/PR authors having no full name set (PR #186094)   David Spickett via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [llvm][utils] Handle Issue/PR authors having no full name set (PR #186094)   David Spickett via llvm-commits
• [llvm] [llvm][utils] Handle Issue/PR authors having no full name set (PR #186094)   David Spickett via llvm-commits
• [llvm] Revert "[VPlan] Extend interleave-group-narrowing to WidenCast" (PR #186072)   Florian Hahn via llvm-commits
• [llvm] [IVDescriptors] Remove single-use constraint from FindLast comparisons (PR #186096)   Graham Hunter via llvm-commits
• [llvm] [Offload] Add CMake alias for CI (PR #186099)   Jan Patrick Lehr via llvm-commits
• [llvm] [IVDescriptors] Remove single-use constraint from FindLast comparisons (PR #186096)   Graham Hunter via llvm-commits
• [llvm] [Offload] Add CMake alias for CI (PR #186099)   via llvm-commits
• [llvm] [AMDGPU] Allow bank conflicts on src0 for V_DUAL_MOV_B32 for gfx1170 (PR #186100)   Mirko Brkušanin via llvm-commits
• [llvm] [llvm-link] Inherit data layout from first archive member (PR #186098)   Paulius Velesko via llvm-commits
• [llvm] [AMDGPU] Allow bank conflicts on src0 for V_DUAL_MOV_B32 for gfx1170 (PR #186100)   via llvm-commits
• [llvm] [QualGroup][docs] Clarify biannual membership review and active contributor status (PR #185884)   Petter Berntsson via llvm-commits
• [llvm] [AMDGPU] Fix missing "---" in MIR test. NFCI. (PR #186097)   Matt Arsenault via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Jay Foad via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Fix definition of system register move instructions (PR #185709)   via llvm-commits
• [llvm] [AArch64] Fix definition of system register move instructions (PR #185709)   via llvm-commits
• [llvm] [AArch64] Fix definition of system register move instructions (PR #185709)   via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Jay Foad via llvm-commits
• [llvm] [llvm-link] Inherit data layout from first archive member (PR #186098)   Paulius Velesko via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix missing "---" in MIR test. NFCI. (PR #186097)   Jay Foad via llvm-commits
• [llvm] [GVN] Eliminate redundant scalar binop by reusing vector binop result (PR #186102)   Vedant Neve via llvm-commits
• [llvm] [GVN] Eliminate redundant scalar binop by reusing vector binop result (PR #186102)   via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (PR #180896)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [AArch64] Fold NEON splats into users by using SVE immediates (PR #165559)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fold NEON splats into users by using SVE immediates (PR #165559)   Paul Walker via llvm-commits
• [llvm] bcd8e64 - [llvm][Support] formatv: non-negative-plus for integral numbers (#185008)   via llvm-commits
• [llvm] [llvm][Support] formatv: non-negative-plus for integral numbers (PR #185008)   Konrad Kleine via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Florian Hahn via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Rohit Aggarwal via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
• [libclc] [llvm] [libclc][CI] Enable libclc in premerge CI with single target (PR #186104)   Wenju He via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [NFC] New test for untested SPIRVInstructionSelector case (PR #186069)   Manuel Carrasco via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Matt Arsenault via llvm-commits
• [llvm] [NFC] New test for untested SPIRVInstructionSelector case (PR #186069)   Manuel Carrasco via llvm-commits
• [libclc] [llvm] [libclc][CI] Enable libclc in premerge CI with single target (PR #186104)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [NFC] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [libclc] [llvm] [libclc][CI] Enable libclc in premerge CI with single target (PR #186104)   via llvm-commits
• [llvm] [NFC][SPIRV] New test for untested SPIRVInstructionSelector case (PR #186069)   Manuel Carrasco via llvm-commits
• [llvm] [AMDGPU] Allow bank conflicts on src0 for V_DUAL_MOV_B32 for gfx1170 (PR #186100)   Matt Arsenault via llvm-commits
• [llvm] bae8b84 - AMDGPU: Add more tests for fp min/max combines (#184336)   via llvm-commits
• [llvm] AMDGPU: Add more tests for fp min/max combines (PR #184336)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
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• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
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• [llvm] [AMDGPU] Fix missing "---" in MIR test. NFCI. (PR #186097)   Jay Foad via llvm-commits
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• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   LLVM Continuous Integration via llvm-commits
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• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Florian Hahn via llvm-commits
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• [llvm] [AMDGPU] Allow bank conflicts on src0 for V_DUAL_MOV_B32 for gfx1170 (PR #186100)   Mirko Brkušanin via llvm-commits
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• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Fabian Ritter via llvm-commits
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• [llvm] [NFC][SPIRV] New test for untested SPIRVInstructionSelector case (PR #186069)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [AMDGPU] Update features for gfx1170 (PR #186107)   via llvm-commits
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• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Hubert Tong via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Hubert Tong via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Hubert Tong via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Fabian Ritter via llvm-commits
• [llvm] cacf225 - [LLVM][CodeView] Add `S_REGREL32_INDIR` (#183172)   via llvm-commits
• [llvm] [LLVM][CodeView] Add `S_REGREL32_INDIR` (PR #183172)   via llvm-commits
• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Update features for gfx1170 (PR #186107)   Mirko Brkušanin via llvm-commits
• [llvm] [DebugInfo] BTFParser use formatv instead of format (PR #186109)   via llvm-commits
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• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   Ryotaro Kasuga via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Alex Duran via llvm-commits
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• [llvm] [Offload] AMD Flang bot to use CMake cache file (PR #186070)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] AMD Flang bot to use CMake cache file (PR #186070)   Jan Patrick Lehr via llvm-commits
• [llvm] [GVN] Eliminate redundant scalar binop by reusing vector binop result (PR #186102)   Vedant Neve via llvm-commits
• [llvm] 8677f49 - [DA] Refactor the signature of the Weak Zero SIV tests (NFC) (#185825)   via llvm-commits
• [llvm] [DA] Refactor the signature of the Weak Zero SIV tests (NFC) (PR #185825)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite formula in the Weak Zero SIV tests (PR #183738)   Ryotaro Kasuga via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Alex Duran via llvm-commits
• [llvm] [AMDGPU] Add note about inactive VGPR lanes being preserved (PR #185672)   Diana Picus via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] 2ff88c6 - [LIBM][AMDLIBM] - Add new vector call support for fveclib=AMDLIBM (#180896)   via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Hubert Tong via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Kristof Beyls via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
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• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Paul Walker via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Luke Lau via llvm-commits
• [llvm] [NFC][sancov] Move tests into target-specific subdirectories (PR #182111)   Honey Goyal via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   Jonathan Thackray via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [lldb] [llvm] [AArch64][llvm] Tighten SYSP parsing; don't disassemble invalid encodings (PR #182410)   via llvm-commits
• [llvm] [NFC][SPIRV] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [NFC][SPIRV] New test for untested SPIRVInstructionSelector case (PR #186069)   via llvm-commits
• [llvm] [Offload] Escape \; in command string (PR #186120)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Escape \; in command string (PR #186120)   via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Nick Sarnie via llvm-commits
• [llvm] [Offload] Escape \; in command string (PR #186120)   Joseph Huber via llvm-commits
• [llvm] [Offload] Escape \; in command string (PR #186120)   Jan Patrick Lehr via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Joseph Huber via llvm-commits
• [llvm] [TargetParser] Simplify getArchFamilyNameAMDGCN. NFC. (PR #186122)   Jay Foad via llvm-commits
• [llvm] 0fd9397 - [gn] port 1616fbaccf824620   Nico Weber via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yaxun Liu via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [compiler-rt] [libc] [libc] Remove unused AOR_v20.02 directory (PR #185951)   via llvm-commits
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• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] [CodeGen] Refactor `determineCalleeSaves`. (PR #166763)   via llvm-commits
• [llvm] [CodeGen] Refactor `determineCalleeSaves`. (PR #166763)   via llvm-commits
• [llvm] [VectorCombine] Fold contiguous loads into a single vector load (PR #185736)   via llvm-commits
• [llvm] 5eaf19a - Re-reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (#186074)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   Stefan Gränitz via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [clang] [llvm] [InstCombine] Combine llvm.sin/llvm.cos libcall pairs into llvm.sincos (PR #184760)   Kito Cheng via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   Paul Walker via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   Paul Walker via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Luke Lau via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Luke Lau via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Luke Lau via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Luke Lau via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [offload][lit] XFAIL new tests failing on intelgpu (PR #185908)   Alex Duran via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [WIP][Don't merge] (PR #186127)   via llvm-commits
• [llvm] [offload][lit] XFAIL new tests failing on intelgpu (PR #185908)   Nick Sarnie via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   via llvm-commits
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• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [TargetParser] Simplify getArchFamilyNameAMDGCN. NFC. (PR #186122)   via llvm-commits
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• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yaxun Liu via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yaxun Liu via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Alex Duran via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Luke Lau via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Luke Lau via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Luke Lau via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Luke Lau via llvm-commits
• [compiler-rt] [libc] [libc] Remove unused AOR_v20.02 directory (PR #185951)   LLVM Continuous Integration via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] [TargetParser] Remove unused GK_R600_FIRST/LAST and GK_AMDGCN_FIRST/LAST (PR #186132)   Jay Foad via llvm-commits
• [llvm] [DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (PR #185915)   Michael Buch via llvm-commits
• [llvm] [DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (PR #185915)   Michael Buch via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [TargetParser] Remove unused GK_R600_FIRST/LAST and GK_AMDGCN_FIRST/LAST (PR #186132)   via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
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• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [llvm] [TargetParser] Simplify getArchFamilyNameAMDGCN. NFC. (PR #186122)   via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [SPIR-V] Complete SPV_INTEL_16bit_atomics extension support (PR #184312)   Marcos Maronas via llvm-commits
• [llvm] [TargetParser] Simplify getArchFamilyNameAMDGCN. NFC. (PR #186122)   Jay Foad via llvm-commits
• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   Yaxun Liu via llvm-commits
• [llvm] [AArch64][llvm] Ensure `tlbip` instructions aren't gated by `+tlb-rmi` (PR #186134)   Jonathan Thackray via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   Maryam Moghadas via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Dmitry Rogozhkin via llvm-commits
• [llvm] [AArch64][llvm] Ensure `tlbip` instructions aren't gated by `+tlb-rmi` (PR #186134)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Ensure `tlbip` instructions aren't gated by `+tlb-rmi` (PR #186134)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU][Draft] OOB mode - module flag (PR #160922)   via llvm-commits
• [llvm] [AArch64][llvm] Ensure `tlbip` instructions aren't gated by `+tlb-rmi` (PR #186134)   via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [WIP][Don't merge] (PR #186127)   via llvm-commits
• [llvm] [WIP][Don't merge] (PR #186127)   via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Jay Foad via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Jay Foad via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [llvm] [SPIR-V] Handle spirv.MemoryModel metadata (PR #186138)   Arseniy Obolenskiy via llvm-commits
• [llvm] [MSF] Fix max PDB file size when using /pdbpagesize (PR #186139)   Tianlan Zhou via llvm-commits
• [llvm] [MSF] Fix max PDB file size when using /pdbpagesize (PR #186139)   via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Jay Foad via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (PR #186141)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (PR #186141)   via llvm-commits
• [llvm] [WIP][Don't merge] New test for untested case in SILowerSGPRSpills (PR #186067)   via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Brox Chen via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Brox Chen via llvm-commits
• [llvm] 641ab6e - [CodeGen] check artificial subregister before propagate copy (#185751)   via llvm-commits
• [llvm] [CodeGen] check artificial subregister before propagate copy (PR #185751)   Brox Chen via llvm-commits
• [llvm] [WIP][Don't merge] (PR #186127)   via llvm-commits
• [llvm] [flang-rt] Fix macOS build: define _DARWIN_C_SOURCE for mmap flags (PR #186142)   Sairudra More via llvm-commits
• [llvm] 839fd91 - [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (#183979)   via llvm-commits
• [llvm] [DebugInfo][AT] Treat escaping calls as untagged stores in assignment tracking (PR #183979)   Shivam Kunwar via llvm-commits
• [llvm] [WIP][Don't merge] (PR #186127)   via llvm-commits
• [llvm] [AMDGPU][True16] Use COPY instead of V_MOV for non-imm operand in movePackToVALU lowering (PR #185754)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] Use COPY instead of V_MOV for non-imm operand in movePackToVALU lowering (PR #185754)   Brox Chen via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU][True16] Use COPY instead of V_MOV for non-imm operand in movePackToVALU lowering (PR #185754)   via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   Benjamin Maxwell via llvm-commits
• [llvm] [VectorCombine] Fold contiguous loads into a single vector load (PR #185736)   via llvm-commits
• [llvm] [SPIR-V] Handle spirv.MemoryModel metadata (PR #186138)   via llvm-commits
• [llvm] [flang-rt] Fix file opening in APPEND mode on Windows (PR #186144)   David Truby via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   Luke Lau via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #180917)   Rohit Aggarwal via llvm-commits
• [llvm] [VectorCombine] Fold contiguous loads into a single vector load (PR #185736)   via llvm-commits
• [llvm] [VectorCombine] Fold contiguous loads into a single vector load (PR #185736)   via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [SPIR-V] Handle spirv.MemoryModel metadata (PR #186138)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [flang-rt] Fix macOS build: define _DARWIN_C_SOURCE for mmap flags (PR #186142)   Sairudra More via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for mcpu=future v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [SPIR-V] Handle spirv.MemoryModel metadata (PR #186138)   via llvm-commits
• [llvm] [sanitizer-coverage] clean up unused test (PR #186147)   Jann Horn via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Shilei Tian via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Shilei Tian via llvm-commits
• [llvm] [SPIR-V] Handle spirv.MemoryModel metadata (PR #186138)   Arseniy Obolenskiy via llvm-commits
• [llvm] [RegisterScavenging] Respect early-clobber when scavenging registers (PR #184814)   Dominik Steenken via llvm-commits
• [clang] [llvm] [PowerPC] Update dmr builtin names (PR #183160)   Maryam Moghadas via llvm-commits
• [llvm] [TargetParser] Remove unused GK_R600_FIRST/LAST and GK_AMDGCN_FIRST/LAST (PR #186132)   Shilei Tian via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for mcpu=future v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (PR #186141)   Craig Topper via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (PR #186141)   Kito Cheng via llvm-commits
• [llvm] [Draft][SPIRV] Lower load/store atomic to OpAtomicLoad/OpAtomicStore (PR #185696)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (PR #186141)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (PR #186141)   Kito Cheng via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Krzysztof Drewniak via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for mcpu=future v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [RegAllocEvictAdvisor] Add minimum weight ratio heuristic. (PR #98109)   Mikhail Gudim via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [RISCV] Fix crash in getShuffleCost for P-extension without V extension (PR #186149)   Luke Lau via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Shilei Tian via llvm-commits
• [llvm] [NFC][SPIRV] New test for untested SPIRVInstructionSelector case (PR #186069)   Marcos Maronas via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   via llvm-commits
• [llvm] [RegAllocEvictAdvisor] Add minimum weight ratio heuristic. (PR #98109)   via llvm-commits
• [llvm] [RISCV] Fix crash in combinePExtTruncate for truncate(srl) without MUL/SUB (PR #186141)   Craig Topper via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [SPIR-V] Handle spirv.MemoryModel metadata (PR #186138)   Arseniy Obolenskiy via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Move declare simd codegen into OMPIRBuilder (PR #186030)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Move declare simd codegen into OMPIRBuilder (PR #186030)   via llvm-commits
• [llvm] [AMDGPU] Update PHI legalization using all operands’ register classes (PR #186163)   Akash Dutta via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Jay Foad via llvm-commits
• [llvm] 2e614f3 - [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (#186137)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL] InterlockedOr and InterlockedOr64 builtins (PR #180804)   Alexander Johnston via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Update PHI legalization using all operands’ register classes (PR #186163)   via llvm-commits
• [polly] [Polly] Use GenDT in assertion (PR #186164)   Michael Kruse via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   Sander de Smalen via llvm-commits
• [polly] [Polly] Use GenDT in assertion (PR #186164)   Michael Kruse via llvm-commits
• [llvm] [LoopUnrollPass] Trace loop unroll count heuristics with `LLVM_DEBUG` (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Trace loop unroll count heuristics with `LLVM_DEBUG` (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [TargetParser] Introduce AMDGPUTargetParser.def. NFCI. (PR #186137)   Jay Foad via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [SystemZ] Disable PCH on z/OS. (PR #185750)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Create a WCG instance per MF (PR #185916)   via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] 643969e - [lldb] Run the LLDB test suite under MTE on capable Apple HW (#185780)   via llvm-commits
• [lldb] [llvm] [lldb] Run the LLDB test suite under MTE on capable Apple HW (PR #185780)   Jonas Devlieghere via llvm-commits
• [llvm] [AMDGPU] Add target feature for SWMMAC instructions (PR #185785)   Chinmay Deshpande via llvm-commits
• [llvm] [SPIR-V] Handle spirv.MemoryModel metadata (PR #186138)   Arseniy Obolenskiy via llvm-commits
• [llvm] [AMDGPU] Update PHI legalization using all operands’ register classes (PR #186163)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Detect VALU-after-MFMA hazard in post-RA scheduler's getHazardType (PR #184084)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts] Create a WCG instance per MF (PR #185916)   via llvm-commits
• [llvm] 964a3ad - [ARM] Extract helper to get inverted armcc SDValue (NFC)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] Use AMDGPULaneMaskUtils in SILowerI1Copies (PR #186170)   via llvm-commits
• [llvm] [AMDGPU] Use AMDGPULaneMaskUtils in SILowerI1Copies (PR #186170)   via llvm-commits
• [llvm] [AMDGPU] Use AMDGPULaneMaskUtils in SILowerI1Copies (PR #186170)   via llvm-commits
• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Vy Nguyen via llvm-commits
• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Vy Nguyen via llvm-commits
• [llvm] [AMDGPU] Update PHI legalization using all operands’ register classes (PR #186163)   Akash Dutta via llvm-commits
• [llvm] [AMDGPU] Use AMDGPULaneMaskUtils in SILowerI1Copies (PR #186170)   via llvm-commits
• [llvm] [TTI] Return sane scalable default in getRegisterBitWidth (PR #186171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [TTI] Return sane scalable default in getRegisterBitWidth (PR #186171)   via llvm-commits
• [llvm] [AArch64][llvm] Ensure `tlbip` instructions aren't gated by `+tlb-rmi` (PR #186134)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Sergey Semenov via llvm-commits
• [llvm] 40fca74 - [LoopUnrollPass] Trace loop unroll count heuristics with `LLVM_DEBUG` (#182981)   via llvm-commits
• [llvm] [LoopUnrollPass] Trace loop unroll count heuristics with `LLVM_DEBUG` (PR #182981)   Justin Fargnoli via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Teresa Johnson via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   Teresa Johnson via llvm-commits
• [clang] [llvm] [NVPTX] Fix scoped atomic when given runtime values (PR #185883)   Joseph Huber via llvm-commits
• [llvm] [SystemZ] Drop assertion against preg-def in definesCmp0Src(). (PR #186177)   Jonas Paulsson via llvm-commits
• [llvm] [SystemZ] Drop assertion against preg-def in definesCmp0Src(). (PR #186177)   via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] [openmp] [OFFLOAD] Add spirv implementation for named barrier (PR #180393)   via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] 8d37ed1 - [ARM] Extract code for forming CSINV etc (NFC)   Nikita Popov via llvm-commits
• [llvm] bf85f52 - [PowerPC] Update dmr builtin names (#183160)   via llvm-commits
• [clang] [llvm] [PowerPC] Update dmr builtin names (PR #183160)   Lei Huang via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Graham Hunter via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] dd566cc - [SystemZ] Drop assertion against preg-def in definesCmp0Src(). (#186177)   via llvm-commits
• [llvm] [SystemZ] Drop assertion against preg-def in definesCmp0Src(). (PR #186177)   Jonas Paulsson via llvm-commits
• [llvm] [DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (PR #185915)   J. Ryan Stinnett via llvm-commits
• [llvm] [LLVM] Fix assertion when dropping type tests with SelectInst users (PR #185523)   Grigory Pastukhov via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Rahul Joshi via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [llvm] fde7464 - [LV] Add tests for incorrect narrowing of IGs with scalable vectors.   Florian Hahn via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   Florian Hahn via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   Florian Hahn via llvm-commits
• [llvm] 5395675 - AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (#181036)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Lower G_EXTRACT/INSERT in legalizer (PR #181036)   via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   Justin Bogner via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   Justin Bogner via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [LV]: Improve selecting epilogue VF (PR #186185)   Hassnaa Hamdi via llvm-commits
• [llvm] [LV]: Improve selecting epilogue VF (PR #186185)   via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve readability of cmp adjustment code (PR #185532)   Hussam Alhassan via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve readability of cmp adjustment code (PR #185532)   via llvm-commits
• [llvm] [AMDGPU] Use AMDGPULaneMaskUtils in SILowerI1Copies (PR #186170)   via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Yaxun Liu via llvm-commits
• [llvm] [X86] Add correct model values for znver1, znver2 shld, shrd (PR #186175)   via llvm-commits
• [llvm] [X86] Add correct model values for znver1, znver2 shld, shrd (PR #186175)   via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Yaxun Liu via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBitXor function (PR #185776)   Joshua Batista via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Florian Hahn via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for mcpu=future v256i1 types (PR #184447)   Lei Huang via llvm-commits
• [llvm] [AMDGPU] Use AMDGPULaneMaskUtils in SILowerI1Copies (PR #186170)   via llvm-commits
• [llvm] Fix scalar to vector v4f16 pattern (PR #186188)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] Use AMDGPULaneMaskUtils in SILowerI1Copies (PR #186170)   via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Rahul Joshi via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Rahul Joshi via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Artem Belevich via llvm-commits
• [llvm] Fix scalar to vector v4f16 pattern (PR #186188)   Frederik Harwath via llvm-commits
• [llvm] [AggressiveInstCombine] POPCNT generation for bit-count pattern (PR #177109)   Rohit Aggarwal via llvm-commits
• [llvm] [AMDGPU] Add target feature for SWMMAC instructions (PR #185785)   Shilei Tian via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [llvm] Fix scalar to vector v4f16 pattern (PR #186188)   Frederik Harwath via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] Fix scalar to vector v4f16 pattern (PR #186188)   via llvm-commits
• [llvm] [X86] Add correct model values for znver1, znver2 shld, shrd (PR #186175)   Gergo Stomfai via llvm-commits
• [llvm] [SampleProfile] Skip counting mismatched weak symbols during profile loading (PR #185514)   Amir Ayupov via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [llvm] [NFC][LAA] Minor stylistic/comments improvements (PR #185510)   Andrei Elovikov via llvm-commits
• [compiler-rt] [llvm] [openmp] [compiler-rt] Define GPU specific handling of profiling functions (PR #185763)   Shilei Tian via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix scalar to vector v4f16 pattern (PR #186188)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix scalar to vector v4f16 pattern (PR #186188)   Shilei Tian via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [AMDGPU] Fix scalar to vector v4f16 pattern (PR #186188)   Frederik Harwath via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   Asher Dobrescu via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Joshua Batista via llvm-commits
• [llvm] [MemProf] Skip handling of memprof records for non-prevailing functions (PR #185963)   via llvm-commits
• [llvm] [AMDGPU] Mark VOPC_e64 instructions rematerializable (PR #186195)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU] Mark VOPC_e64 instructions rematerializable (PR #186195)   via llvm-commits
• [llvm] [AMDGPU] Mark VOPC_e64 instructions rematerializable (PR #186195)   via llvm-commits
• [llvm] [LLVM] Fix assertion when dropping type tests with SelectInst users (PR #185523)   Peter Collingbourne via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Andrei Elovikov via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Minsoo Choo via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   David Spickett via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Rahul Joshi via llvm-commits
• [llvm] [DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (PR #185915)   Peter Rong via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Rahul Joshi via llvm-commits
• [compiler-rt] [compiler-rt] Add ASan/UBSan runtime support for Hexagon Linux (PR #183982)   Dimitry Andric via llvm-commits
• [llvm] [VPlan] Explicitly unroll replicate-regions without live-outs by VF. (PR #170212)   Andrei Elovikov via llvm-commits
• [llvm] [DAG] SelectionDAG::isKnownToBeAPowerOfTwo - add ISD::TRUNCATE handling and tests (PR #184365)   Pranshu Goyal via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Rahul Joshi via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Rahul Joshi via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   via llvm-commits
• [clang] [llvm] [AMDGPU] Restrict `@llvm.amdgcn.image.*` intrinsic's dmask argument (PR #179511)   Alexey Sachkov via llvm-commits
• [clang] [llvm] [AMDGPU] Restrict `@llvm.amdgcn.image.*` intrinsic's dmask argument (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   Demetrius Kanios via llvm-commits
• [clang] [llvm] [HLSL][SPIRV] Use 0 to represent unbounded resources when targeting SPIRV (PR #186022)   via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   Demetrius Kanios via llvm-commits
• [llvm] [LV] Fix miscompile with conditional scalar assignment + tail folding (PR #182492)   Florian Hahn via llvm-commits
• [llvm] [PowerPC] Use lxvp/stxvp for mcpu=future v256i1 types (PR #184447)   via llvm-commits
• [llvm] [TTI] Return sane scalable default in getRegisterBitWidth (PR #186171)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Joshua Batista via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Aiden Grossman via llvm-commits
• [llvm] [libsycl] add USM alloc/free functions (PR #184111)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SPIRV][Matrix] Add support for Array Vector memory layout (PR #186215)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV][Matrix] Add support for Array Vector memory layout (PR #186215)   Farzon Lotfi via llvm-commits
• [llvm] [SPIRV][Matrix] Add support for Array Vector memory layout (PR #186215)   Farzon Lotfi via llvm-commits
• [llvm] [IR] add missing `LLVMCallConv` enum values (PR #186224)   Martin Liška via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   via llvm-commits
• [llvm] [IR] add missing `LLVMCallConv` enum values (PR #186224)   via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Yaxun Liu via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [NewPM] Port for AArch64CompressJumpTables (PR #186020)   Aiden Grossman via llvm-commits
• [llvm] [msan] Handle AVX512 scalef intrinsics (PR #186211)   Vitaly Buka via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   via llvm-commits
• [llvm] [IR] add missing `LLVMCallConv` enum values (PR #186224)   Martin Liška via llvm-commits
• [llvm] [ARM] Enable Spillage Copy Elimination by default (PR #186245)   via llvm-commits
• [llvm] [ARM] Enable Spillage Copy Elimination by default (PR #186245)   via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ehsan Amiri via llvm-commits
• [llvm] [mcp-frameinst: 1/4]: [CodeGen][MC][NFC] Clarify MCRegister ctor behavior (PR #186238)   Scott Linder via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ehsan Amiri via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Jan Korous via llvm-commits
• [llvm] [DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (PR #185915)   Peter Rong via llvm-commits
• [llvm] [SampleProfile] Skip counting mismatched weak symbols during profile loading (PR #185514)   Wei Wang via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (PR #185915)   Peter Rong via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   Rohit Aggarwal via llvm-commits
• [clang] [llvm] [mlir] [OpenMP] Emit aggregate kernel prototypes and remove libffi dependency (PR #186261)   via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [mlir] [OpenMP] Emit aggregate kernel prototypes and remove libffi dependency (PR #186261)   Joseph Huber via llvm-commits
• [llvm] [VPlan] Optimize FindLast of (binop %IV, live-in) by sinking. (PR #183911)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Alexey Bataev via llvm-commits
• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   Andrei Elovikov via llvm-commits
• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Alexey Bataev via llvm-commits
• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   via llvm-commits
• [llvm] [llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Farid Zakaria via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Daniel Thornburgh via llvm-commits
• [llvm] [DirectX] Fix assertion in PointerTypeAnalysis with empty global_ctors (PR #179034)   Kaitlin Peng via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Chandler Carruth via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Tarun Prabhu via llvm-commits
• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Vy Nguyen via llvm-commits
• [llvm] b1036ad - [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (#185939)   via llvm-commits
• [llvm] [support][blake3][nfc]Expose init_keyed to BLAKE3 llvm wrapper. (PR #185939)   Vy Nguyen via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [compiler-rt] cef418e - [compiler-rt] Add ASan/UBSan runtime support for Hexagon Linux (#183982)   via llvm-commits
• [compiler-rt] [compiler-rt] Add ASan/UBSan runtime support for Hexagon Linux (PR #183982)   Brian Cain via llvm-commits
• [compiler-rt] [compiler-rt] Add ASan/UBSan runtime support for Hexagon Linux (PR #183982)   LLVM Continuous Integration via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Igor Kudrin via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [lld] [LLD][AArch64] Handle R_AARCH64_TLS_DTPREL64 in non-alloc sections (PR #183962)   Igor Kudrin via llvm-commits
• [clang] [llvm] [HLSL] Use 0 to represent unbounded resources (PR #186022)   via llvm-commits
• [clang] [lld] [llvm] [LTO][LLD] Prevent invalid LTO libfunc transforms (PR #164916)   Daniel Thornburgh via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #183450)   via llvm-commits
• [lld] [lldb] [llvm] [AArch64] Support TLS variables in debug info (PR #146572)   Igor Kudrin via llvm-commits
• [llvm] [WebAssembly] Fold sign-extending shifts into signed loads in FastISel (PR #185906)   via llvm-commits
• [llvm] [GISel] Add operands check for G_INSERT_SUBVECTOR and G_EXTRACT_SUBVECTOR in buildInstr (PR #186021)   Jianjian Guan via llvm-commits
• [llvm] [SPIRV] Fix zero materialization for fp spv_const_composite legalization (PR #186028)   via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   via llvm-commits
• [llvm] [LoongArch] Remove unreachable Value check in fixupLeb128 (PR #186297)   via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Craig Topper via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [llvm] [LoongArch] Remove unreachable Value check in fixupLeb128 (PR #186297)   via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   Phoebe Wang via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [compiler-rt] [compiler-rt] Add ASan/UBSan runtime support for Hexagon Linux (PR #183982)   Brian Cain via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [HLSL] Use 0 to represent unbounded resources (PR #186022)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [llvm] MIPS/expandAtomicBinOp: Remove tailing kill dead register operands (PR #186055)   Alex Rønne Petersen via llvm-commits
• [clang] [llvm] [HLSL] Use 0 to represent unbounded resources (PR #186022)   via llvm-commits
• [clang] [llvm] [HLSL] Use 0 to represent unbounded resources (PR #186022)   via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [HLSL] Use 0 to represent unbounded resources (PR #186022)   via llvm-commits
• [clang] [llvm] [RISCV] Add `sifive-x160` and `sifive-x180` processor definitions (PR #186264)   Pengcheng Wang via llvm-commits
• [llvm] [LoongArch] Remove unreachable Value check in fixupLeb128 (PR #186297)   Lu Weining via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [llvm] [AMDGPU] Include TRANS instructions in WMMA coexecution hazard checking (PR #186269)   Jeffrey Byrnes via llvm-commits
• [llvm] [AMDGPU] Include TRANS instructions in WMMA coexecution hazard checking (PR #186269)   Jeffrey Byrnes via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   via llvm-commits
• [llvm] [CoroSplit] Keep coro.free for resume/destroy (PR #186301)   Weibo He via llvm-commits
• [llvm] [CoroSplit] Keep coro.free for resume/destroy functions (PR #186301)   Weibo He via llvm-commits
• [llvm] [llvm] Fix modules build after 2e614f353871a9a0738c3b49d35d5ed4e480633b (PR #186302)   Jon Roelofs via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] [llvm] Fix modules build after 2e614f353871a9a0738c3b49d35d5ed4e480633b (PR #186302)   Jon Roelofs via llvm-commits
• [llvm] [llvm] Fix modules build after 2e614f353871a9a0738c3b49d35d5ed4e480633b (PR #186302)   Jon Roelofs via llvm-commits
• [libc] [llvm] [libc][math][c23] Add atan2f16 function (PR #183531)   via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Slava Zakharin via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [GVN] Fold scalar mul/fmul of extracts into vector extract reuse (PR #186259)   Vedant Neve via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [llvm] Compute GUIDs once and store in metadata (PR #184065)   Owen Rodley via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Shivam Kunwar via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [libc] [llvm] [libc][math][c++23] Add Fmabf16 math function (PR #182836)   via llvm-commits
• [llvm] [ValueTracking] Improve nofpclass inference for nsz fadd (PR #186315)   Yunbo Ni via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [llvm] [ValueTracking] Improve nofpclass inference for nsz fadd (PR #186315)   via llvm-commits
• [llvm] [ValueTracking] Improve nofpclass inference for nsz fadd (PR #186315)   via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   via llvm-commits
• [llvm] [X86] Fix syntax directive for --output-asm-variant=1 (PR #186316)   Fangrui Song via llvm-commits
• [llvm] [X86] Fix syntax directive for --output-asm-variant=1 (PR #186316)   via llvm-commits
• [llvm] [AMDGPU] Include TRANS instructions in WMMA coexecution hazard checking (PR #186269)   Jeffrey Byrnes via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [lldb] [llvm] [MC] Move MCTargetOptions pointer from MCContext to MCAsmInfo (PR #180464)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
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• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Tobias Gysi via llvm-commits
• [llvm] [AggressiveInstCombine] Match the pattern and generate ctlz function call (PR #177110)   Rohit Aggarwal via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Fangrui Song via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Fangrui Song via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Fangrui Song via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Fangrui Song via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Rohit Aggarwal via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Fangrui Song via llvm-commits
• [lld] [ELF] Move target-specific synthetic sections into Arch/ files (PR #184057)   Fangrui Song via llvm-commits
• [llvm] [llvm-mc] Make -x86-asm-syntax=intel also affect output printing (PR #186317)   via llvm-commits
• [llvm] [llvm-mc] Make -x86-asm-syntax=intel also affect output printing (PR #186317)   via llvm-commits
• [llvm] [IA][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [AMDGPU][NFC] Add missing isFLAT check to isVMEM. (PR #186321)   via llvm-commits
• [llvm] [AMDGPU][NFC] Add missing isFLAT check to isVMEM. (PR #186321)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [IA][RISCV] Make the isDeInterleaveMask check the contents of shuffle (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [IA][RISCV] More precise checking of shuffle within interleaved load (PR #185384)   Liao Chunyu via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   Ryotaro Kasuga via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [llvm] [NFC] Add default code reviewers for some AMDGPU-related files (PR #185942)   Jacob Lambert via llvm-commits
• [llvm] [NFC] Add default code reviewers for some AMDGPU-related files (PR #185942)   Jacob Lambert via llvm-commits
• [llvm] [llvm-mc] Make -x86-asm-syntax=intel also affect output printing (PR #186317)   Fangrui Song via llvm-commits
• [llvm] [llvm-mc] Default output assembly variant to AssemblerDialect (PR #186317)   Fangrui Song via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [llvm] Fix modules build after 2e614f353871a9a0738c3b49d35d5ed4e480633b (PR #186302)   Jay Foad via llvm-commits
• [lld] [lld] Two-level compression sort grouping with glob-based section matching (PR #185661)   Fangrui Song via llvm-commits
• [lld] [lld] Two-level compression sort grouping with glob-based section matching (PR #185661)   Fangrui Song via llvm-commits
• [lld] [lld] Two-level compression sort grouping with glob-based section matching (PR #185661)   Fangrui Song via llvm-commits
• [llvm] MIPS/expandAtomicBinOp: Remove tailing kill dead register operands (PR #186055)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU][NFC] Add missing isFLAT check to isVMEM. (PR #186321)   Jay Foad via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [DA] Require 'nsw' for AddRecs in the WeakCrossing SIV test (PR #185041)   Ryotaro Kasuga via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [llvm-mc] Default output assembly variant to AssemblerDialect (PR #186317)   Phoebe Wang via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Fangrui Song via llvm-commits
• [llvm] 1dae3b1 - [RISCV] Fix typo in NDSRVInstVSINTCvt: fucnt5 -> funct5   Jim Lin via llvm-commits
• [llvm] ca5d001 - [RISCV] Add missing predicate to XAndes VFPMAD patterns   Jim Lin via llvm-commits
• [llvm] 9ac29f6 - [RISCV] Add missing predicate to XAndes VD4DOT patterns   Jim Lin via llvm-commits
• [llvm] 2d4b0f0 - [RISCV][NFC] Move HasVendorXAndesVBFHCvt from multiclass body to instantiation site   Jim Lin via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Kirill Vedernikov via llvm-commits
• [llvm] [CoroSplit] Keep coro.free for resume/destroy functions (PR #186301)   LLVM Continuous Integration via llvm-commits
• [llvm] [MSF] Fix max PDB file size when using /pdbpagesize (PR #186139)   Tianlan Zhou via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   via llvm-commits
• [llvm] [TTI] Return scalable size on scalable in getRegisterBitWidth (PR #186171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   Nikita Popov via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (PR #185713)   via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (PR #185713)   via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Pankaj Dwivedi via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Fix llvm.spv.gep return type for vector-indexed GEPs (PR #185931)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64] Reject non-constant expressions in tryParseAdjImm0_63 (PR #183246)   Yihan Yang via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [llvm] [LoopUnrollPass] Don't pre-set `UP.Count` before legality checks in `computeUnrollCount()` (PR #185979)   Nikita Popov via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   via llvm-commits
• [llvm] [llvm-mc] Default output assembly variant to AssemblerDialect (PR #186317)   Phoebe Wang via llvm-commits
• [llvm] [SPIR-V] Add support for SPV_INTEL_masked_gather_scatter extension (PR #185418)   Arseniy Obolenskiy via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   via llvm-commits
• [llvm] [SPIR-V] Address comments on SPV_INTEL_masked_gather_scatter extension implementation (PR #186336)   Arseniy Obolenskiy via llvm-commits
• [llvm] [SPIR-V] Address comments on SPV_INTEL_masked_gather_scatter extension implementation (PR #186336)   via llvm-commits
• [llvm] [LegalizeTypes] Keep non-negative info in SUB(CTLZ) (PR #186338)   Alexey Merzlyakov via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Juan Manuel Martinez Caamaño via llvm-commits
• [libunwind] [llvm] [LFI][AArch64] Add AArch64 LFI rewriter (PR #184277)   Zachary Yedidia via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   Can H. Tartanoglu via llvm-commits
• [clang] [llvm] [RISCV] Add Zvzip intrinsics (PR #186342)   Pengcheng Wang via llvm-commits
• [llvm] c5847b1 - [DebugInfo] Add Verifier check for local enums in CU's enums field (#185228)   via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for local enums in CU's enums field (PR #185228)   Vladislav Dzhidzhoev via llvm-commits
• [lld] 887d2d4 - [LLD] [ELF] Make -z gcs=always implicitly warn on missing GCS, like force-bti (#186203)   via llvm-commits
• [lld] [LLD] [ELF] Make -z gcs=always implicitly warn on missing GCS, like force-bti (PR #186203)   Martin Storsjö via llvm-commits
• [lld] [LLD] [ELF] Make -z gcs=always implicitly warn on missing GCS, like force-bti (PR #186203)   Martin Storsjö via llvm-commits
• [clang] [llvm] [RISCV] Add Zvzip intrinsics (PR #186342)   Pengcheng Wang via llvm-commits
• [lld] [LLD] [ELF] Make {bti,gcs}-report=none silence warnings from force-bti/gcs=always (PR #186343)   Martin Storsjö via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Fabian Ritter via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   Alexis Engelke via llvm-commits
• [lld] [LLD] [ELF] Make {bti,gcs}-report=none silence warnings from force-bti/gcs=always (PR #186343)   via llvm-commits
• [llvm] dd04593 - [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (#185900)   via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   Alexis Engelke via llvm-commits
• [llvm] [LowerMemIntrinsics] Avoid emitting unreachable loops in insertLoopExpansion (PR #185900)   Fabian Ritter via llvm-commits
• [llvm] [LowerMemIntrinsics][AMDGPU] Optimize memset.pattern lowering (PR #185901)   Fabian Ritter via llvm-commits
• [llvm] [LowerMemIntrinsics][AMDGPU] Optimize memset.pattern lowering (PR #185901)   Fabian Ritter via llvm-commits
• [llvm] [VPlan] Simplify CanonicalIVIncrement unrolling (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LegalizeTypes] Keep non-negative info in SUB(CTLZ) (PR #186338)   Alexey Merzlyakov via llvm-commits
• [clang] [flang] [lld] [llvm] [mlir] [RFC] Use pre-compiled headers to speed up LLVM build (~1.5-2x) (PR #173868)   Alexis Engelke via llvm-commits
• [llvm] 584f43c - [Verifier] Add test for out of bounds gc.relocate reference   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Reject non-constant expressions in tryParseAdjImm0_63 (PR #183246)   Yihan Yang via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [compiler-rt] [llvm] [WebAssembly] Remove `__c_longjmp` from compiler-rt (PR #185798)   LLVM Continuous Integration via llvm-commits
• [llvm] [Instrumentation][nsan] Add maximumnum to NSAN (PR #186345)   Lewis Crawford via llvm-commits
• [llvm] [Instrumentation][nsan] Add maximumnum to NSAN (PR #186345)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Yunbo Ni via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Yunbo Ni via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   via llvm-commits
• [llvm] [InstCombine] Remove Multiplication in Range Comparisons When Invertible (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] 26ac669 - [LLVM] Remove "no-nans-fp-math" attribute support (#186285)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [LLVM] Remove "no-nans-fp-math" attribute support (PR #186285)   via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   Chris Jackson via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   via llvm-commits
• [llvm] [SROA] Allow unfolding gep(phi(gep,gep)) (PR #178126)   Theodoros Theodoridis via llvm-commits
• [llvm] [SROA] Allow unfolding gep(phi(gep,gep)) (PR #178126)   Theodoros Theodoridis via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   via llvm-commits
• [llvm] [LowerMemIntrinsics][AMDGPU] Optimize memset.pattern lowering (PR #185901)   Fabian Ritter via llvm-commits
• [llvm] [InstCombine] Remove Multiplication in Range Comparisons When Invertible (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] f2749f6 - [LowerMemIntrinsics][AMDGPU] Optimize memset.pattern lowering (#185901)   via llvm-commits
• [llvm] [LowerMemIntrinsics][AMDGPU] Optimize memset.pattern lowering (PR #185901)   Fabian Ritter via llvm-commits
• [llvm] [ARM] Try to lower sign bit SELECT_CC to shift (PR #186349)   Nikita Popov via llvm-commits
• [llvm] [ARM] Try to lower sign bit SELECT_CC to shift (PR #186349)   via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Nikita Popov via llvm-commits
• [llvm] [BOLT] Rework user-facing documentation of BOLT gadget scanner (PR #176446)   Kristof Beyls via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Michael Buch via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [InstCombine] Remove Multiplication in Range Comparisons When Invertible (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [InstCombine] Remove Multiplication in Range Comparisons When Invertible (PR #186347)   Kunqiu Chen via llvm-commits
• [clang] [llvm] [RISCV] Add more extensions to spacemit-x100 (PR #186351)   Mark Zhuang via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (PR #185713)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [RISCV] Add more extensions to spacemit-x100 (PR #186351)   via llvm-commits
• [clang] [llvm] [RISCV] Add more extensions to spacemit-x100 (PR #186351)   via llvm-commits
• [llvm] [LLVM][Verifier] Improve diagnostic messages for Intrinsics in Verifier (PR #185641)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Michael Buch via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Remove Multiplication in Range Comparisons When Invertible (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [clang] [llvm] [RISCV] Add more extensions to spacemit-x100 (PR #186351)   Mark Zhuang via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Yunbo Ni via llvm-commits
• [llvm] [InstCombine] Remove Multiplication in Range Comparisons When Invertible (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Yunbo Ni via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Yunbo Ni via llvm-commits
• [llvm] [IR][Core][NFC] Drop some BranchInst uses (PR #186352)   Alexis Engelke via llvm-commits
• [llvm] [IR][Core][NFC] Drop some BranchInst uses (PR #186352)   via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   Chris Jackson via llvm-commits
• [llvm] [IR][Core][NFC] Drop some BranchInst uses (PR #186352)   via llvm-commits
• [llvm] [IR][Core][NFC] Drop some BranchInst uses (PR #186352)   via llvm-commits
• [llvm] [AArch64] Add partial reduce patterns for new sve dot variants (PR #184649)   via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   Stefan Gränitz via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   Alexis Engelke via llvm-commits
• [llvm] [DA] Add test for the Weak Crossing SIV test misses dependency (NFC) (PR #186355)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add test for the Weak Crossing SIV test misses dependency (NFC) (PR #186355)   via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   Chris Jackson via llvm-commits
• [llvm] [VPlan] Account for early-exit dispatch blocks when updating LI. (PR #185618)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [IR] Composable and Extensible Memory Cache Control Hints (PR #181612)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Elia Geretto via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Simon Pilgrim via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Simon Pilgrim via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Simon Pilgrim via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Simon Pilgrim via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add computeKnownBits fallback DemandedElts handling and tests (PR #186025)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU][Doc] GFX12.5 Barrier Execution Model (PR #185632)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Piotr Sobczak via llvm-commits
• [llvm] [AArch64] Update aarch64_neon_sqdmulls_scalar pattern (PR #185836)   via llvm-commits
• [llvm] [OCaml] Fix bindings after br -> uncondbr+condbr split (PR #186176)   Alexis Engelke via llvm-commits
• [llvm] [IR][Core][NFC] Drop some BranchInst uses (PR #186352)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] DPP implementations for Wave Reduction (PR #185814)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   Martin Storsjö via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Florian Hahn via llvm-commits
• [llvm] fbd6d54 - [AArch64] Fold NEON splats into users by using SVE immediates (#165559)   via llvm-commits
• [llvm] [AArch64] Fold NEON splats into users by using SVE immediates (PR #165559)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] Fix crash in `foldReversedIntrinsicOperands` for struct-return intrinsics (PR #186339)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Mel Chen via llvm-commits
• [llvm] [OCaml] Fix bindings after br -> uncondbr+condbr split (PR #186176)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Mel Chen via llvm-commits
• [llvm] [OCaml] Fix bindings after br -> uncondbr+condbr split (PR #186176)   Alexis Engelke via llvm-commits
• [llvm] [VPlan] Reuse mask of immediate dominator in VPlanPredicator (PR #185595)   Mel Chen via llvm-commits
• [llvm] [ARM] Port ConditionOptimizer to ARM (PR #151187)   Hussam Alhassan via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for ds_add/sub_gs_reg_rtn (PR #185991)   Petar Avramovic via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Gergo Stomfai via llvm-commits
• [llvm] b7a6d46 - [AArch64] Add fixed-length bfloat cost model tests (NFC) (#184805)   via llvm-commits
• [llvm] [AArch64] Add fixed-length bfloat cost model tests (NFC) (PR #184805)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   via llvm-commits
• [llvm] [VPlan] Robustly handle Part0 for VecPointer, CanIVInc (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Robustly handle Part0 for VecPointer, CanIVInc (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [RISCV] Add more extensions to spacemit-x100 (PR #186351)   Pengcheng Wang via llvm-commits
• [llvm] [NFC] New test for untested case in SILowerI1Copies (PR #186127)   Robert Imschweiler via llvm-commits
• [llvm] [VPlan] Robustly handle Part0 for VecPointer, CanIVInc (PR #185739)   Ramkumar Ramachandra via llvm-commits
• [llvm] [TailCallElimination] Don't mark tail calls when callee uses llvm.returnaddress/llvm.frameaddress (PR #186365)   via llvm-commits
• [clang] [llvm] [sancov] add -fsanitize-coverage=trace-pc-entry-exit (PR #185972)   Alexander Potapenko via llvm-commits
• [clang] [llvm] [sancov] add -fsanitize-coverage=trace-pc-entry-exit (PR #185972)   Alexander Potapenko via llvm-commits
• [llvm] [TailCallElimination] Don't mark tail calls when callee uses llvm.returnaddress/llvm.frameaddress (PR #186365)   via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [TailCallElimination] Don't mark tail calls when callee uses llvm.returnaddress/llvm.frameaddress (PR #186365)   via llvm-commits
• [lld] [llvm] WIP - [DTLTO] Improve performance of adding files to the link (PR #186366)   Ben Dunbobbin via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [AMDGPU][NFC] Add missing isFLAT check to isVMEM. (PR #186321)   Robert Imschweiler via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   Chris Jackson via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for ds_read_tr* (PR #186006)   Petar Avramovic via llvm-commits
• [llvm] [IVDescriptors] Remove single-use constraint from FindLast comparisons (PR #186096)   Florian Hahn via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Robert Imschweiler via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for FFBH/FFBL (PR #186017)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ds_swizzle (PR #186024)   Petar Avramovic via llvm-commits
• [llvm] [LV] Inline createStepForVF, stripping redundant optz (PR #185668)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC] New test for untested case in SILowerI1Copies (PR #186127)   Matt Arsenault via llvm-commits
• [llvm] [LV] Inline createStepForVF, stripping redundant optz (PR #185668)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC] New test for untested case in SILowerI1Copies (PR #186127)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for kernarg_segment_ptr (PR #186029)   Petar Avramovic via llvm-commits
• [llvm] 48c7004 - [OCaml] Fix bindings after br -> uncondbr+condbr split (#186176)   via llvm-commits
• [llvm] [OCaml] Fix bindings after br -> uncondbr+condbr split (PR #186176)   Nikita Popov via llvm-commits
• [llvm] [InstSimplify] Optimize fcmp(min/maxnimumnum) (PR #185868)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for lds_param_load (PR #186035)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Change SIInsertWaitcnts MLI and PDT to references. NFC. (PR #186367)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Change SIInsertWaitcnts MLI and PDT to references. NFC. (PR #186367)   via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] insert_subvector(undef, splat(C), 0) -> splat(C). (PR #186090)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Change SIInsertWaitcnts MLI and PDT to references. NFC. (PR #186367)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   Florian Hahn via llvm-commits
• [llvm] 15b1888 - [AMDGPU] Change SIInsertWaitcnts MLI and PDT to references. NFC. (#186367)   via llvm-commits
• [llvm] [AMDGPU] Change SIInsertWaitcnts MLI and PDT to references. NFC. (PR #186367)   Jay Foad via llvm-commits
• [llvm] [NFC][LLVM] Fix indentation issue in AArch64ExpandPseudo::expandMI (PR #186375)   via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   Ramkumar Ramachandra via llvm-commits
• [llvm] [NFC][LLVM] Fix indentation issue in AArch64ExpandPseudo::expandMI (PR #186375)   Paul Walker via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Paul Walker via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Move SSAF from Analysis/Scalable/ to ScalableStaticAnalysisFramework/ (PR #186156)   Balázs Benics via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Piotr Fusik via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Pass MF into the SIInsertWaitcnts constructor. NFC. (PR #186369)   Matt Arsenault via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify and unify resume value handling for epilogue vec. (PR #185969)   Florian Hahn via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle spirv64-intel images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   Chris Jackson via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   Alex Duran via llvm-commits
• [llvm] 979c772 - [gn] port 5cafc12f06ea93, ef375ca2329b01 (clang-ssaf-linker)   Nico Weber via llvm-commits
• [llvm] [LoopReduceMotion] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [clang] [llvm] [llvm][tools] Add support to llvm-offload-binary to unbundle images inside OffloadBinary images (PR #184774)   Alex Duran via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   David Sherwood via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] Pass MF into the SIInsertWaitcnts constructor. NFC. (PR #186369)   Jay Foad via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove single use assumption in combineVectorSizedSetCCEquality (PR #182200)   Simon Pilgrim via llvm-commits
• [llvm] ae7ee99 - [gn] fix rebase mishap in 52c224a12e564 due to fcd230adc6cb6   Nico Weber via llvm-commits
• [llvm] [TTI] Return scalable size on scalable in getRegisterBitWidth (PR #186171)   David Sherwood via llvm-commits
• [llvm] [docs] Fix line wrapping in SourceLevelDebugging.rst (PR #186377)   Sergei Barannikov via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   Chris Jackson via llvm-commits
• [llvm] Add hybrid function ordering support (PR #186003)   Paschalis Mpeis via llvm-commits
• [llvm] Add hybrid function ordering support (PR #186003)   Paschalis Mpeis via llvm-commits
• [llvm] Add hybrid function ordering support (PR #186003)   Paschalis Mpeis via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve readability of cmp adjustment code (PR #185532)   Hussam Alhassan via llvm-commits
• [llvm] 603f1e9 - [NFC][AArch64] ConditionOptimizer Improve readability of cmp adjustment code (#185532)   via llvm-commits
• [llvm] [NFC][AArch64] ConditionOptimizer Improve readability of cmp adjustment code (PR #185532)   Hussam Alhassan via llvm-commits
• [llvm] [AArch64] Remove promotion cost for fixed-length bfloat arith with +sve-b16b16 (PR #186378)   Benjamin Maxwell via llvm-commits
• [llvm] [Offload][L0] clear completed events from a wait list (PR #186379)   Piotr Balcer via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   David Green via llvm-commits
• [llvm] [AArch64] Remove promotion cost for fixed-length bfloat arith with +sve-b16b16 (PR #186378)   via llvm-commits
• [llvm] [AArch64] Remove promotion cost for fixed-length bfloat arith with +sve-b16b16 (PR #186378)   via llvm-commits
• [llvm] [Offload][L0] clear completed events from a wait list (PR #186379)   via llvm-commits
• [llvm] [LegalizeTypes] Keep non-negative info in SUB(CTLZ) (PR #186338)   Alexey Merzlyakov via llvm-commits
• [llvm] [AArch64] Add C1-Nano scheduling model (PR #182316)   David Green via llvm-commits
• [lldb] [llvm] [lldb] Improve language bindings for SBModule/SBModuleSpec UUID APIs (PR #186242)   Ebuka Ezike via llvm-commits
• [lldb] [llvm] [lldb] Improve language bindings for SBModule/SBModuleSpec UUID APIs (PR #186242)   Ebuka Ezike via llvm-commits
• [clang] [llvm] [sancov] add -fsanitize-coverage=trace-pc-entry-exit (PR #185972)   Jann Horn via llvm-commits
• [llvm] [LLVM][CodeGen][SVE] insert_subvector(undef, splat(C), 0) -> splat(C). (PR #186090)   via llvm-commits
• [llvm] [NFC][LLVM] Fix indentation issue in AArch64ExpandPseudo::expandMI (PR #186375)   Thibault Monnier via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Simon Pilgrim via llvm-commits
• [llvm] [docs] Fix line wrapping in SourceLevelDebugging.rst (PR #186377)   Thibault Monnier via llvm-commits
• [llvm] 620b308 - [docs] Fix line wrapping in SourceLevelDebugging.rst (#186377)   via llvm-commits
• [llvm] [docs] Fix line wrapping in SourceLevelDebugging.rst (PR #186377)   Sergei Barannikov via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU][RegAlloc] Correct insertion of IMPLICIT_DEF in loop headers (PR #186348)   Chris Jackson via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] add interchange operation in the OpenMP mlir dialect (PR #186381)   Ferran Toda via llvm-commits
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• [llvm] [mlir] [MLIR][OpenMP] add interchange operation in the OpenMP mlir dialect (PR #186381)   via llvm-commits
• [llvm] 5634068 - [gn] port b02ef5abab026 / 5d7a502a9d923 (clang-ssaf-format)   Nico Weber via llvm-commits
• [flang] [llvm] [Flang][MLIR][OpenMP] Add support for OpenMP Loop Interchange and permutation clause in Flang (PR #183435)   Ferran Toda via llvm-commits
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• [llvm] 082987f - [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn sin cos intrinsics. (#185934)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn sin cos intrinsics. (PR #185934)   Syadus Sefat via llvm-commits
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• [llvm] [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (PR #185713)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (PR #185713)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Remove promotion cost for fixed-length bfloat arith with +sve-b16b16 (PR #186378)   via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (PR #185713)   Simon Pilgrim via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Shivam Kunwar via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   Paul Walker via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   Paul Walker via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   Paul Walker via llvm-commits
• [llvm] [Analysis][NFC] Drop use of BranchInst (PR #186374)   Alexis Engelke via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [Analysis][NFC] Drop use of BranchInst (PR #186374)   via llvm-commits
• [llvm] [Analysis][NFC] Drop use of BranchInst (PR #186374)   Alexis Engelke via llvm-commits
• [llvm] [DA] Refactor the signature of the Exact SIV test (NFCI) (PR #186386)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Refactor the signature of the Exact SIV test (NFCI) (PR #186386)   Ryotaro Kasuga via llvm-commits
• [llvm] [CodeGen] Drop uses of BranchInst (PR #186391)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Drop uses of BranchInst (PR #186391)   via llvm-commits
• [llvm] [CodeGen] Drop uses of BranchInst (PR #186391)   via llvm-commits
• [llvm] [CodeGen] Drop uses of BranchInst (PR #186391)   via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Jakub Kuderski via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Matt Arsenault via llvm-commits
• [llvm] 8c84b3c - [AMDGPU][NFC] Add missing isFLAT check to isVMEM. (#186321)   via llvm-commits
• [llvm] [AMDGPU][NFC] Add missing isFLAT check to isVMEM. (PR #186321)   via llvm-commits
• [llvm] [AMDGPU][NFC] Add missing isFLAT check to isVMEM. (PR #186321)   via llvm-commits
• [llvm] [Analysis][NFC] Drop use of BranchInst (PR #186374)   Nikita Popov via llvm-commits
• [llvm] [NFC] New test for untested case in SILowerI1Copies (PR #186127)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Address comments on SPV_INTEL_masked_gather_scatter extension implementation (PR #186336)   Marcos Maronas via llvm-commits
• [llvm] d7a388c - [AMDGPU] Pass MF into the SIInsertWaitcnts constructor. NFC. (#186369)   via llvm-commits
• [llvm] [AMDGPU] Pass MF into the SIInsertWaitcnts constructor. NFC. (PR #186369)   Jay Foad via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   Ruoyu Qiu via llvm-commits
• [llvm] [Analysis][NFC] Drop use of BranchInst (PR #186374)   Alexis Engelke via llvm-commits
• [llvm] 9d20e75 - [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (#185713)   via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldShuffleOfSelects for single-element shuffle result (PR #185713)   Simon Pilgrim via llvm-commits
• [llvm] [DA] Refactor the signature of the Exact SIV test (NFCI) (PR #186386)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Refactor the signature of the Exact SIV test (NFCI) (PR #186386)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Refactor the signature of the Exact SIV test (NFCI) (PR #186386)   via llvm-commits
• [llvm] [DWARFVerifier] rewrite DieRangeInfo::insert to remove O(N^2) loop (PR #185915)   J. Ryan Stinnett via llvm-commits
• [llvm] [AMDGPU] Replace relaxed-buffer-oob-mode feature with module flag (PR #160922)   Krzysztof Drewniak via llvm-commits
• [llvm] [VPlan] Introduce VPTypeAnalysis::getIndexType (NFC) (PR #186382)   Luke Lau via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] 991fd93 - [MIR] Support symbolic inline asm operands (#185893)   via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] c513ed1 - [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (#186225)   via llvm-commits
• [llvm] [DebugInfo] Add Verifier check for duplicate arg indices in SP's retainedNodes list (PR #186225)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [VPlan] Introduce VPTypeAnalysis::getIndexType (NFC) (PR #186382)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] [SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (PR #135076)   Jonas Paulsson via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] [VPlan] Introduce VPTypeAnalysis::getIndexType (NFC) (PR #186382)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce VPTypeAnalysis::getIndexType (NFC) (PR #186382)   Ramkumar Ramachandra via llvm-commits
• [llvm] [MIR] Support symbolic inline asm tiedto constraints (PR #186397)   Ivan Kosarev via llvm-commits
• [llvm] [MIR] Support symbolic inline asm tiedto constraints (PR #186397)   via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] [AMDGPU] Simplify state clearing in SIInsertWaitcnts. NFC. (PR #186399)   Jay Foad via llvm-commits
• [llvm] [Offload][L0] clear completed events from a wait list (PR #186379)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Simplify state clearing in SIInsertWaitcnts. NFC. (PR #186399)   via llvm-commits
• [llvm] [Offload][L0] clear completed events from a wait list (PR #186379)   Nick Sarnie via llvm-commits
• [llvm] [HLSL][SPIRV] Update reversebits codegen for half types (PR #184936)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU] SIFixSGPRCopies avoid placing V_READFIRSTLANE inside the loop. (PR #186400)   via llvm-commits
• [llvm] [AMDGPU] SIFixSGPRCopies avoid placing V_READFIRSTLANE inside the loop. (PR #186400)   via llvm-commits
• [llvm] [AMDGPU] SIFixSGPRCopies avoid placing V_READFIRSTLANE inside the loop. (PR #186400)   via llvm-commits
• [clang] [llvm] [llvm][tools] Extend llvm-objdump to support nested OffloadBinaries (PR #185425)   Alex Duran via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Jay Foad via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [MIR] Support symbolic inline asm operands (PR #185893)   Ivan Kosarev via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   via llvm-commits
• [llvm] [gn] port b80248a0ea35df more (clang-doc md templates) (PR #186401)   Nico Weber via llvm-commits
• [llvm] cf54aca - [gn] port b80248a0ea35df more (clang-doc md templates) (#186401)   via llvm-commits
• [llvm] [gn] port b80248a0ea35df more (clang-doc md templates) (PR #186401)   Nico Weber via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   Luke Lau via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [VPlan] Introduce VPTypeAnalysis::getIndexType (NFC) (PR #186382)   Luke Lau via llvm-commits
• [llvm] [VPlan] Use target's index type for {First,Last}ActiveLane instead of i64 (PR #186361)   Luke Lau via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Abdullah Sarkar via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Anshil Gandhi via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [clang] [llvm] [X86][APX] Combine MOVABS+JMP to JMPABS when in no-PIC large code model (PR #186402)   Phoebe Wang via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [clang] [llvm] [X86][APX] Combine MOVABS+JMP to JMPABS when in no-PIC large code model (PR #186402)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision erf function (PR #179251)   via llvm-commits
• [llvm] [DAGCombiner] Honor rewrite semantics of fast-math flags in fdiv combine (PR #167595)   Mikołaj Piróg via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Abdullah Sarkar via llvm-commits
• [llvm] ea61110 - [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (#184847)   via llvm-commits
• [llvm] [AArch64][SVE2] Allow commuting two-input NBSL/BSL2N idioms. (PR #184847)   Ricardo Jesus via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   LLVM Continuous Integration via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   Nikita Popov via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   David Sherwood via llvm-commits
• [clang] [llvm] [Clang][OpenMP] Implement Loop splitting `#pragma omp split` directive (PR #183261)   Amit Tiwari via llvm-commits
• [llvm] [DAGCombiner] Honor rewrite semantics of fast-math flags in fdiv combine (PR #167595)   Mikołaj Piróg via llvm-commits
• [llvm] [ScalarEvolution] Limit recursion in getRangeRef for PHI nodes. (PR #152823)   Danila Malyutin via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [Frontend/OpenMP][NFC] Drop uses of BranchInst (PR #186393)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Eugene Epshteyn via llvm-commits
• [llvm] 55db9cb - [IVDescriptors] Remove single-use constraint from FindLast comparisons (#186096)   via llvm-commits
• [llvm] [IVDescriptors] Remove single-use constraint from FindLast comparisons (PR #186096)   Graham Hunter via llvm-commits
• [llvm] c5e85ca - [AArch64] Improve pow(x,y) cost model for some constant values of y (#185607)   via llvm-commits
• [llvm] [AArch64] Improve pow(x, y) cost model for some constant values of y (PR #185607)   David Sherwood via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [Frontend/OpenMP][NFC] Drop uses of BranchInst (PR #186393)   Alexis Engelke via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Petar Avramovic via llvm-commits
• [lld] [lld][MachO] Enable LoopVectorization and SLPVectorization for ThinLTO (PR #182748)   Nico Weber via llvm-commits
• [llvm] [Bazel] Fixes 7855812 (PR #186405)   via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [llvm] [OFFLOAD] Generalize support for OffloadBinary images (PR #186088)   Joseph Huber via llvm-commits
• [llvm] [Bazel] Fixes 7855812 (PR #186405)   via llvm-commits
• [lldb] [llvm] Reland "[Support] Move HTTP client/server to new LLVMSupportHTTP lib (NFC)" (PR #186074)   Martin Storsjö via llvm-commits
• [llvm] [AMDGPU] Add regbank legalization rules for G_ATOMICRMW_FMIN and G_ATOMICRMW_FMAX (PR #182824)   Anshil Gandhi via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Kelvin Li via llvm-commits
• [llvm] 579aca8 - [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (#182318)   via llvm-commits
• [llvm] [VPlan] Prevent uses of materialized VPSymbolicValues. (NFC) (PR #182318)   Florian Hahn via llvm-commits
• [llvm] [DA] Fix overflow in symbolic RDIV test (PR #185805)   Ryotaro Kasuga via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Luke Lau via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Luke Lau via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Luke Lau via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Luke Lau via llvm-commits
• [llvm] [X86][APX] Enable NDD tunings (PR #186049)   Phoebe Wang via llvm-commits
• [llvm] Fix bazel build for #179251 (PR #186407)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build for #179251 (PR #186407)   Karlo Basioli via llvm-commits
• [llvm] Fix bazel build for #179251 (PR #186407)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
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• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners option (PR #176135)   Anatoly Trosinenko via llvm-commits
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• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners argument (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners=... argument (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners=... argument (PR #176135)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT] Gadget scanner: implement finer-grained --scanners=... argument (PR #176135)   Anatoly Trosinenko via llvm-commits
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• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   Jack Styles via llvm-commits
• [llvm] [DebugInfo][CodeView] Support `S_DEFRANGE_REGISTER_REL_INDIR` (PR #186410)   via llvm-commits
• [llvm] [DebugInfo][CodeView] Support `S_DEFRANGE_REGISTER_REL_INDIR` (PR #186410)   via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   Jack Styles via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [OpenMP] Emit aggregate kernel prototypes and remove libffi dependency (PR #186261)   Joseph Huber via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #182028)   Tarcísio Fischer via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   Yingwei Zheng via llvm-commits
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• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Jay Foad via llvm-commits
• [llvm] [UniformityAnalysis] Track uniform values for conservative divergence queries (PR #180509)   Jay Foad via llvm-commits
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• [llvm] [Hexagon] Fix use-before-def bug by using caller-saved register for AP (PR #186373)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix use-before-def bug by using caller-saved register for AP (PR #186373)   Brian Cain via llvm-commits
• [llvm] [AArch64] Enable Spillage Copy Elimination by default (PR #186093)   Jack Styles via llvm-commits
• [llvm] [AMDGPU] Remove blocks that only branch to other blocks (PR #184908)   Jay Foad via llvm-commits
• [llvm] Add hybrid function ordering support (PR #186003)   YongKang Zhu via llvm-commits
• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   Farzon Lotfi via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   via llvm-commits
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• [llvm] [AArch64] Remove vector REV16, use BSWAP instead (PR #186414)   David Green via llvm-commits
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• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   via llvm-commits
• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   Farzon Lotfi via llvm-commits
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• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
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• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Introduce VPlan::getDataLayout (NFC) (PR #186418)   via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
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• [llvm] [X86] ReplaceNodeResults - i512 shift expansion - generalize vector element counts (PR #186420)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Introduce VPTypeAnalysis::getIndexType (NFC) (PR #186382)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LLVM] Make -use-constant-fp-for-scalable-splat the default. (PR #186422)   Paul Walker via llvm-commits
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• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   David Sherwood via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   David Sherwood via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Łukasz Plewa via llvm-commits
• [clang] [llvm] [sancov] add -fsanitize-coverage=trace-pc-entry-exit (PR #185972)   Jann Horn via llvm-commits
• [llvm] [LLVM] Make -use-constant-fp-for-scalable-splat the default. (PR #186422)   Nikita Popov via llvm-commits
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• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   via llvm-commits
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• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [llubi] Add basic support for provenance modeling (PR #185977)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [flang] [llvm] [flang][flang-rt] Add support for non-standard TIMEF intrinsic (PR #185377)   Peter Klausler via llvm-commits
• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   Farzon Lotfi via llvm-commits
• [llvm] [AMDGPU] Remove unused regclass SGPR_HI16. NFCI. (PR #186431)   Jay Foad via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   via llvm-commits
• [llvm] [AMDGPU] Remove unused regclass SGPR_HI16. NFCI. (PR #186431)   via llvm-commits
• [llvm] [AMDGPU] Remove unused regclass SGPR_HI16. NFCI. (PR #186431)   Jay Foad via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for FFBH/FFBL (PR #186017)   via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Fix OpBuildNDRange (PR #186153)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   Farzon Lotfi via llvm-commits
• [llvm] cbb8e08 - [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (#186181)   via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math][c23] Add hypotbf16 function (PR #183460)   via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Dharuni R Acharya via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   Florian Hahn via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Jakub Kuderski via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Jakub Kuderski via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] QuadReadAcrossX intrinsic support (PR #184360)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ds_swizzle (PR #186024)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [VPlan] Don't narrow wide loads for scalable VFs when narrowing IGs. (PR #186181)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Remove unused regclass SGPR_HI16. NFCI. (PR #186431)   Joe Nash via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] 4504e85 - [X86] ReplaceNodeResults - i512 shift expansion - generalize vector element counts (#186420)   via llvm-commits
• [llvm] [X86] ReplaceNodeResults - i512 shift expansion - generalize vector element counts (PR #186420)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] 6ab7160 - [X86] Fix syntax directive for --output-asm-variant=1 (#186316)   via llvm-commits
• [llvm] [X86] Fix syntax directive for --output-asm-variant=1 (PR #186316)   Fangrui Song via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] 4c40607 - [LoopUnroll][NFC] Move unroll pragma helper functions to LoopUnroll.cpp (#185895)   via llvm-commits
• [llvm] [LoopUnroll][NFC] Move unroll pragma helper functions to LoopUnroll.cpp (PR #185895)   via llvm-commits
• [llvm] [VPlan] Introduce VPlan::getDataLayout (NFC) (PR #186418)   Luke Lau via llvm-commits
• [llvm] [MC][CodeGen] Add --large-eh-encoding flag for x86_64 ELF (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [coro] [async] There needs to be a one-to-one corespondance between the async resume function value and the suspend intrinsic (PR #186436)   Arnold Schwaighofer via llvm-commits
• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   Dmitry Sidorov via llvm-commits
• [llvm] [coro] [async] There needs to be a one-to-one corespondance between the async resume function value and the suspend intrinsic (PR #186436)   via llvm-commits
• [llvm] [coro] [async] There needs to be a one-to-one corespondance between the async resume function value and the suspend intrinsic (PR #186436)   via llvm-commits
• [llvm] [AMDGPU] Remove unused regclass SGPR_HI16. NFCI. (PR #186431)   Matt Arsenault via llvm-commits
• [llvm] 616bf5a - [VPlan] Introduce VPlan::getDataLayout (NFC) (#186418)   via llvm-commits
• [llvm] [VPlan] Introduce VPlan::getDataLayout (NFC) (PR #186418)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SPIR-V] Address comments on SPV_INTEL_masked_gather_scatter extension implementation (PR #186336)   Dmitry Sidorov via llvm-commits
• [llvm] [MIR] Support symbolic inline asm tiedto constraints (PR #186397)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Romanov Vlad via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix pointer type handling in instruction selection (PR #181842)   Romanov Vlad via llvm-commits
• [llvm] c272252 - [MIR] Support symbolic inline asm tiedto constraints (#186397)   via llvm-commits
• [llvm] [MIR] Support symbolic inline asm tiedto constraints (PR #186397)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   Adel Ejjeh via llvm-commits
• [llvm] [LiveVariables] Fix partial def handling in HandlePhysRegUse and FindLastPartialDef (PR #186437)   Kiroo via llvm-commits
• [llvm] [LiveVariables] Fix partial def handling in HandlePhysRegUse and FindLastPartialDef (PR #186437)   via llvm-commits
• [llvm] [AMDGPU] Include TRANS instructions in WMMA coexecution hazard checking (PR #186269)   Jay Foad via llvm-commits
• [llvm] [VPlan] Introduce VPlan::getDataLayout (NFC) (PR #186418)   Florian Hahn via llvm-commits
• [llvm] [LiveVariables] Fix partial def handling in HandlePhysRegUse and FindLastPartialDef (PR #186437)   via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Sort source lists in SSAF build files (PR #186408)   Aviral Goel via llvm-commits
• [polly] f8734a5 - [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (#91961)   via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Florian Hahn via llvm-commits
• [llvm] 7409143 - [clang][ssaf][NFC] Sort source lists in SSAF build files (#186408)   via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Sort source lists in SSAF build files (PR #186408)   Balázs Benics via llvm-commits
• [llvm] [SPIRV] Fix getNumScalarOrVectorTotalBitWidth to handle OpTypeBool type (PR #186296)   Dmitry Sidorov via llvm-commits
• [llvm] [AMDGPU] Add target features for SWMMAC instructions (PR #185785)   Chinmay Deshpande via llvm-commits
• [llvm] [SPIRV] Fix OpBuildNDRange (PR #186153)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   via llvm-commits
• [llvm] [NFC] [Docs] Document IIT encoding flow for intrinsic type signatures (PR #185453)   Dharuni R Acharya via llvm-commits
• [llvm] [polly] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Florian Hahn via llvm-commits
• [llvm] [TTI] Return scalable size on scalable in getRegisterBitWidth (PR #186171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [TTI] Return scalable size on scalable in getRegisterBitWidth (PR #186171)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Florian Hahn via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [llvm] [SPIRV] Add bitreverse emulation (PR #186412)   via llvm-commits
• [llvm] [BOLT][Perf2bolt] Add support to generate pre-parsed perf data (PR #171144)   Paschalis Mpeis via llvm-commits
• [llvm] [coro] [async] There needs to be a one-to-one corespondance between the async resume function value and the suspend intrinsic (PR #186436)   via llvm-commits
• [llvm] [coro] [async] There needs to be a one-to-one corespondance between the async resume function value and the suspend intrinsic (PR #186436)   via llvm-commits
• [llvm] [llvm-mc] Default output assembly variant to AssemblerDialect (PR #186317)   Fangrui Song via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Florian Hahn via llvm-commits
• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   Florian Hahn via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Nikita Popov via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] Fix passing MIR tests. (PR #186450)   Ivan Kosarev via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LV] Introduce enums for uncountable exit detail and style (PR #184808)   Graham Hunter via llvm-commits
• [lld] Resolve undefined prefetch targets to zero to effectively prefetch the next instruction. (PR #174448)   Rahman Lavaee via llvm-commits
• [llvm] 4925028 - [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (#181241)   via llvm-commits
• [llvm] [AMDGPU][LoopUnroll] Enable allowexpensivetripcount for amdgpu when unroll pragmas are present (PR #181241)   via llvm-commits
• [llvm] Use getNameWithPrefix to handle anonymous functions as code prefetch targets. (PR #177003)   Rahman Lavaee via llvm-commits
• [lld] [lld] clang-format sources (PR #183805)   Farid Zakaria via llvm-commits
• [llvm] [AArch64][llvm] Rewrite the TLBI multiclass to be much clearer (NFC) (PR #186451)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Rewrite the TLBI multiclass to be much clearer (NFC) (PR #186451)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Rewrite the TLBI multiclass to be much clearer (NFC) (PR #186451)   Jonathan Thackray via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [AArch64][llvm] Rewrite the TLBI multiclass to be much clearer (NFC) (PR #186451)   via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] Fix passing MIR tests. (PR #186450)   Ivan Kosarev via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [llvm] [Codegen, X86] Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [lld] [LLD] [ELF] Make {bti,gcs}-report=none silence warnings from force-bti/gcs=always (PR #186343)   Fangrui Song via llvm-commits
• [lld] [LLD] [ELF] Make {bti,gcs}-report=none silence warnings from force-bti/gcs=always (PR #186343)   Fangrui Song via llvm-commits
• [lld] [LLD] [ELF] Make {bti,gcs}-report=none silence warnings from force-bti/gcs=always (PR #186343)   Fangrui Song via llvm-commits
• [llvm] Reland [VPlan] Extend interleave-group-narrowing to WidenCast (PR #186454)   Ramkumar Ramachandra via llvm-commits
• [lld] [LLD] [ELF] Make {bti,gcs}-report=none silence warnings from force-bti/gcs=always (PR #186343)   Fangrui Song via llvm-commits
• [llvm] Reland [VPlan] Extend interleave-group-narrowing to WidenCast (PR #186454)   via llvm-commits
• [llvm] [llvm][utils] Handle Issue/PR authors having no display name set (PR #186094)   Aiden Grossman via llvm-commits
• [lld] [LLD] [ELF] Make -z gcs=always implicitly warn on missing GCS, like force-bti (PR #186203)   Fangrui Song via llvm-commits
• [libcxx] [llvm] [libc++] Simplify the workflow for updating CI docker images (PR #186456)   Louis Dionne via llvm-commits
• [libcxx] [llvm] [libc++] Simplify the workflow for updating CI docker images (PR #186456)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into $x \in R'$ (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] Reland [VPlan] Extend interleave-group-narrowing to WidenCast (PR #186454)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Andrei Elovikov via llvm-commits
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• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
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• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   Andrei Elovikov via llvm-commits
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• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   Andrei Elovikov via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Craig Topper via llvm-commits
• [llvm] [LoopFusion] Fusing with loop-invariant non-anti dependency (PR #186459)   Alireza Torabian via llvm-commits
• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
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• [llvm] [LoopFusion] Fusing with loop-invariant non-anti dependency (PR #186459)   Alireza Torabian via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
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• [lld] [lld][ELF] Fix crash when relaxation pass encounters synthetic sections (PR #184758)   Fangrui Song via llvm-commits
• [llvm] [DAG] ComputeKnownBits - set low bit to zero for ADD(X, X) (PR #186461)   Xinlong Chen via llvm-commits
• [llvm] cfa7655 - AMDGPU/GlobalISel: RegBankLegalize rules for lds_param_load (#186035)   via llvm-commits
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• [llvm] [DAG] ComputeKnownBits - set low bit to zero for ADD(X, X) (PR #186461)   via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [llvm] [polly] [SCEV] Introduce SCEVUse, use it instead of const SCEV * (NFCI). (PR #91961)   Slava Zakharin via llvm-commits
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• [llvm] [LoopFusion] Fusing with loop-invariant non-anti dependency (PR #186459)   Alireza Torabian via llvm-commits
• [llvm] f2ffe13 - [TTI] Return scalable size on scalable in getRegisterBitWidth (#186171)   via llvm-commits
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• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Trim unused transitive deps from SSAF libraries (PR #186442)   Aviral Goel via llvm-commits
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• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Farzon Lotfi via llvm-commits
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• [clang] [llvm] [clang][ssaf][NFC] Trim unused transitive deps from SSAF libraries (PR #186442)   Balázs Benics via llvm-commits
• [llvm] [AMDGPU] Simplify state clearing in SIInsertWaitcnts. NFC. (PR #186399)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Deric C. via llvm-commits
• [llvm] [LoopFusion] Fusing with loop-invariant non-anti dependency (PR #186459)   Alireza Torabian via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Deric C. via llvm-commits
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• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [clang] [llvm] Reapply "[clang][ssaf] Add --ssaf-extract-summaries= and --ssaf-tu-summary-file= options" (PR #186463)   Balázs Benics via llvm-commits
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• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL][DirectX] Add `transpose` HLSL intrinsic and DXIL lowering of `llvm.matrix.transpose` (PR #186263)   Deric C. via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   via llvm-commits
• [llvm] 23cc55f - Fix passing MIR tests. (#186450)   via llvm-commits
• [llvm] Fix passing MIR tests. (PR #186450)   Ivan Kosarev via llvm-commits
• [llvm] [LegalizeTypes] Keep non-negative info in SUB(CTLZ) (PR #186338)   Craig Topper via llvm-commits
• [clang] [llvm] Reapply "[clang][ssaf] Add --ssaf-extract-summaries= and --ssaf-tu-summary-file= options" (PR #186463)   Balázs Benics via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Jessica Clarke via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Jessica Clarke via llvm-commits
• [llvm] AMDGPU coverity fixes (PR #182013)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] Reapply "[clang][ssaf] Add --ssaf-extract-summaries= and --ssaf-tu-summary-file= options" (PR #186463)   Balázs Benics via llvm-commits
• [clang] [llvm] Reapply "[clang][ssaf] Add --ssaf-extract-summaries= and --ssaf-tu-summary-file= options" (PR #186463)   Balázs Benics via llvm-commits
• [llvm] [LV] Add support for partial alias masking with tail folding (PR #182457)   Benjamin Maxwell via llvm-commits
• [clang] [lld] [llvm] [MTE] Improve memtag support for non-Android AArch64 targets (PR #183275)   Florian Mayer via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #152353)   via llvm-commits
• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   Andrei Elovikov via llvm-commits
• [llvm] [Codegen, X86] Add prefetch insertion based on Propeller profile (PR #166324)   Simon Pilgrim via llvm-commits
• [llvm] [ObjCARC] Change autorelease to release when the pool state is not changed between the autorelease and the pool pop (PR #152353)   via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Trim unused transitive deps from SSAF libraries (PR #186442)   LLVM Continuous Integration via llvm-commits
• [llvm] [LICM] Improve LICM when calls only change Inaccessible memory (PR #169379)   via llvm-commits
• [llvm] [X86] Add correct model values for znver1, znver2 shld, shrd (PR #186175)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add correct model values for znver1, znver2 shld, shrd (PR #186175)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add correct model values for znver1, znver2 shld, shrd (PR #186175)   Simon Pilgrim via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   Eugene Epshteyn via llvm-commits
• [llvm] [bazel] Fix #186235 (PR #186473)   Chenguang Wang via llvm-commits
• [llvm] [bazel] Fix #186235 (PR #186473)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Fix #186235 (PR #186473)   Chenguang Wang via llvm-commits
• [llvm] [NFC][SCEV] Use const_cast to avoid warnings/errors. (PR #186474)   Slava Zakharin via llvm-commits
• [llvm] [bazel] Fix #186235 (PR #186473)   Chenguang Wang via llvm-commits
• [clang] [llvm] [SSAF] Fix shared library build by adding missing clangBasic dependency (PR #186475)   Balázs Benics via llvm-commits
• [llvm] 02fb667 - AMDGPU/GlobalISel: RegBankLegalize rules for FFBH/FFBL (#186017)   via llvm-commits
• [llvm] [NFC][SCEV] Use const_cast to avoid warnings/errors. (PR #186474)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for FFBH/FFBL (PR #186017)   via llvm-commits
• [clang] [llvm] [SSAF] Fix shared library build by adding missing clangBasic dependency (PR #186475)   via llvm-commits
• [clang] [llvm] [SSAF] Fix shared library build by adding missing clangBasic dependency (PR #186475)   Aviral Goel via llvm-commits
• [llvm] [offload] Add properties parameter to olLaunchKernel (PR #184343)   Kevin Sala Penades via llvm-commits
• [lldb] [llvm] [lldb][Process/FreeBSDKernelCore] Set kernel displacement (PR #183975)   Minsoo Choo via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Craig Topper via llvm-commits
• [llvm] [LegalizeTypes] Expand 128-bit UDIV/UREM by constant via Chunk Addition (PR #146238)   Craig Topper via llvm-commits
• [llvm] Add hybrid function ordering support (PR #186003)   YongKang Zhu via llvm-commits
• [llvm] 9f26f85 - AMDGPU/GlobalISel: RegBankLegalize rules for ds_bvh_stack (#186219)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for ds_bvh_stack (PR #186219)   via llvm-commits
• [llvm] [AMDGPU] Fix incorrect VGPR usage for `s` constrained inline asm (PR #184910)   Shilei Tian via llvm-commits
• [llvm] [Hexagon] Fix global scheduler crash with vector regions (PR #185982)   Fateme Hosseini via llvm-commits
• [lld] [lld][MachO] Enable LoopVectorization and SLPVectorization for ThinLTO (PR #182748)   Tal Keren via llvm-commits
• [llvm] [Hexagon] Fix global scheduler crash with vector regions (PR #185982)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ds_swizzle (PR #186024)   via llvm-commits
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• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_ds_swizzle (PR #186024)   via llvm-commits
• [llvm] [AMDGPU] Mark VOPC_e64 instructions rematerializable (PR #186195)   Shilei Tian via llvm-commits
• [llvm] [X86] lowerV4F32Shuffle - don't use INSERTPS if SHUFPS will suffice (PR #186468)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerV4F32Shuffle - don't use INSERTPS if SHUFPS will suffice (PR #186468)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Ricardo Jesus via llvm-commits
• [llvm] [AMDGPU] Add target features for SWMMAC instructions (PR #185785)   Shilei Tian via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   Joshua Cranmer via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [clang][ssaf] Fix shared library build by adding missing clangBasic dependency (PR #186475)   Kewen Meng via llvm-commits
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• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   Eli Friedman via llvm-commits
• [llvm] [msan][NFCI] Replace unnecessary shadow cast with assertion (PR #186498)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Replace unnecessary shadow cast with assertion (PR #186498)   via llvm-commits
• [llvm] [msan][NFCI] Replace unnecessary shadow cast with assertion (PR #186498)   via llvm-commits
• [llvm] [msan][NFCI] Replace unnecessary shadow cast with assertion (PR #186498)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Replace unnecessary shadow cast with assertion (PR #186498)   Florian Mayer via llvm-commits
• [llvm] 1452d22 - [RISCV][P-ext] Remove unecessary AND from packed shift amounts. (#186488)   via llvm-commits
• [llvm] [RISCV][P-ext] Remove unecessary AND from packed shift amounts. (PR #186488)   Craig Topper via llvm-commits
• [llvm] [LoopFusion] Fusing with loop-invariant non-anti dependency (PR #186459)   Alireza Torabian via llvm-commits
• [llvm] [RISCV] Add Statistics for Fusions (PR #186499)   Sam Elliott via llvm-commits
• [llvm] [msan][NFCI] Replace unnecessary shadow cast with assertion (PR #186498)   Thurston Dang via llvm-commits
• [llvm] [LoopUnroll] Remove `computeUnrollCount()`'s return value (PR #184529)   via llvm-commits
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• [llvm] [msan][NFCI] Replace unnecessary shadow cast with assertion (PR #186498)   Thurston Dang via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [NFCI][VPlan] Split initial mem-widening into a separate transformation (PR #182592)   Andrei Elovikov via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Adel Ejjeh via llvm-commits
• [llvm] [AMDGPU] Fix incorrect VGPR usage for `s` constrained inline asm (PR #184910)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Fix incorrect VGPR usage for `s` constrained inline asm (PR #184910)   Chinmay Deshpande via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Shilei Tian via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [llvm] [AMDGPU] Fix incorrect VGPR usage for `s` constrained inline asm (PR #184910)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Remove unused regclass SGPR_HI16. NFCI. (PR #186431)   Jay Foad via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Eli Friedman via llvm-commits
• [clang] [llvm] [RISCV] Add `sifive-x160` and `sifive-x180` processor definitions (PR #186264)   Min-Yih Hsu via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add computeKnownBits fallback DemandedElts handling and tests (PR #186025)   Youngsun Yoo via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Florian Mayer via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Stanislav Mekhanoshin via llvm-commits
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• [llvm] [CodeGen] Drop uses of BranchInst (PR #186391)   Alexis Engelke via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   William Moses via llvm-commits
• [llvm] [mlir] [mlir] Replace MLIR_ENABLE_ROCM_CONVERSIONS with LLVM_HAS_AMDGPU_TARGET (PR #182652)   William Moses via llvm-commits
• [llvm] 836421a - [coro] [async] There needs to be a one-to-one corespondance between the async resume function value and the suspend intrinsic (#186436)   via llvm-commits
• [llvm] [coro] [async] There needs to be a one-to-one corespondance between the async resume function value and the suspend intrinsic (PR #186436)   Arnold Schwaighofer via llvm-commits
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• [llvm] [AArch64][llvm] Rewrite the TLBI multiclass to be clearer (NFC) (PR #186451)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [ScalarEvolution] Limit recursion in getRangeRef for PHI nodes. (PR #152823)   Eli Friedman via llvm-commits
• [llvm] [DWARFVerifier] Fix infinite loop in verifyDebugInfoCallSite (PR #186413)   Greg Clayton via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added `GroupMemoryBarrier()` (PR #185383)   Steven Perron via llvm-commits
• [llvm] [ScalarEvolution] Limit recursion in getRangeRef for PHI nodes. (PR #152823)   Eli Friedman via llvm-commits
• [llvm] [LAA] Allow vectorizing `A[NonZeroNonConstantStride*I] += 1` (PR #186262)   Andrei Elovikov via llvm-commits
• [llvm] a9b944a - [LoopIdiomVectorize] Preserve address space in FindFirstByte (#185226)   via llvm-commits
• [llvm] [LoopIdiomVectorize] Preserve address space in FindFirstByte (PR #185226)   via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Tomohiro Kashiwada via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Deric C. via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   Deric C. via llvm-commits
• [llvm] 696208b - [RISCV] Add codegen patterns to support short forward branches with immediates (#185643)   via llvm-commits
• [llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)   Sam Elliott via llvm-commits
• [libc] [llvm] [libc][math] Refactor copysign family to header-only (PR #182137)   Mohamed Emad via llvm-commits
• [libc] [llvm] [libc][math] Refactor dadd family to header-only (PR #182142)   Mohamed Emad via llvm-commits
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• [compiler-rt] [NFC][sanitizer] Accept ETIMEDOUT in getpwnam_r_invalid_user.cpp (PR #186538)   Vitaly Buka via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Craig Topper via llvm-commits
• [llvm] [LoopUnroll] Enable allowexpensivetripcounts when user provides pragma (PR #181267)   Justin Fargnoli via llvm-commits
• [llvm] [ForceFunctionAttrs] Fix handling of conflicts for more attributes (PR #186304)   Justin Fargnoli via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Brian Cain via llvm-commits
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• [llvm] [ForceFunctionAttrs] Fix handling of conflicts for more attributes (PR #186304)   Justin Fargnoli via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Usama Hameed via llvm-commits
• [llvm] [ForceFunctionAttrs] Fix handling of conflicts for more attributes (PR #186304)   Justin Fargnoli via llvm-commits
• [llvm] [ForceFunctionAttrs] Fix handling of conflicts for more attributes (PR #186304)   Justin Fargnoli via llvm-commits
• [llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)   Usama Hameed via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Shilei Tian via llvm-commits
• [llvm] Fix misspelling (PR #184335)   Jonas Devlieghere via llvm-commits
• [llvm] [gsymutil] Add `--statistics` option (PR #186495)   Roy Shi via llvm-commits
• [llvm] [llvm] Fix misspelling in DWARFLinkerTypeUnit (PR #184335)   Jonas Devlieghere via llvm-commits
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• [llvm] [llvm] Fix misspelling in DWARFLinkerTypeUnit (PR #184335)   Jonas Devlieghere via llvm-commits
• [llvm] [gsymutil] Add `--statistics` option (PR #186495)   Roy Shi via llvm-commits
• [llvm] [llvm] Fix misspelling in DWARFLinkerTypeUnit (PR #184335)   Jonas Devlieghere via llvm-commits
• [llvm] [gsymutil] Add `--statistics` option (PR #186495)   Roy Shi via llvm-commits
• [llvm] [ForceFunctionAttrs] Fix handling of conflicts for more attributes (PR #186304)   Justin Fargnoli via llvm-commits
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• [llvm] [MLIR][BAZEL]Update Bazel overlay for MLIR_ENABLE_ROCM_CONVERSIONS removal (PR #186507)   via llvm-commits
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• [llvm] [SandboxVec][BottomUpVec] Fix crash caused by Cmps with different operand types (PR #186550)   via llvm-commits
• [llvm] [MLIR][BAZEL]Update Bazel overlay for MLIR_ENABLE_ROCM_CONVERSIONS removal (PR #186507)   via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [Exegesis][RISCV] Add RISCV support for llvm-exegesis (PR #89047)   Craig Topper via llvm-commits
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• [llvm] [Instrumentation][nsan] Add maximumnum to NSAN (PR #186345)   Alexander Shaposhnikov via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Stanislav Mekhanoshin via llvm-commits
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• [llvm] [Support] Add option to use Windows vendored ICU (PR #186371)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Abdullah Sarkar via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Shilei Tian via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Abdullah Sarkar via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Shilei Tian via llvm-commits
• [llvm] f87ce0f - [CodeView] Initialize RegisterId members to RegisterId::NONE (#186551)   via llvm-commits
• [llvm] [CodeView] Initialize RegisterId members to RegisterId::NONE (PR #186551)   Vitaly Buka via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Abdullah Sarkar via llvm-commits
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• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Abdullah Sarkar via llvm-commits
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• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Shilei Tian via llvm-commits
• [clang] [llvm] [CUDA/HIP][SYCL] Deduplicate deferred diagnostics across multiple callers (PR #185926)   LLVM Continuous Integration via llvm-commits
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• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [gsymutil] Add `--statistics` option (PR #186495)   Roy Shi via llvm-commits
• [llvm] [gsymutil] Add `--statistics` option (PR #186495)   Roy Shi via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [gsymutil] Add `--statistics` option (PR #186495)   Roy Shi via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [llvm] [gsymutil] Add `--statistics` option (PR #186495)   Roy Shi via llvm-commits
• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [compiler-rt] [sanitizer_common] Define SANITIZER_WEAK_IMPORT for Go race detector (PR #186525)   via llvm-commits
• [llvm] [RISCV] SFB with Immediates to QC.MVccI (PR #186555)   Sam Elliott via llvm-commits
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• [libc] [llvm] [libc][math][c23] Add asinbf16 math function (PR #184170)   via llvm-commits
• [compiler-rt] [sanitizer_common] Define SANITIZER_WEAK_IMPORT for Go race detector (PR #186525)   via llvm-commits
• [llvm] [NFC] Annotate CommentFlag with underlying type (PR #186560)   Sam Elliott via llvm-commits
• [llvm] [NFC] Annotate CommentFlag with underlying type (PR #186560)   via llvm-commits
• [llvm] [NFC] Annotate CommentFlag with underlying type (PR #186560)   Sam Elliott via llvm-commits
• [llvm] [RISCV] SFB with Immediates to QC.MVccI (PR #186555)   Sam Elliott via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Fangrui Song via llvm-commits
• [llvm] [CodeView] Initialize RegisterId members to RegisterId::NONE (PR #186551)   LLVM Continuous Integration via llvm-commits
• [libunwind] [llvm] [llvm][CompactUnwind] Compact unwind does not support .cfi_signal_frame (PR #186458)   Fangrui Song via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Abdullah Sarkar via llvm-commits
• [llvm] [Support] Add option to use Windows vendored ICU (PR #186371)   via llvm-commits
• [llvm] [Support] Add option to use Windows vendored ICU (PR #186371)   via llvm-commits
• [llvm] [Support] Add option to use Windows vendored ICU (PR #186371)   via llvm-commits
• [llvm] [Support] Add option to use Windows vendored ICU (PR #186371)   via llvm-commits
• [llvm] [Support] Add option to use Windows vendored ICU (PR #186371)   via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Brian Cain via llvm-commits
• [llvm] [PDB] Fix and simplify module index lookup (PR #179869)   Haohai Wen via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Fangrui Song via llvm-commits
• [clang] [llvm] [RISCV] Add `sifive-x160` and `sifive-x180` processor definitions (PR #186264)   Pengcheng Wang via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [DebugInfo] Fix segfault in constructSubprogramScopeDIE with null subprogram type (PR #184299)   Shivam Kunwar via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   Phoebe Wang via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [InstCombine] Fold zext-add/sub-min/max-trunc to uadd.sat or usub.sat (PR #185259)   via llvm-commits
• [llvm] [flang-rt] Fix macOS build: define _DARWIN_C_SOURCE for mmap flags (PR #186142)   Sairudra More via llvm-commits
• [llvm] [flang-rt] Fix macOS build: define _DARWIN_C_SOURCE for mmap flags (PR #186142)   Sairudra More via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [InstCombine] Fold zext-add/sub-min/max-trunc to uadd.sat or usub.sat (PR #185259)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [llvm] [Psuedoprobe] Enable pseudo probes for MachO (PR #185758)   Henry Jiang via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   LIU Hao via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [llvm] [AArch64] Sink NOT to be fold into BIC/ORN/EON (PR #176194)   Piotr Fusik via llvm-commits
• [llvm] [Psuedoprobe] Enable pseudo probes for MachO (PR #185758)   Henry Jiang via llvm-commits
• [llvm] [Psuedoprobe] Enable pseudo probes for MachO (PR #185758)   Henry Jiang via llvm-commits
• [llvm] [Psuedoprobe] Enable pseudo probes for MachO (PR #185758)   via llvm-commits
• [llvm] [Psuedoprobe] Enable pseudo probes for MachO (PR #185758)   via llvm-commits
• [llvm] [Psuedoprobe] Enable pseudo probes for MachO (PR #185758)   via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI and ESI on x86-32 (PR #186123)   via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [llvm] [Psuedoprobe][MachO] Enable pseudo probes emission for MachO (PR #185758)   Henry Jiang via llvm-commits
• [llvm] [Psuedoprobe][MachO] Enable pseudo probes emission for MachO (PR #185758)   Henry Jiang via llvm-commits
• [llvm] [AMDGPU] Fix setreg handling in the VGPR MSB lowering (PR #186491)   Stanislav Mekhanoshin via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [flang] [llvm] [flang] Implement SPLIT intrinsic subroutine with tests (PR #185584)   via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [clang] [clang-tools-extra] [llvm] [clang-format] Add support for BasedOnStyle referencing an arbitrary file (PR #107312)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [LangRef] asm clobber constrains: '~memory' allows reads and synchronization (PR #150191)   Ralf Jung via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [clang] [llvm] [HLSL][DirectX][SPIRV] Implement the `fma` API (PR #185304)   via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
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• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] 4b202b0 - [SPIRV][NFC] Drop uses of BranchInst (#186514)   via llvm-commits
• [llvm] [SPIRV][NFC] Drop uses of BranchInst (PR #186514)   Alexis Engelke via llvm-commits
• [llvm] [WebAssembly][NFC] Rename and test FastISel selectBr (PR #186577)   Alexis Engelke via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [WebAssembly][NFC] Rename and test FastISel selectBr (PR #186577)   via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [ScalarEvolution] Limit recursion in getRangeRef for PHI nodes. (PR #152823)   Nikita Popov via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [compiler-rt] [sanitizer_common] Define SANITIZER_WEAK_IMPORT for Go race detector (PR #186525)   Dan Blackwell via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
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• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] [SLP]Remove Alternate early profitability checks in favor of throttling (PR #182760)   Sjoerd Meijer via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   Alexis Engelke via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [ARM] Try to lower sign bit SELECT_CC to shift (PR #186349)   David Green via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [CodeGen] Call getMCPU once instead of commonly twice (PR #186581)   Tomer Shafir via llvm-commits
• [llvm] [CodeGen] Call getMCPU once instead of commonly twice (NFC) (PR #186581)   Tomer Shafir via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   David Green via llvm-commits
• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   Nikita Popov via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   Nikita Popov via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   Nikita Popov via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   Alexis Engelke via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   Alexis Engelke via llvm-commits
• [llvm] [SPIRV][NFC] Drop uses of BranchInst (PR #186514)   LLVM Continuous Integration via llvm-commits
• [llvm] 5b4015e - [Transforms][NFC] Drop uses of BranchInst in headers (#186580)   via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   Alexis Engelke via llvm-commits
• [llvm] [CodeGen] Call getMCPU once instead of commonly twice (NFC) (PR #186581)   Tomer Shafir via llvm-commits
• [llvm] [Transforms/Utils][NFC] Drop uses of BranchInst (PR #186586)   Alexis Engelke via llvm-commits
• [llvm] [Transforms/Utils][NFC] Drop uses of BranchInst (PR #186586)   via llvm-commits
• [llvm] [PDB] Fix and simplify module index lookup (PR #179869)   via llvm-commits
• [llvm] [PDB] Fix and simplify module index lookup (PR #179869)   via llvm-commits
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• [llvm] [InstCombine] Fold y = Cx ∈ R into x ∈ R' for zext(x) (PR #186347)   Kunqiu Chen via llvm-commits
• [llvm] [Transforms][NFC] Drop uses of BranchInst in headers (PR #186580)   LLVM Continuous Integration via llvm-commits
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• [llvm] [Transforms/Utils][NFC] Drop uses of BranchInst (PR #186586)   Alexis Engelke via llvm-commits
• [llvm] [Transforms/Utils][NFC] Drop uses of BranchInst (PR #186586)   LLVM Continuous Integration via llvm-commits
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• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
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• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Simon Pilgrim via llvm-commits
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• [llvm] 1b85c63 - [X86] apply mulx optimization for two-wide mul instruction (mull, mulq) (#185127)   via llvm-commits
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• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
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• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] e865931 - [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (#183792)   via llvm-commits
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• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   Alexis Engelke via llvm-commits
• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   via llvm-commits
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• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
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• [llvm] [StructurizeCFG] Fix incorrect zero-cost hoisting in nested control flow (PR #183792)   LLVM Continuous Integration via llvm-commits
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• [llvm] c389129 - [RISCV] Add more extensions to spacemit-x100 (#186351)   via llvm-commits
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• [llvm] [AArch64][AsmParser] Add MC support for %dtprel() relocation (PR #186599)   Shivam Gupta via llvm-commits
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• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Robert Imschweiler via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Robert Imschweiler via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Robert Imschweiler via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Robert Imschweiler via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Robert Imschweiler via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Robert Imschweiler via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Robert Imschweiler via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Kavin Gnanapandithan via llvm-commits
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• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Alexis Engelke via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Alexis Engelke via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Alexis Engelke via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Alexis Engelke via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Alexis Engelke via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Alexis Engelke via llvm-commits
• [llvm] [AArch64][AsmParser] Add MC support for %dtprel() relocation (PR #186599)   Shivam Gupta via llvm-commits
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• [llvm] [NFC][NVPTX] Fix tcgen05.mma PTX instruction encoding (PR #186602)   Kirill Vedernikov via llvm-commits
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• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   Jay Foad via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Kavin Gnanapandithan via llvm-commits
• [llvm] [DAG] ComputeKnownBits - set low bit to zero for ADD(X, X) (PR #186461)   Xinlong Chen via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Jessica Clarke via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Jessica Clarke via llvm-commits
• [llvm] [DAG] ComputeKnownBits - set low bit to zero for ADD(X, X) (PR #186461)   Xinlong Chen via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Kavin Gnanapandithan via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Kavin Gnanapandithan via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Fix musttail with indirect arguments by forwarding incoming pointers (PR #185094)   Folkert de Vries via llvm-commits
• [llvm] [DAG] ComputeKnownBits - set low bit to zero for ADD(X, X) (PR #186461)   Xinlong Chen via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   Nikita Popov via llvm-commits
• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   Nikita Popov via llvm-commits
• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   Nikita Popov via llvm-commits
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• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Nikita Popov via llvm-commits
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• [llvm] c6811cd - [Transforms/Scalar][NFC] Drop uses of BranchInst (#186592)   via llvm-commits
• [llvm] [Transforms/Scalar][NFC] Drop uses of BranchInst (PR #186592)   Alexis Engelke via llvm-commits
• [llvm] 1b29ac1 - [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (#185305)   via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   Florian Hahn via llvm-commits
• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   Alexis Engelke via llvm-commits
• [llvm] [IR][NFC] Remove BranchInst successor functions (PR #186604)   Alexis Engelke via llvm-commits
• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   Alexis Engelke via llvm-commits
• [llvm] [IR][NFC] Remove BranchInst successor functions (PR #186604)   via llvm-commits
• [llvm] [LLVM] Add IRBuilder::CreateAggregateRet that accepts an ArrayRef (PR #186605)   Rahul Joshi via llvm-commits
• [llvm] [IR] Add Instruction::successors() (PR #186606)   Alexis Engelke via llvm-commits
• [llvm] [IR] Add Instruction::successors() (PR #186606)   via llvm-commits
• [llvm] [IR][NFC] Remove BranchInst successor functions (PR #186604)   Nikita Popov via llvm-commits
• [llvm] [AArch64][AsmParser] Add MC support for %dtprel() relocation (PR #186599)   Fangrui Song via llvm-commits
• [llvm] [AArch64][AsmParser] Add MC support for %dtprel() relocation (PR #186599)   Fangrui Song via llvm-commits
• [llvm] [IR][NFC] Remove BranchInst successor functions (PR #186604)   Alexis Engelke via llvm-commits
• [llvm] [LLVM] Add IRBuilder::CreateAggregateRet that accepts an ArrayRef (PR #186605)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Add IRBuilder::CreateAggregateRet that accepts an ArrayRef (PR #186605)   Rahul Joshi via llvm-commits
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• [llvm] [LLVM] Add IRBuilder::CreateAggregateRet that accepts an ArrayRef (PR #186605)   Rahul Joshi via llvm-commits
• [llvm] [LLVM] Change IRBuilder::CreateAggregateRet to accept an ArrayRef (PR #186605)   Rahul Joshi via llvm-commits
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• [llvm] [IPO][InstCombine][Vectorize][NFCI] Drop uses of BranchInst (PR #186596)   Alexis Engelke via llvm-commits
• [llvm] [LLVM] Change IRBuilder::CreateAggregateRet to accept an ArrayRef (PR #186605)   Rahul Joshi via llvm-commits
• [llvm] [LLVM] Change IRBuilder::CreateAggregateRet to accept an ArrayRef (PR #186605)   Rahul Joshi via llvm-commits
• [llvm] [AArch64][AsmParser] Add MC support for %dtprel() relocation (PR #186599)   Fangrui Song via llvm-commits
• [llvm] Remove unneeded cl::ZeroOrMore for cl::opt/cl::list options. NFC (PR #186044)   LLVM Continuous Integration via llvm-commits
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• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Brian Cain via llvm-commits
• [compiler-rt] Fix flaky test xray/basic-filtering.cpp (PR #186611)   Nikita Taranov via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Balázs Benics via llvm-commits
• [llvm] [PhaseOrdering][X86] Add average round tests based off #128424 (PR #186615)   Simon Pilgrim via llvm-commits
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• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
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• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
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• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Detect simple integer inductions in VPlan. (NFC) (PR #186608)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [clang][ssaf][NFC] Prefix ssaf-{linker,format} dirs with 'clang-' (PR #186610)   Aviral Goel via llvm-commits
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• [llvm] [X86] lowerV4F32Shuffle - prefer INSERTPS over SHUFPS when zeroing upper/lower v2f32 (PR #186612)   Simon Pilgrim via llvm-commits
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• [llvm] 09faf63 - [LLVM] Change IRBuilder::CreateAggregateRet to accept an ArrayRef (#186605)   via llvm-commits
• [llvm] [LLVM] Change IRBuilder::CreateAggregateRet to accept an ArrayRef (PR #186605)   Rahul Joshi via llvm-commits
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• [lld] [lld][Hexagon] Redirect undefined weak branches to guard section (PR #186613)   Fangrui Song via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] [LV] Move predication, early exit & region handling to VPlan0 (NFCI) (PR #185305)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][Hexagon] Redirect undefined weak branches to guard section (PR #186613)   Fangrui Song via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] e7a3ccf - [PhaseOrdering][X86] Add average round tests based off #128424 (#186615)   via llvm-commits
• [llvm] [PhaseOrdering][X86] Add average round tests based off #128424 (PR #186615)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] Improved ISD::SRL handling in isKnownToBeAPowerOfTwo (PR #182562)   LLVM Continuous Integration via llvm-commits
• [libcxx] [llvm] [libc++] Simplify the workflow for updating CI docker images (PR #186456)   Aiden Grossman via llvm-commits
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• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
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• [llvm] [lit] Add an option to lit which ratelimits progressbar output. (PR #186479)   Aiden Grossman via llvm-commits
• [llvm] [lit] Add an option to lit which ratelimits progressbar output. (PR #186479)   Aiden Grossman via llvm-commits
• [llvm] [lit] Add an option to lit which ratelimits progressbar output. (PR #186479)   Aiden Grossman via llvm-commits
• [llvm] Update GitHub Artifact Actions (major) (PR #184052)   Mend Renovate via llvm-commits
• [llvm] Update GitHub Artifact Actions (major) (PR #184052)   Mend Renovate via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] [IR] Implement successors as Use iterators (PR #186616)   Alexis Engelke via llvm-commits
• [llvm] [IR] Implement successors as Use iterators (PR #186616)   Aiden Grossman via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [compiler-rt] Fix flaky test xray/basic-filtering.cpp (PR #186611)   Aiden Grossman via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Aiden Grossman via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Aiden Grossman via llvm-commits
• [llvm] [SCEV] Convert more interfaces to use SCEVUse (NFC). (PR #185045)   Aiden Grossman via llvm-commits
• [llvm] [IR] Implement successors as Use iterators (PR #186616)   Alexis Engelke via llvm-commits
• [llvm] [IR] Implement successors as Use iterators (PR #186616)   Alexis Engelke via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [clang] [llvm] [clang][ssaf] Fix missing library dependency (PR #186496)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [AMDGPU] Split OPERAND_REG_IMM_INT64 into signed and unsigned variants (PR #186575)   via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [libclc] [llvm] [CI][libclc] Enable libclc in premerge CI with single target (PR #186104)   Aiden Grossman via llvm-commits
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• [libclc] [llvm] [CI][libclc] Enable libclc in premerge CI with single target (PR #186104)   Aiden Grossman via llvm-commits
• [llvm] [libclang/python][ci] Add release Clang Python Bindings CI workflow (PR #168234)   Aiden Grossman via llvm-commits
• [llvm] [libclang/python][ci] Add release Clang Python Bindings CI workflow (PR #168234)   Aiden Grossman via llvm-commits
• [libc] [llvm] [libc][math] Refactor log_bf16 to Header (PR #186618)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log_bf16 to Header (PR #186618)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log_bf16 to Header (PR #186618)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log_bf16 to Header (PR #186618)   via llvm-commits
• [llvm] [IR] Implement successors as Use iterators (PR #186616)   via llvm-commits
• [flang] [llvm] [flang][flang-rt] Implement F202X leading-zero control edit descriptors LZ, LZS, and LZP for formatted output (F, E, D, and G editing) (PR #183500)   Peter Klausler via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Craig Topper via llvm-commits
• [llvm] 3e3d2b6 - [VPlan] Add hasPredecessors and hasSuccessors to VPBlockBase (NFC).   Florian Hahn via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Craig Topper via llvm-commits
• [llvm] [X86] isSplatValueForTargetNode - test source value for vector uniform shift ops (PR #186619)   Simon Pilgrim via llvm-commits
• [llvm] [X86] isSplatValueForTargetNode - test source value for vector uniform shift ops (PR #186619)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor log_bf16 to Header (PR #186618)   via llvm-commits
• [llvm] 74af9c3 - [VPlan] Consolidate VPRegionBlock constructors (NFC).   Florian Hahn via llvm-commits
• [llvm] [IR] Implement successors as Use iterators (PR #186616)   Aiden Grossman via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Craig Topper via llvm-commits
• [libc] [llvm] [libc][math] Refactor log_bf16 to Header (PR #186618)   via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Craig Topper via llvm-commits
• [llvm] [InstCombine] Simplify multi use cast of Phi with constant inputs (PR #186621)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Simplify multi use cast of Phi with constant inputs (PR #186621)   via llvm-commits
• [llvm] [InstCombine] Simplify multi use cast of Phi with constant inputs (PR #186621)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Simplify multi use cast of Phi with constant inputs (PR #186621)   via llvm-commits
• [llvm] [InstCombine] Simplify multi use cast of Phi with constant inputs (PR #186621)   Andreas Jonson via llvm-commits
• [lld] [lld][Hexagon] Redirect undefined weak branches to guard section (PR #186613)   Brian Cain via llvm-commits
• [llvm] [InstCombine] Simplify multi use cast of Phi with constant inputs (PR #186621)   Andreas Jonson via llvm-commits
• [llvm] b85e7f0 - [X86] isSplatValueForTargetNode - test source value for vector uniform shift ops (#186619)   via llvm-commits
• [llvm] [X86] isSplatValueForTargetNode - test source value for vector uniform shift ops (PR #186619)   Simon Pilgrim via llvm-commits
• [llvm] 5cc4594 - [IR] Implement successors as Use iterators (#186616)   via llvm-commits
• [llvm] [IR] Implement successors as Use iterators (PR #186616)   Alexis Engelke via llvm-commits
• [compiler-rt] Fix flaky test xray/basic-filtering.cpp (PR #186611)   Nikita Taranov via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] d700dea - [VPlan] Remove special handling for canonical increment (NFC).   Florian Hahn via llvm-commits
• [llvm] [WebAssembly] combine `bitmask` with `setcc <X>, 0, setlt` (PR #179065)   Folkert de Vries via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [llvm] [MIR][MachineInstr] Update MachineInstr::eraseFromParent() to return an iterator (PR #179787)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [llvm] make div more assumption aware for better code (PR #185784)   Takashi Idobe via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [llvm] 9de31c4 - [VPlan] Create zero resume value for CanIV directly (NFC).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [SPIRV][Matrix] Add support for Array Vector memory layout (PR #186215)   Farzon Lotfi via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [SPIRV][Matrix] Add support for Array Vector memory layout (PR #186215)   Farzon Lotfi via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Brian Cain via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Make canonical IV part of the region (PR #156262)   Florian Hahn via llvm-commits
• [llvm] [TailCallElimination] Don't mark tail calls when callee uses llvm.returnaddress/llvm.frameaddress (PR #186365)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [llvm] [TailCallElimination] Don't mark tail calls when callee uses llvm.returnaddress/llvm.frameaddress (PR #186365)   Nikita Popov via llvm-commits
• [llvm] [DAG] Add Srl combine for extracting last element of BUILD_VECTOR (PR #181412)   via llvm-commits
• [libc] [llvm] [libc][math] Refactored atanpif16 to header only (PR #184316)   via llvm-commits
• [llvm] [Docs] typo settting to setting (PR #178665)   Benjamin Maxwell via llvm-commits
• [llvm] baf5209 - [Docs] typo settting -> setting (#178665)   via llvm-commits
• [llvm] [Docs] typo settting to setting (PR #178665)   Benjamin Maxwell via llvm-commits
• [llvm] [Docs] typo settting to setting (PR #178665)   via llvm-commits
• [lld] [lld][Hexagon] Fix out-of-range PLT branch thunks (PR #186545)   Brian Cain via llvm-commits
• [llvm] [AMDGPU] Fold v_perm pair into v_swap (PR #181966)   via llvm-commits
• [clang] [llvm] [LLVM][Support] Enforce proper instantiations of `Registry<T>` (PR #185141)   Tomohiro Kashiwada via llvm-commits
• [llvm] [Docs] typo settting to setting (PR #178665)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Sam Elliott via llvm-commits
• [llvm] [X86] Quote symbol names that collide with registers/keywords in Intel syntax (PR #186570)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] [BPF] Use ".L" local prefix label for basic blocks (PR #95103)   Fangrui Song via llvm-commits
• [llvm] [WebAssembly] Fold vselect(cond, vnot(x), zero) to v128.andnot (PR #184949)   Cedric BAIL via llvm-commits
• [llvm] Add zlib to Windows release build (PR #186630)   Oliver Old via llvm-commits
• [llvm] Add zlib to Windows release build (PR #186630)   via llvm-commits
• [llvm] [InstCombine] Recognize non-negative subtraction patterns (PR #182597)   via llvm-commits
• [llvm] Add Zstandard to Windows release build (PR #186631)   Oliver Old via llvm-commits
• [llvm] Add Zstandard to Windows release build (PR #186631)   via llvm-commits
• [llvm] [GCOV] Modify the path parsing of gcov instrument filter (PR #183475)   Fangrui Song via llvm-commits
• [llvm] [SystemZ][z/OS] Show instruction encoding in HLASM output (PR #181904)   Fangrui Song via llvm-commits
• [llvm] 69780be - [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (#185160)   via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   Craig Topper via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   LLVM Continuous Integration via llvm-commits
• [llvm] Add zlib to Windows release build (PR #186630)   via llvm-commits
• [llvm] [AggressiveInstCombine] Recognize table based log2 and replace with ctlz+sub. (PR #185160)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [llvm] [X86] fold mov dec/inc to lea +- 1 (PR #185194)   Takashi Idobe via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI on x86-32 (PR #186123)   via llvm-commits
• [llvm] [SelectionDAG] Preserver poison for abs INT_MIN lowering (PR #183851)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold waddau/wsubau to waddu/wsubu when possible (PR #186635)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold waddau/wsubau to waddu/wsubu when possible (PR #186635)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [llvm] [mlir] [NVPTX] Split Param address space into EntryParam and DeviceParam (NFC) (PR #186636)   Alex MacLean via llvm-commits
• [llvm] [mlir] [NVPTX] Split Param address space into EntryParam and DeviceParam (NFC) (PR #186636)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [llvm] [RISCV] Fold (WADDAU -C, -1, rs1, 0) -> (WSUBU rs1, C) where C > 0 (PR #186638)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (WADDAU -C, -1, rs1, 0) -> (WSUBU rs1, C) where C > 0 (PR #186638)   via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [llvm] [orc-rt] Rename "ResourceManager" to "Service". NFCI. (PR #186639)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Rename "ResourceManager" to "Service". NFCI. (PR #186639)   Lang Hames via llvm-commits
• [clang] [llvm] [clang-format]: Add `Custom` to `ShortFunctionStyle`; add new AllowShortFunctionsOnASingleLineOptions for granular setup (PR #134337)   via llvm-commits
• [llvm] [orc-rt] Return ref from Session::addService, add createService. (PR #186640)   Lang Hames via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Brad Smith via llvm-commits
• [llvm] [orc-rt] Return ref from Session::addService, add createService. (PR #186640)   Lang Hames via llvm-commits
• [clang] [llvm] [clang-format] Upgrade ShortFunctionStyle to a struct (PR #134337)   via llvm-commits
• [clang] [llvm] [X86] Support reserving EDI on x86-32 (PR #186123)   Phoebe Wang via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] PreserveAll attribute (PR #175145)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf128 to Header Only (PR #186641)   Manthan Singla via llvm-commits
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• [libc] [llvm] [libc][math] Refactor bf16divf128 to Header Only (PR #186641)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf128 to Header Only (PR #186641)   Manthan Singla via llvm-commits
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• [libc] [llvm] [libc][math] Refactor bf16divf128 to Header Only (PR #186641)   Manthan Singla via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf128 to Header Only (PR #186641)   Manthan Singla via llvm-commits
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• [llvm] [InstCombine] Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted (PR #165975)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Support peeling off matching shifts from icmp operands via canEvaluateShifted (PR #165975)   via llvm-commits
• [llvm] [CMake] Disable PCH reuse for plugins in non-PIC builds (PR #186643)   Alexis Engelke via llvm-commits
• [llvm] [CMake] Disable PCH reuse for plugins in non-PIC builds (PR #186643)   Alexis Engelke via llvm-commits
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• [llvm] bd933cc - [CMake] Disable PCH reuse for plugins in non-PIC builds (#186643)   via llvm-commits
• [llvm] [CMake] Disable PCH reuse for plugins in non-PIC builds (PR #186643)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't allow successors() over block without terminators (PR #186646)   Alexis Engelke via llvm-commits
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• [llvm] [IR] Don't allow successors() over block without terminators (PR #186646)   Alexis Engelke via llvm-commits
• [llvm] [CMake] Disable PCH reuse for plugins in non-PIC builds (PR #186643)   LLVM Continuous Integration via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   Alexis Engelke via llvm-commits
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• [llvm] [IR] Don't allow successors() over block without terminators (PR #186646)   Nikita Popov via llvm-commits
• [llvm] [CMake] Disable PCH reuse for plugins in non-PIC builds (PR #186643)   LLVM Continuous Integration via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   Nikita Popov via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   Nikita Popov via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   Nikita Popov via llvm-commits
• [clang] [llvm] [clang][ssaf] Fix missing library dependency (PR #186496)   LLVM Continuous Integration via llvm-commits
• [llvm] [IR] Don't allow successors() over block without terminators (PR #186646)   Alexis Engelke via llvm-commits
• [llvm] [IR] Don't allow successors() over block without terminators (PR #186646)   Nikita Popov via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (PR #186651)   Alexis Engelke via llvm-commits
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• [llvm] [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (PR #186651)   via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (PR #186651)   via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   Alexis Engelke via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   Alexis Engelke via llvm-commits
• [llvm] 92f9df1 - [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (#186648)   via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   Alexis Engelke via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (PR #186651)   Nikita Popov via llvm-commits
• [llvm] [ConstantFolding] Fix bitcasting vectors with non-integer ratios (PR #179640)   Kacper Doga via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf128 to Header Only (PR #186641)   Manthan Singla via llvm-commits
• [llvm] [Analysis][NFC] Move BranchProbabilityInfo constr to cpp (PR #186648)   LLVM Continuous Integration via llvm-commits
• [llvm] [polly] [IR] Don't allow successors() over block without terminators (PR #186646)   Alexis Engelke via llvm-commits
• [llvm] [polly] [IR] Don't allow successors() over block without terminators (PR #186646)   Alexis Engelke via llvm-commits
• [llvm] Add zlib to Windows release build (PR #186630)   Oliver Old via llvm-commits
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• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   Simon Pilgrim via llvm-commits
• [llvm] [polly] [IR] Don't allow successors() over block without terminators (PR #186646)   via llvm-commits
• [llvm] [polly] [IR] Don't allow successors() over block without terminators (PR #186646)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16divf128 to Header Only (PR #186641)   Manthan Singla via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
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• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
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• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [llvm] f8b2bc6 - [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (#186654)   via llvm-commits
• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   LLVM Continuous Integration via llvm-commits
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• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [llvm] [polly] [IR] Don't allow successors() over block without terminators (PR #186646)   Alexis Engelke via llvm-commits
• [libc] [llvm] [libc][math] Added missing floating point exception for atanpif16 (PR #186597)   via llvm-commits
• [llvm] [polly] [IR] Don't allow successors() over block without terminators (PR #186646)   Alexis Engelke via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [lit] Add an option to lit which ratelimits progressbar output. (PR #186479)   Nick Begg via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [Analysis][NFC] Use block numbers for BranchProbabilityInfo (PR #186658)   Alexis Engelke via llvm-commits
• [llvm] [Analysis][NFC] Use block numbers for BranchProbabilityInfo (PR #186658)   via llvm-commits
• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   LLVM Continuous Integration via llvm-commits
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• [llvm] Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (PR #186659)   via llvm-commits
• [llvm] Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (PR #186659)   via llvm-commits
• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   LLVM Continuous Integration via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [lit] Add an option to lit which ratelimits progressbar output. (PR #186479)   Nick Begg via llvm-commits
• [llvm] [X86] known-never-zero.ll - add vector test coverage for #186335 (PR #186660)   Simon Pilgrim via llvm-commits
• [llvm] [X86] known-never-zero.ll - add vector test coverage for #186335 (PR #186660)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] isKnownNeverZero - add ISD::VECTOR_SHUFFLE handling (PR #186335)   Simon Pilgrim via llvm-commits
• [llvm] Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (PR #186659)   via llvm-commits
• [llvm] Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (PR #186659)   via llvm-commits
• [llvm] Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (PR #186659)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] [MC] Early return on CPU help text invocation (PR #186663)   Tomer Shafir via llvm-commits
• [llvm] [Transforms/Utils][NFC] Replace SmallPtrSet with vector (PR #186664)   Alexis Engelke via llvm-commits
• [llvm] [Transforms/Utils][NFC] Replace SmallPtrSet with vector (PR #186664)   via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] ed6fc49 - [X86] known-never-zero.ll - add vector test coverage for #186335 (#186660)   via llvm-commits
• [llvm] [X86] known-never-zero.ll - add vector test coverage for #186335 (PR #186660)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][LV]: Differentiate between conditionally-executed masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [X86] known-never-zero.ll - add vector test coverage for #186335 (PR #186660)   LLVM Continuous Integration via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   via llvm-commits
• [llvm] [NFC][LV] Separate control-flow masking from tail-folding masking. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [LV] Simplify epilogue VF selection by comparing against MaxTripCount (PR #186185)   Hassnaa Hamdi via llvm-commits
• [llvm] [Transforms/Utils][NFC] Replace SmallPtrSet with vector (PR #186664)   Alexis Engelke via llvm-commits
• [llvm] [X86] Add missing VPSRAQ broadcast-from-mem patterns for non-VLX targets (PR #186654)   LLVM Continuous Integration via llvm-commits
• [llvm] Retry "[SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)" (PR #186659)   via llvm-commits
• [llvm] [MC] Early return on CPU help text invocation (PR #186663)   via llvm-commits
• [llvm] [MC] Early return on CPU help text invocation (PR #186663)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [NFC][LV] Separate control-flow masking from tail-folding masking. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [SimplifyCFG][NFC] Renumber blocks when changing func (PR #186666)   Alexis Engelke via llvm-commits
• [llvm] [SimplifyCFG][NFC] Renumber blocks when changing func (PR #186666)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [CFG][NFC] Use block numbers for FindFunctionBackedges (PR #186668)   Alexis Engelke via llvm-commits
• [llvm] [CFG][NFC] Use block numbers for FindFunctionBackedges (PR #186668)   via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [clang] [llvm] [ARM] Add support for Windows SEH (PR #184953)   Trung Nguyen via llvm-commits
• [llvm] [CFG][NFC] Use block numbers for FindFunctionBackedges (PR #186668)   Alexis Engelke via llvm-commits
• [llvm] [CFG][NFC] Use block numbers for FindFunctionBackedges (PR #186668)   Alexis Engelke via llvm-commits
• [llvm] [CFG][InstCombine][NFC] Use block numbers when finding backedges (PR #186668)   Alexis Engelke via llvm-commits
• [llvm] [NFC][LV] Separate control-flow masking from tail-folding masking. (PR #169509)   Florian Hahn via llvm-commits
• [llvm] [CFG][InstCombine][NFC] Use block numbers when finding backedges (PR #186668)   Alexis Engelke via llvm-commits
• [llvm] [LSV] Added check for mismatched GEP strides in getConstantOffsetComplexAddrs (PR #186671)   Weiwen He via llvm-commits
• [llvm] [LSV] Added check for mismatched GEP strides in getConstantOffsetComplexAddrs (PR #186671)   via llvm-commits
• [llvm] Add zlib to Windows release build (PR #186630)   Oliver Old via llvm-commits
• [llvm] Add zlib to Windows release build (PR #186630)   Oliver Old via llvm-commits
• [llvm] [NFC][NVPTX] Fix tcgen05.mma PTX instruction encoding (PR #186602)   Rajat Bajpai via llvm-commits
• [llvm] check test changes due to legalising dshuffles (PR #186673)   Gergo Stomfai via llvm-commits
• [llvm] [X86] check test changes due to legalising dshuffles (PR #186673)   Gergo Stomfai via llvm-commits
• [llvm] [X86] check test changes due to legalising dshuffles (PR #186673)   Gergo Stomfai via llvm-commits
• [llvm] [CodeGen] Add listener support to the rematerializer (NFC) (PR #184338)   Lucas Ramirez via llvm-commits
• [llvm] [DebugInfo] BTFParser use formatv instead of format (PR #186109)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] BTFParser use formatv instead of format (PR #186109)   Konrad Kleine via llvm-commits
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• [llvm] [VPlan][NFC] Extract addCurrentIterationPhi from addExplicitVectorLength (PR #182650)   Shih-Po Hung via llvm-commits
• [llvm] [X86] Optimize v4i16->v4i8 truncating stores via v4i32 widening (PR #186676)   Jaydeep Chauhan via llvm-commits
• [llvm] [X86] Optimize v4i16->v4i8 truncating stores via v4i32 widening (PR #186676)   via llvm-commits
• [llvm] [RISCV] Add guard to prevent GPRPair merge on targets without Zdinx or P (PR #186600)   Kavin Gnanapandithan via llvm-commits
• [llvm] [LV] Move dereferenceability check from Legal to VPlan (NFC) (PR #185323)   Shih-Po Hung via llvm-commits
• [llvm] [Transforms/Utils][NFC] Replace SmallPtrSet with vector (PR #186664)   Nikita Popov via llvm-commits
• [llvm] [X86] Optimize v4i16->v4i8 truncating stores via v4i32 widening (PR #186676)   Jaydeep Chauhan via llvm-commits
• [llvm] [SimplifyCFG][NFC] Renumber blocks when changing func (PR #186666)   Nikita Popov via llvm-commits
• [llvm] [CFG][InstCombine][NFC] Use block numbers when finding backedges (PR #186668)   Nikita Popov via llvm-commits
• [llvm] 926bea9 - [Transforms/Utils][NFC] Replace SmallPtrSet with vector (#186664)   via llvm-commits
• [llvm] [Transforms/Utils][NFC] Replace SmallPtrSet with vector (PR #186664)   Alexis Engelke via llvm-commits
• [llvm] dab1e30 - [SimplifyCFG][NFC] Renumber blocks when changing func (#186666)   via llvm-commits
• [llvm] [SimplifyCFG][NFC] Renumber blocks when changing func (PR #186666)   Alexis Engelke via llvm-commits
• [llvm] d2ffc11 - [CFG][InstCombine][NFC] Use block numbers when finding backedges (#186668)   via llvm-commits
• [llvm] [CFG][InstCombine][NFC] Use block numbers when finding backedges (PR #186668)   Alexis Engelke via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16fma to Header Only (PR #182572)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16fma to Header Only (PR #182572)   Muhammad Bassiouni via llvm-commits
• [llvm] [Transforms/Utils][NFC] Replace SmallPtrSet with vector (PR #186664)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat(vtruncs(x),vtruncs(y)) -> packss(shuffle(x,y),shuffle(x,y)) (PR #186678)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat(vtruncs(x),vtruncs(y)) -> packss(shuffle(x,y),shuffle(x,y)) (PR #186678)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16fma to Header Only (PR #182572)   Anirudh Mathur via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16fma to Header Only (PR #182572)   Anirudh Mathur via llvm-commits
• [llvm] [X86] check test changes due to legalising dshuffles (PR #186673)   Simon Pilgrim via llvm-commits
• [llvm] [X86] check test changes due to legalising dshuffles (PR #186673)   Simon Pilgrim via llvm-commits
• [llvm] [X86] check test changes due to legalising dshuffles (PR #186673)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor bf16fma to Header Only (PR #182572)   Anirudh Mathur via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (PR #186651)   Aiden Grossman via llvm-commits
• [llvm] [X86] Optimize v4i16->v4i8 truncating stores via v4i32 widening (PR #186676)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Optimize v4i16->v4i8 truncating stores via v4i32 widening (PR #186676)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Optimize v4i16->v4i8 truncating stores via v4i32 widening (PR #186676)   Simon Pilgrim via llvm-commits
• [clang] [lld] [llvm] [mlir] Revert "[CMake] Propagate dependencies to OBJECT libraries in add_llvm_library (re-land) (PR #186680)   via llvm-commits
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• [llvm] 211279d - [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (#186651)   via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Get BPI/BFI from pass/analysis manager (PR #186651)   Alexis Engelke via llvm-commits
• [llvm] 5ccfc9d - [X86] combineConcatVectorOps - concat(vtruncs(x),vtruncs(y)) -> packss(shuffle(x,y),shuffle(x,y)) (#186678)   via llvm-commits
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• [llvm] [X86] combineConcatVectorOps - concat(vtruncus(smax(x,0)),vtruncs(smax(y,0))) -> packus(shuffle(x,y),shuffle(x,y)) (PR #186681)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat(vtruncus(smax(x,0)),vtruncus(smax(y,0))) -> packus(shuffle(x,y),shuffle(x,y)) (PR #186681)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat(vtruncus(smax(x,0)),vtruncus(smax(y,0))) -> packus(shuffle(x,y),shuffle(x,y)) (PR #186681)   Simon Pilgrim via llvm-commits
• [llvm] [NFC] Annotate CommentFlag with underlying type (PR #186560)   Aiden Grossman via llvm-commits
• [llvm] [llvm][DebugInfo] BTFParser use formatv instead of format (PR #186109)   Konrad Kleine via llvm-commits
• [llvm] 41d5163 - [X86] combineConcatVectorOps - concat(vtruncus(smax(x,0)),vtruncus(smax(y,0))) -> packus(shuffle(x,y),shuffle(x,y)) (#186681)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat(vtruncus(smax(x,0)),vtruncus(smax(y,0))) -> packus(shuffle(x,y),shuffle(x,y)) (PR #186681)   Simon Pilgrim via llvm-commits
• [llvm] workflows/release-task: Add job for publishing to winget (PR #185988)   Aiden Grossman via llvm-commits
• [llvm] [BOLT] Add profile format documentation (PR #186685)   Amir Ayupov via llvm-commits
• [llvm] Update GitHub Artifact Actions (major) (PR #184052)   Aiden Grossman via llvm-commits
• [llvm] Update GitHub Artifact Actions (major) (PR #184052)   Aiden Grossman via llvm-commits
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• [llvm] [SLP]Improve reductions for copyables/split nodes (PR #185697)   Pengcheng Wang via llvm-commits
• [lld] [llvm] [lld][DebugInfo/BTF] Add BTF section merging and deduplication (PR #183915)   via llvm-commits
• [llvm] [llvm][Support] Fix an off-by-1 bug in YAML parser (PR #186731)   via llvm-commits
• [llvm] [llvm][Support] Fix an off-by-1 bug in YAML parser (PR #186731)   via llvm-commits
• [llvm] [llvm][Support] Fix an off-by-1 bug in YAML parser (PR #186731)   via llvm-commits
• [llvm] [BOLT] Add profile format documentation (PR #186685)   Amir Ayupov via llvm-commits
• [llvm] [llvm][Support] Fix an off-by-1 bug in YAML parser (PR #186731)   via llvm-commits
• [llvm] [LV] Replace remaining LogicalAnd to vp.merge in EVL optimization. (PR #184068)   Luke Lau via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [llvm] [LV] Optimize x && (x && y) -> x && y (PR #185806)   Luke Lau via llvm-commits
• [llvm] [AArch64][AsmParser] Add MC support for %dtprel() relocation (PR #186599)   Shivam Gupta via llvm-commits
• [llvm] [BOLT] Add profile format documentation (PR #186685)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Add profile format documentation (PR #186685)   via llvm-commits
• [llvm] Extend macOS version check to cover other Darwin platforms (PR #159155)   via llvm-commits
• [llvm] Extend macOS version check to cover other Darwin platforms (PR #159155)   via llvm-commits
• [llvm] [AMDGPU] Add basic verification for source modifiers in VOP3/VOP3P instructions (PR #186733)   Lleu Yang via llvm-commits
• [llvm] [AMDGPU] Add basic verification for source modifiers in VOP3/VOP3P instructions (PR #186733)   via llvm-commits
• [llvm] [AMDGPU] Add basic verification for source modifiers in VOP3/VOP3P instructions (PR #186733)   via llvm-commits
• [llvm] [VPlan][Predicator] Simplify block mask by using PostDomFrontier (PR #186478)   Luke Lau via llvm-commits
• [llvm] [VPlan][Predicator] Simplify block mask by using PostDomFrontier (PR #186478)   Luke Lau via llvm-commits
• [llvm] [VPlan][Predicator] Simplify block mask by using PostDomFrontier (PR #186478)   Luke Lau via llvm-commits
• [llvm] [VPlan][Predicator] Simplify block mask by using PostDomFrontier (PR #186478)   Luke Lau via llvm-commits
• [llvm] [VPlan][Predicator] Simplify block mask by using PostDomFrontier (PR #186478)   Luke Lau via llvm-commits
• [llvm] [VPlan][Predicator] Simplify block mask by using PostDomFrontier (PR #186478)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Add basic verification for source modifiers in VOP3/VOP3P instructions (PR #186733)   Lleu Yang via llvm-commits
• [llvm] [VPlan][Predicator] Simplify block mask by using PostDomFrontier (PR #186478)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [libc][Github] Bump libc-fullbuild-tests.yml to clang 23 (PR #186699)   via llvm-commits
• [llvm] [WebAssembly] Fix null Subtarget crash for addrspace(1) globals (PR #181536)   via llvm-commits
• [llvm] [WebAssembly] Lower wide vector shifts by constant to extmul pairs (PR #184007)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [PDB] Fix and simplify module index lookup (PR #179869)   Haohai Wen via llvm-commits
• [libclc] [llvm] [libclc][CMake] Use clang/llvm-ar on Windows (PR #186726)   Wenju He via llvm-commits
• [llvm] [VPlan] Compute blend masks from minimum set of edge masks (PR #184838)   Luke Lau via llvm-commits
• [libclc] [llvm] [libclc][CMake] Use clang/llvm-ar on Windows (PR #186726)   Wenju He via llvm-commits
• [libclc] [llvm] [libclc][CMake] Use clang/llvm-ar on Windows (PR #186726)   Wenju He via llvm-commits
• [llvm] [orc-rt] Add LockedAccess utility. (PR #186737)   Lang Hames via llvm-commits
• [llvm] [orc-rt] Add LockedAccess utility. (PR #186737)   Lang Hames via llvm-commits
• [clang] [llvm] [X86][APX] Combine MOVABS+JMP to JMPABS when in no-PIC large code model (PR #186402)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [clang] [llvm] [X86][APX] Combine MOVABS+JMP to JMPABS when in no-PIC large code model (PR #186402)   Phoebe Wang via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [AMDGPU] Add basic verification for source modifiers in VOP3/VOP3P instructions (PR #186733)   Lleu Yang via llvm-commits
• [llvm] [RISCV] SFB with Immediates to QC.MVccI (PR #186555)   via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [LegalizeTypes] Expand UDIV/UREM by constant via chunk summation (PR #146238)   Shivam Gupta via llvm-commits
• [llvm] [STLForwardCompat] Switch transformOptional from direct call to invoke (PR #186333)   Alexander Romanov via llvm-commits
• [libclc] [llvm] [libclc][CMake] Use clang/llvm-ar on Windows (PR #186726)   Wenju He via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] 7a89035 - [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (#185600)   via llvm-commits
• [llvm] [SelectionDAG] Add CTTZ_ELTS[_ZERO_POISON] nodes. NFCI (PR #185600)   Luke Lau via llvm-commits
• [llvm] [SLP]Allow bitcast/bswap based reductions for types, larger than the total strided size (PR #184018)   antoine moynault via llvm-commits
• [libclc] [llvm] [libclc][CMake] Pass FORCE_POSIX_TOOLCHAIN to ExternalProject (PR #186726)   Wenju He via llvm-commits
• [llvm] [orc-rt] Remove ORC_RT_SPS_INTERFACE. (PR #186740)   Lang Hames via llvm-commits
• [libclc] [llvm] [libclc][CMake] Pass FORCE_POSIX_TOOLCHAIN to ExternalProject (PR #186726)   Wenju He via llvm-commits