[llvm] [RISCV] Add codegen patterns to support short forward branches with immediates (PR #185643)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 12 22:04:53 PDT 2026
================
@@ -1716,15 +1740,17 @@ def : QCISELECTICCIPat<SETNE, QC_SELECTINEI>;
def : QCISELECTICCIPatInv<SETEQ, QC_SELECTINEI>;
def : QCISELECTICCIPatInv<SETNE, QC_SELECTIEQI>;
+def : QCISELECTIICCPat<SETEQ, QC_SELECTIIEQ>;
+def : QCISELECTIICCPat<SETNE, QC_SELECTIINE>;
+} // Predicates = [HasVendorXqcics, IsRV32]
+
+let Predicates = [HasVendorXqcics, NoShortForwardBranch, IsRV32] in {
----------------
hchandel wrote:
I thought I had to disable for all the short forward branch optimizations. That's why used `NoShortForwardBranch` as it was stronger condition than `NoShortForwardBranchImm` in my view. Changed it now
https://github.com/llvm/llvm-project/pull/185643
More information about the llvm-commits
mailing list