[llvm] [X86] LowerINTRINSIC_W_CHAIN - ensure the X86ISD::CMPCCXADD X86CondCode is a i8 target constant (PR #185856)
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 11 03:55:41 PDT 2026
https://github.com/RKSimon created https://github.com/llvm/llvm-project/pull/185856
Fixes verification failure in X86SelectionDAGInfo::verifyTargetNode (#185649)
>From ca029b1860445c1b283d5ee60b4527e91c52b3de Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: Wed, 11 Mar 2026 10:52:05 +0000
Subject: [PATCH] [X86] LowerINTRINSIC_W_CHAIN - ensure the X86ISD::CMPCCXADD
X86CondCode is a i8 target constant
Fixes verification failure in X86SelectionDAGInfo::verifyTargetNode (#185649)
---
llvm/lib/Target/X86/X86ISelLowering.cpp | 9 +++++----
llvm/lib/Target/X86/X86SelectionDAGInfo.cpp | 2 --
2 files changed, 5 insertions(+), 6 deletions(-)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 9d158ad919ebb..a8daacf42c7e4 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -28475,11 +28475,12 @@ static SDValue LowerINTRINSIC_W_CHAIN(SDValue Op, const X86Subtarget &Subtarget,
SDValue Addr = Op.getOperand(2);
SDValue Src1 = Op.getOperand(3);
SDValue Src2 = Op.getOperand(4);
- SDValue CC = Op.getOperand(5);
+ X86::CondCode X86CondCode = (X86::CondCode)Op.getConstantOperandVal(5);
+ SDValue CC = DAG.getTargetConstant(X86CondCode, DL, MVT::i8);
MachineMemOperand *MMO = cast<MemIntrinsicSDNode>(Op)->getMemOperand();
- SDValue Operation = DAG.getMemIntrinsicNode(
- X86ISD::CMPCCXADD, DL, Op->getVTList(), {Chain, Addr, Src1, Src2, CC},
- MVT::i32, MMO);
+ SDValue Operation =
+ DAG.getMemIntrinsicNode(X86ISD::CMPCCXADD, DL, Op->getVTList(),
+ {Chain, Addr, Src1, Src2, CC}, MVT::i32, MMO);
return Operation;
}
case Intrinsic::x86_aadd32:
diff --git a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
index 77f8a3f266e10..dff8832e851d9 100644
--- a/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
+++ b/llvm/lib/Target/X86/X86SelectionDAGInfo.cpp
@@ -86,8 +86,6 @@ void X86SelectionDAGInfo::verifyTargetNode(const SelectionDAG &DAG,
case X86ISD::INSERTQI:
case X86ISD::EXTRQI:
// result #0 must have type v2i64, but has type v16i8/v8i16
- case X86ISD::CMPCCXADD:
- // operand #4 must have type i8, but has type i32
return;
}
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