[llvm] [LLVM][CodeGen][SVE] Improve isel for split vector bfloat conversions. (PR #184357)

Sander de Smalen via llvm-commits llvm-commits at lists.llvm.org
Tue Mar 10 04:24:59 PDT 2026


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@@ -85,16 +85,13 @@ define <vscale x 4 x bfloat> @fadd_nxv4bf16(<vscale x 4 x bfloat> %a, <vscale x
 define <vscale x 8 x bfloat> @fadd_nxv8bf16(<vscale x 8 x bfloat> %a, <vscale x 8 x bfloat> %b) {
 ; NOB16B16-LABEL: fadd_nxv8bf16:
 ; NOB16B16:       // %bb.0:
-; NOB16B16-NEXT:    uunpkhi z2.s, z1.h
-; NOB16B16-NEXT:    uunpkhi z3.s, z0.h
-; NOB16B16-NEXT:    uunpklo z1.s, z1.h
-; NOB16B16-NEXT:    uunpklo z0.s, z0.h
+; NOB16B16-NEXT:    movi v2.2d, #0000000000000000
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sdesmalen-arm wrote:

Not required for this PR, but I think there's value in using a pseudo instruction for an all-zero value that we can lower to any instruction, whichever is most beneficial to the core being targeted. That avoids hard-coding specific instructions in the patterns.

https://github.com/llvm/llvm-project/pull/184357


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