[llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)

[Jonathan Thackray via llvm-commits]

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@@ -4264,12 +4264,25 @@ bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc,
     const AArch64TLBIP::TLBIP *TLBIP = AArch64TLBIP::lookupTLBIPByName(Op);
     if (!TLBIP)
       return TokError("invalid operand for TLBIP instruction");
-    if (!getSTI().hasFeature(AArch64::FeatureD128) &&
-        !getSTI().hasFeature(AArch64::FeatureAll))
-      return TokError("instruction requires: d128");
+
     if (!TLBIP->haveFeatures(getSTI().getFeatureBits())) {
+      FeatureBitset Active = getSTI().getFeatureBits();
+      FeatureBitset Missing = TLBIP->getRequiredFeatures() & ~Active;
+      bool NeedOrTLBID = false;
+
+      if (TLBIP->d128orTLBID) {
+        Missing &= ~AArch64TLBIP::TLBIP::D128OrTLBIDMask;
+        NeedOrTLBID =
+            !(Active[AArch64::FeatureD128] || Active[AArch64::FeatureTLBID]);
+      }
       std::string Str("instruction requires: ");
-      setRequiredFeatureString(TLBIP->getRequiredFeatures(), Str);
+      if (Missing.none()) {
+        Str += "tlbid or d128";
+        return TokError(Str);
+      }
+      setRequiredFeatureString(Missing, Str);
+      if (NeedOrTLBID)
+        Str += ", tlbid or d128";
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jthackray wrote:

Simplified, done.

https://github.com/llvm/llvm-project/pull/178913