[llvm] [AMDGPU][InstCombine] Fold unused m0 operand to poison for sendmsg intrinsics (PR #183755)

[Jay Foad via llvm-commits]

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@@ -2481,6 +2481,33 @@ uint64_t encodeMsg(uint64_t MsgId, uint64_t OpId, uint64_t StreamId) {
   return MsgId | (OpId << OP_SHIFT_) | (StreamId << STREAM_ID_SHIFT_);
 }
 
+bool msgDoesNotUseM0(int64_t MsgId, const MCSubtargetInfo &STI) {
+  // Explicitly list message types that are known to not use m0.
+  // This is safer than excluding only GS_ALLOC_REQ, in case new message
+  // types are added in the future that do use m0.
+  switch (MsgId) {
+  case ID_HS_TESSFACTOR_GFX11Plus:
+    // ID_GS_PreGFX11 has the same value as ID_HS_TESSFACTOR_GFX11Plus.
+    // GS uses m0, but HS_TESSFACTOR does not.
----------------
jayfoad wrote:

Instead of adding comments explaining which enumerators have the same value, it would be better to restructure the code as:
```
  if (isGFX11Plus(STI)) {
    switch (MsgId) {
    // put all the "case *_GFX11Plus:" cases here
    }
  }
```

https://github.com/llvm/llvm-project/pull/183755