[llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)
Florian Mayer via llvm-commits
llvm-commits at lists.llvm.org
Fri Mar 13 13:59:13 PDT 2026
================
@@ -0,0 +1,94 @@
+# RUN: llc -mtriple=aarch64 -mattr=+mte -run-pass=prologepilog %s -o - | FileCheck %s
+
+# CHECK-LABEL: name: test_mte_crash_no_csr
+# CHECK: STGloop_wback
+# CHECK-LABEL: name: test_mte_crash_one_csr
+# CHECK: STGloop_wback
+
+
+--- |
+ define void @test_mte_crash_no_csr() {
+ entry:
+ ret void
+ }
+
+ define void @test_mte_crash_one_csr() {
+ entry:
+ ret void
+ }
+...
+---
+name: test_mte_crash_no_csr
+tracksRegLiveness: true
+calleeSavedRegisters: [ '$fp', '$lr', '$x19', '$x20', '$x21', '$x22', '$x23', '$x24', '$x25', '$x26', '$x27', '$x28' ]
+stack:
+ - { id: 0, size: 8192, alignment: 16 }
+ - { id: 1, size: 32, alignment: 16 }
+ - { id: 2, size: 32, alignment: 16 }
+ - { id: 3, size: 32, alignment: 16 }
+ - { id: 4, size: 32, alignment: 16 }
+ - { id: 5, size: 32, alignment: 16 }
+ - { id: 6, size: 32, alignment: 16 }
+ - { id: 7, size: 32, alignment: 16 }
+ - { id: 8, size: 32, alignment: 16 }
+ - { id: 9, size: 32, alignment: 16 }
+ - { id: 10, size: 32, alignment: 16 }
+body: |
+ bb.0.entry:
+ liveins: $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp, $lr
+ ; STG loop trigger
+ ST2Gi $sp, %stack.1, 0 :: (store (s256))
+ ST2Gi $sp, %stack.2, 0 :: (store (s256))
+ ST2Gi $sp, %stack.3, 0 :: (store (s256))
+ ST2Gi $sp, %stack.4, 0 :: (store (s256))
+ ST2Gi $sp, %stack.5, 0 :: (store (s256))
+ ST2Gi $sp, %stack.6, 0 :: (store (s256))
+ ST2Gi $sp, %stack.7, 0 :: (store (s256))
+ ST2Gi $sp, %stack.8, 0 :: (store (s256))
+ ST2Gi $sp, %stack.9, 0 :: (store (s256))
+ ST2Gi $sp, %stack.10, 0 :: (store (s256))
+
+ ; Explicitly use all of them as operands to a pseudo-instruction.
+ ; KILL is strictly a no-op but tells the liveness analyzer they are needed here.
+ KILL implicit $x0, implicit $x1, implicit $x2, implicit $x3, implicit $x4, implicit $x5, implicit $x6, implicit $x7, implicit $x8, implicit $x9, implicit $x10, implicit $x11, implicit $x12, implicit $x13, implicit $x14, implicit $x15, implicit $x16, implicit $x17, implicit $x18, implicit $x19, implicit $x20, implicit $x21, implicit $x22, implicit $x23, implicit $x24, implicit $x25, implicit $x26, implicit $x27, implicit $x28, implicit $fp, implicit $lr
----------------
fmayer wrote:
why do we use KILL here but below we pass the regs to `RET_ReallyLR`?
https://github.com/llvm/llvm-project/pull/186505
More information about the llvm-commits
mailing list