[llvm] [AMDGPU] Shrink S_MOV_B64 to S_MOV_B32 during rematerialization (PR #184333)

[Matt Arsenault via llvm-commits]

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@@ -182,12 +182,15 @@ class LiveRangeEdit : private MachineRegisterInfo::Delegate {
   /// instruction into MBB before MI. The new instruction is mapped, but
   /// liveness is not updated. If ReplaceIndexMI is not null it will be replaced
   /// by new MI in the index map.
+  /// \p UsedLanes is a bitmask of the lanes that are live at the
+  /// rematerialization point, forwarded to TII.reMaterialize.
   /// Return the SlotIndex of the new instruction.
   SlotIndex rematerializeAt(MachineBasicBlock &MBB,
                             MachineBasicBlock::iterator MI, Register DestReg,
                             const Remat &RM, const TargetRegisterInfo &,
                             bool Late = false, unsigned SubIdx = 0,
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arsenm wrote:

Is SubIdx ever used? 

https://github.com/llvm/llvm-project/pull/184333