[llvm] [AArch64][GlobalISel] Add G_SQDMULL node (PR #185842)

[Hari Limaye via llvm-commits]

hazzlim wrote:

> The code generation for GI is looking a lot less optimal than SD here. I'm guessing that has something to do with the fact that we're performing the vector version of this intrinsic, instead of the element version (so for some reason we're moving our second operand to a different register?). How would we fix this?

I think that the issue here is that GISel does not have combines to match SQDMULL + ADD -> SQDMLAL (and the subtraction equivalent), and similarly for the generation of the lane-indexed variant of SQDMULL. (Although the lane-indexed part might be covered by https://github.com/llvm/llvm-project/pull/185836 ?)

https://github.com/llvm/llvm-project/pull/185842