[llvm] [NewPM] Port AArch64CollectLOHPass (PR #185789)
Anshul Nigham via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 10 22:50:17 PDT 2026
https://github.com/nigham updated https://github.com/llvm/llvm-project/pull/185789
>From 45be3e81b6312f3644389aea14718a54576d8175 Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Tue, 10 Mar 2026 19:06:36 -0700
Subject: [PATCH 1/3] [NewPM] Port AArch64CollectLOHPass
---
llvm/lib/Target/AArch64/AArch64.h | 8 +++-
llvm/lib/Target/AArch64/AArch64CollectLOH.cpp | 41 ++++++++++++++-----
.../Target/AArch64/AArch64PassRegistry.def | 1 +
.../Target/AArch64/AArch64TargetMachine.cpp | 2 +-
4 files changed, 39 insertions(+), 13 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h
index ca9a78114158e..aa8ba0600fed5 100644
--- a/llvm/lib/Target/AArch64/AArch64.h
+++ b/llvm/lib/Target/AArch64/AArch64.h
@@ -87,7 +87,7 @@ void initializeAArch64AsmPrinterPass(PassRegistry &);
void initializeAArch64PointerAuthPass(PassRegistry&);
void initializeAArch64BranchTargetsLegacyPass(PassRegistry &);
void initializeAArch64CFIFixupPass(PassRegistry&);
-void initializeAArch64CollectLOHPass(PassRegistry &);
+void initializeAArch64CollectLOHLegacyPass(PassRegistry &);
void initializeAArch64CompressJumpTablesPass(PassRegistry&);
void initializeAArch64CondBrTuningPass(PassRegistry &);
void initializeAArch64ConditionOptimizerPass(PassRegistry&);
@@ -149,6 +149,12 @@ class AArch64AdvSIMDScalarPass
MachineFunctionAnalysisManager &MFAM);
};
+class AArch64CollectLOHPass : public PassInfoMixin<AArch64CollectLOHPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
} // end namespace llvm
#endif
diff --git a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
index 069147a1b669b..fe77e3e49013d 100644
--- a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
@@ -84,7 +84,8 @@
// This LOH aims at getting rid of redundant ADRP instructions.
//
// The overall design for emitting the LOHs is:
-// 1. AArch64CollectLOH (this pass) records the LOHs in the AArch64FunctionInfo.
+// 1. AArch64CollectLOHLegacy (this pass) records the LOHs in the
+// AArch64FunctionInfo.
// 2. AArch64AsmPrinter reads the LOHs from AArch64FunctionInfo and it:
// 1. Associates them a label.
// 2. Emits them in a MCStreamer (EmitLOHDirective).
@@ -125,11 +126,21 @@ STATISTIC(NumADRSimpleCandidate, "Number of simplifiable ADRP + ADD");
namespace {
-struct AArch64CollectLOH : public MachineFunctionPass {
+struct AArch64CollectLOHImpl {
+ bool run(MachineFunction &MF);
+};
+
+struct AArch64CollectLOHLegacy : public MachineFunctionPass {
static char ID;
- AArch64CollectLOH() : MachineFunctionPass(ID) {}
+ AArch64CollectLOHLegacy() : MachineFunctionPass(ID) {
+ initializeAArch64CollectLOHLegacyPass(*PassRegistry::getPassRegistry());
+ }
- bool runOnMachineFunction(MachineFunction &MF) override;
+ bool runOnMachineFunction(MachineFunction &MF) override {
+ if (skipFunction(MF.getFunction()))
+ return false;
+ return AArch64CollectLOHImpl().run(MF);
+ }
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().setNoVRegs();
@@ -143,11 +154,11 @@ struct AArch64CollectLOH : public MachineFunctionPass {
}
};
-char AArch64CollectLOH::ID = 0;
+char AArch64CollectLOHLegacy::ID = 0;
} // end anonymous namespace.
-INITIALIZE_PASS(AArch64CollectLOH, "aarch64-collect-loh",
+INITIALIZE_PASS(AArch64CollectLOHLegacy, "aarch64-collect-loh",
AARCH64_COLLECT_LOH_NAME, false, false)
static bool canAddBePartOfLOH(const MachineInstr &MI) {
@@ -536,10 +547,7 @@ static void handleNormalInst(const MachineInstr &MI, LOHInfo *LOHInfos) {
}
}
-bool AArch64CollectLOH::runOnMachineFunction(MachineFunction &MF) {
- if (skipFunction(MF.getFunction()))
- return false;
-
+bool AArch64CollectLOHImpl::run(MachineFunction &MF) {
LLVM_DEBUG(dbgs() << "********** AArch64 Collect LOH **********\n"
<< "Looking in function " << MF.getName() << '\n');
@@ -595,6 +603,17 @@ bool AArch64CollectLOH::runOnMachineFunction(MachineFunction &MF) {
return false;
}
+PreservedAnalyses
+AArch64CollectLOHPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ bool Changed = AArch64CollectLOHImpl().run(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserveSet<CFGAnalyses>();
+ return PA;
+}
+
FunctionPass *llvm::createAArch64CollectLOHPass() {
- return new AArch64CollectLOH();
+ return new AArch64CollectLOHLegacy();
}
diff --git a/llvm/lib/Target/AArch64/AArch64PassRegistry.def b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
index 47e6130d6891b..de1f08025edbc 100644
--- a/llvm/lib/Target/AArch64/AArch64PassRegistry.def
+++ b/llvm/lib/Target/AArch64/AArch64PassRegistry.def
@@ -27,6 +27,7 @@
#define MACHINE_FUNCTION_PASS(NAME, CREATE_PASS)
#endif
MACHINE_FUNCTION_PASS("aarch64-branch-targets", AArch64BranchTargetsPass())
+MACHINE_FUNCTION_PASS("aarch64-collect-loh", AArch64CollectLOHPass())
MACHINE_FUNCTION_PASS("aarch64-fix-cortex-a53-835769", AArch64A53Fix835769Pass())
MACHINE_FUNCTION_PASS("aarch64-ldst-opt", AArch64LoadStoreOptPass())
MACHINE_FUNCTION_PASS("aarch64-simd-scalar", AArch64AdvSIMDScalarPass())
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
index 45d01c7d3ae93..4c2caab8c8cd3 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
@@ -248,7 +248,7 @@ LLVMInitializeAArch64Target() {
initializeAArch64AdvSIMDScalarLegacyPass(PR);
initializeAArch64AsmPrinterPass(PR);
initializeAArch64BranchTargetsLegacyPass(PR);
- initializeAArch64CollectLOHPass(PR);
+ initializeAArch64CollectLOHLegacyPass(PR);
initializeAArch64CompressJumpTablesPass(PR);
initializeAArch64ConditionalComparesPass(PR);
initializeAArch64ConditionOptimizerPass(PR);
>From 8063be304b1d0c6080bf1a146acef2cbc6323acb Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Tue, 10 Mar 2026 21:48:16 -0700
Subject: [PATCH 2/3] Fixes
---
llvm/lib/Target/AArch64/AArch64CollectLOH.cpp | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
index fe77e3e49013d..7b662e7aff19c 100644
--- a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
@@ -84,7 +84,7 @@
// This LOH aims at getting rid of redundant ADRP instructions.
//
// The overall design for emitting the LOHs is:
-// 1. AArch64CollectLOHLegacy (this pass) records the LOHs in the
+// 1. AArch64CollectLOH (this pass) records the LOHs in the
// AArch64FunctionInfo.
// 2. AArch64AsmPrinter reads the LOHs from AArch64FunctionInfo and it:
// 1. Associates them a label.
@@ -132,9 +132,7 @@ struct AArch64CollectLOHImpl {
struct AArch64CollectLOHLegacy : public MachineFunctionPass {
static char ID;
- AArch64CollectLOHLegacy() : MachineFunctionPass(ID) {
- initializeAArch64CollectLOHLegacyPass(*PassRegistry::getPassRegistry());
- }
+ AArch64CollectLOHLegacy() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override {
if (skipFunction(MF.getFunction()))
>From b72dcc47d4199da269349195d4f796c49ee96bfb Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Tue, 10 Mar 2026 22:49:59 -0700
Subject: [PATCH 3/3] Simplify return/change handling.
---
llvm/lib/Target/AArch64/AArch64CollectLOH.cpp | 22 +++++++++----------
1 file changed, 10 insertions(+), 12 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
index 7b662e7aff19c..4000e8e5b3e33 100644
--- a/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
+++ b/llvm/lib/Target/AArch64/AArch64CollectLOH.cpp
@@ -127,7 +127,7 @@ STATISTIC(NumADRSimpleCandidate, "Number of simplifiable ADRP + ADD");
namespace {
struct AArch64CollectLOHImpl {
- bool run(MachineFunction &MF);
+ void run(MachineFunction &MF);
};
struct AArch64CollectLOHLegacy : public MachineFunctionPass {
@@ -137,7 +137,10 @@ struct AArch64CollectLOHLegacy : public MachineFunctionPass {
bool runOnMachineFunction(MachineFunction &MF) override {
if (skipFunction(MF.getFunction()))
return false;
- return AArch64CollectLOHImpl().run(MF);
+ AArch64CollectLOHImpl().run(MF);
+
+ // Return "no change": The pass only collects information.
+ return false;
}
MachineFunctionProperties getRequiredProperties() const override {
@@ -545,7 +548,7 @@ static void handleNormalInst(const MachineInstr &MI, LOHInfo *LOHInfos) {
}
}
-bool AArch64CollectLOHImpl::run(MachineFunction &MF) {
+void AArch64CollectLOHImpl::run(MachineFunction &MF) {
LLVM_DEBUG(dbgs() << "********** AArch64 Collect LOH **********\n"
<< "Looking in function " << MF.getName() << '\n');
@@ -596,20 +599,15 @@ bool AArch64CollectLOHImpl::run(MachineFunction &MF) {
handleNormalInst(MI, LOHInfos);
}
}
-
- // Return "no change": The pass only collects information.
- return false;
}
PreservedAnalyses
AArch64CollectLOHPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
- bool Changed = AArch64CollectLOHImpl().run(MF);
- if (!Changed)
- return PreservedAnalyses::all();
- PreservedAnalyses PA = getMachineFunctionPassPreservedAnalyses();
- PA.preserveSet<CFGAnalyses>();
- return PA;
+ AArch64CollectLOHImpl().run(MF);
+
+ // This pass only collects information.
+ return PreservedAnalyses::all();
}
FunctionPass *llvm::createAArch64CollectLOHPass() {
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