[llvm] [PowerPC] Use lxvp/stxvp for mcpu=future v256i1 types (PR #184447)

[Lei Huang via llvm-commits]

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@@ -292,6 +288,14 @@ def FeatureP10Vector  : SubtargetFeature<"power10-vector", "HasP10Vector",
                                          "true",
                                          "Enable POWER10 vector instructions",
                                          [FeatureISA3_1, FeatureP9Vector]>;
+def FeatureFutureVector : SubtargetFeature<"future-vector", "HasFutureVector",
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lei137 wrote:

To be inline with how these checks were done previously. Since we don't necessarily have a different ISA for each mcpu.  ex p10 and p11 both refer to ISA3.1.

https://github.com/llvm/llvm-project/pull/184447