[llvm] [PowerPC] Use lxvp/stxvp for v256i1 types (PR #184447)

[Lei Huang via llvm-commits]

================
@@ -292,6 +288,14 @@ def FeatureP10Vector  : SubtargetFeature<"power10-vector", "HasP10Vector",
                                          "true",
                                          "Enable POWER10 vector instructions",
                                          [FeatureISA3_1, FeatureP9Vector]>;
+def FeatureFutureVector : SubtargetFeature<"future-vector", "HasFutureVector",
----------------
lei137 wrote:

Nice catch! This was suppose to replace the existing [HasVSX, IsISAFuture] predicate checks in the td file to be inline with how it's done previously for P8/P9/P10 vsx support.

https://github.com/llvm/llvm-project/pull/184447