[llvm] [CodeGen] Make ShouldPreferAnother const. NFC. (PR #185606)
Jay Foad via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 10 04:15:30 PDT 2026
https://github.com/jayfoad updated https://github.com/llvm/llvm-project/pull/185606
>From ec5ba892a8d5bc4b8e2147fd2ffd594b3603e449 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Mon, 9 Mar 2026 19:26:51 +0000
Subject: [PATCH 1/2] [CodeGen] Make ShouldPreferAnother const. NFC.
---
llvm/include/llvm/CodeGen/MultiHazardRecognizer.h | 2 +-
llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h | 2 +-
llvm/lib/CodeGen/MultiHazardRecognizer.cpp | 4 ++--
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 2 +-
llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h | 2 +-
llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp | 2 +-
llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h | 2 +-
llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp | 4 ++--
llvm/lib/Target/PowerPC/PPCHazardRecognizers.h | 4 ++--
9 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MultiHazardRecognizer.h b/llvm/include/llvm/CodeGen/MultiHazardRecognizer.h
index 9846045ff014b..c17cb9640cbb1 100644
--- a/llvm/include/llvm/CodeGen/MultiHazardRecognizer.h
+++ b/llvm/include/llvm/CodeGen/MultiHazardRecognizer.h
@@ -36,7 +36,7 @@ class MultiHazardRecognizer : public ScheduleHazardRecognizer {
void EmitInstruction(MachineInstr *) override;
unsigned PreEmitNoops(SUnit *) override;
unsigned PreEmitNoops(MachineInstr *) override;
- bool ShouldPreferAnother(SUnit *) override;
+ bool ShouldPreferAnother(SUnit *) const override;
void AdvanceCycle() override;
void RecedeCycle() override;
void EmitNoop() override;
diff --git a/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h b/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h
index 9f1101b658d04..4a7ccca58cbc5 100644
--- a/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h
+++ b/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h
@@ -92,7 +92,7 @@ class ScheduleHazardRecognizer {
/// ShouldPreferAnother - This callback may be invoked if getHazardType
/// returns NoHazard. If, even though there is no hazard, it would be better to
/// schedule another available instruction, this callback should return true.
- virtual bool ShouldPreferAnother(SUnit *) {
+ virtual bool ShouldPreferAnother(SUnit *) const {
return false;
}
diff --git a/llvm/lib/CodeGen/MultiHazardRecognizer.cpp b/llvm/lib/CodeGen/MultiHazardRecognizer.cpp
index e4cd92ac4868e..5aa943e5ad40b 100644
--- a/llvm/lib/CodeGen/MultiHazardRecognizer.cpp
+++ b/llvm/lib/CodeGen/MultiHazardRecognizer.cpp
@@ -69,8 +69,8 @@ unsigned MultiHazardRecognizer::PreEmitNoops(MachineInstr *MI) {
return std::accumulate(Recognizers.begin(), Recognizers.end(), 0u, MN);
}
-bool MultiHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
- auto SPA = [=](std::unique_ptr<ScheduleHazardRecognizer> &R) {
+bool MultiHazardRecognizer::ShouldPreferAnother(SUnit *SU) const {
+ auto SPA = [=](const std::unique_ptr<ScheduleHazardRecognizer> &R) {
return R->ShouldPreferAnother(SU);
};
return llvm::any_of(Recognizers, SPA);
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
index b2b63c484c94c..682ad74ea8af0 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -3334,7 +3334,7 @@ int GCNHazardRecognizer::checkMAIVALUHazards(MachineInstr *MI) const {
return WaitStatesNeeded;
}
-bool GCNHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
+bool GCNHazardRecognizer::ShouldPreferAnother(SUnit *SU) const {
if (!SU->isInstr())
return false;
diff --git a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
index efe44a64195bb..9f0468831f65e 100644
--- a/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
+++ b/llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
@@ -176,7 +176,7 @@ class GCNHazardRecognizer final : public ScheduleHazardRecognizer {
unsigned PreEmitNoopsCommon(MachineInstr *) const;
void AdvanceCycle() override;
void RecedeCycle() override;
- bool ShouldPreferAnother(SUnit *SU) override;
+ bool ShouldPreferAnother(SUnit *SU) const override;
void Reset() override;
};
diff --git a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
index 577eccd25c19f..ab3aecec46a1f 100644
--- a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.cpp
@@ -92,7 +92,7 @@ void HexagonHazardRecognizer::AdvanceCycle() {
/// store doesn't have resources to fit in the packet (but the .new store may
/// have resources). We attempt to schedule the store as soon as possible to
/// help packetize the two instructions together.
-bool HexagonHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
+bool HexagonHazardRecognizer::ShouldPreferAnother(SUnit *SU) const {
if (PrefVectorStoreNew != nullptr && PrefVectorStoreNew != SU)
return true;
if (UsesLoad && SU->isInstr() && SU->getInstr()->mayLoad())
diff --git a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
index 683feb11c1422..4f8931a49f387 100644
--- a/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
+++ b/llvm/lib/Target/Hexagon/HexagonHazardRecognizer.h
@@ -70,7 +70,7 @@ class HexagonHazardRecognizer : public ScheduleHazardRecognizer {
/// This callback may be invoked if getHazardType returns NoHazard. If, even
/// though there is no hazard, it would be better to schedule another
/// available instruction, this callback should return true.
- bool ShouldPreferAnother(SUnit *) override;
+ bool ShouldPreferAnother(SUnit *) const override;
/// This callback is invoked whenever the next top-down instruction to be
/// scheduled cannot issue in the current cycle, either because of latency
diff --git a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
index 41f066b49cfd5..e4706b768b1ed 100644
--- a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
+++ b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.cpp
@@ -87,7 +87,7 @@ extern int32_t getNonRecordFormOpcode(uint32_t);
// FIXME: A lot of code in PPCDispatchGroupSBHazardRecognizer is P7 specific.
bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID,
- unsigned &NSlots) {
+ unsigned &NSlots) const {
// FIXME: Indirectly, this information is contained in the itinerary, and
// we should derive it from there instead of separately specifying it
// here.
@@ -147,7 +147,7 @@ PPCDispatchGroupSBHazardRecognizer::getHazardType(SUnit *SU, int Stalls) {
return ScoreboardHazardRecognizer::getHazardType(SU, Stalls);
}
-bool PPCDispatchGroupSBHazardRecognizer::ShouldPreferAnother(SUnit *SU) {
+bool PPCDispatchGroupSBHazardRecognizer::ShouldPreferAnother(SUnit *SU) const {
const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
unsigned NSlots;
if (MCID && mustComeFirst(MCID, NSlots) && CurSlots)
diff --git a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h
index 5b32147ca88d3..1a2f9221a91d8 100644
--- a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h
+++ b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h
@@ -29,7 +29,7 @@ class PPCDispatchGroupSBHazardRecognizer : public ScoreboardHazardRecognizer {
bool isLoadAfterStore(SUnit *SU);
bool isBCTRAfterSet(SUnit *SU);
- bool mustComeFirst(const MCInstrDesc *MCID, unsigned &NSlots);
+ bool mustComeFirst(const MCInstrDesc *MCID, unsigned &NSlots) const;
public:
PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData,
const ScheduleDAG *DAG_) :
@@ -37,7 +37,7 @@ class PPCDispatchGroupSBHazardRecognizer : public ScoreboardHazardRecognizer {
CurSlots(0), CurBranches(0) {}
HazardType getHazardType(SUnit *SU, int Stalls) override;
- bool ShouldPreferAnother(SUnit* SU) override;
+ bool ShouldPreferAnother(SUnit* SU) const override;
unsigned PreEmitNoops(SUnit *SU) override;
void EmitInstruction(SUnit *SU) override;
void AdvanceCycle() override;
>From 1fcb11507e6d8583e6e73968e267bde7ed51c834 Mon Sep 17 00:00:00 2001
From: Jay Foad <jay.foad at amd.com>
Date: Tue, 10 Mar 2026 11:15:16 +0000
Subject: [PATCH 2/2] clang-format
---
llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h | 4 +---
llvm/lib/Target/PowerPC/PPCHazardRecognizers.h | 3 ++-
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h b/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h
index 4a7ccca58cbc5..edf3a2a8aa995 100644
--- a/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h
+++ b/llvm/include/llvm/CodeGen/ScheduleHazardRecognizer.h
@@ -92,9 +92,7 @@ class ScheduleHazardRecognizer {
/// ShouldPreferAnother - This callback may be invoked if getHazardType
/// returns NoHazard. If, even though there is no hazard, it would be better to
/// schedule another available instruction, this callback should return true.
- virtual bool ShouldPreferAnother(SUnit *) const {
- return false;
- }
+ virtual bool ShouldPreferAnother(SUnit *) const { return false; }
/// AdvanceCycle - This callback is invoked whenever the next top-down
/// instruction to be scheduled cannot issue in the current cycle, either
diff --git a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h
index 1a2f9221a91d8..2db61b1bd90e6 100644
--- a/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h
+++ b/llvm/lib/Target/PowerPC/PPCHazardRecognizers.h
@@ -30,6 +30,7 @@ class PPCDispatchGroupSBHazardRecognizer : public ScoreboardHazardRecognizer {
bool isLoadAfterStore(SUnit *SU);
bool isBCTRAfterSet(SUnit *SU);
bool mustComeFirst(const MCInstrDesc *MCID, unsigned &NSlots) const;
+
public:
PPCDispatchGroupSBHazardRecognizer(const InstrItineraryData *ItinData,
const ScheduleDAG *DAG_) :
@@ -37,7 +38,7 @@ class PPCDispatchGroupSBHazardRecognizer : public ScoreboardHazardRecognizer {
CurSlots(0), CurBranches(0) {}
HazardType getHazardType(SUnit *SU, int Stalls) override;
- bool ShouldPreferAnother(SUnit* SU) const override;
+ bool ShouldPreferAnother(SUnit *SU) const override;
unsigned PreEmitNoops(SUnit *SU) override;
void EmitInstruction(SUnit *SU) override;
void AdvanceCycle() override;
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