[llvm] [BOLT][AArch64] Support block reordering beyond 1KB for FEAT_CMPBR. (PR #185443)

[Alexandros Lamprineas via llvm-commits]

https://github.com/labrinea created https://github.com/llvm/llvm-project/pull/185443

Currently LongJmpPass::relaxLocalBranches bails early if the estimated size of a binary function is less than 32KB assuming that the shortest branches are 16 bits. Therefore the fixup value for the cold branch target may go out of range if the function is larger than 1KB.

I am decreasing ShortestJumpSpan from 32KB to 1KB, since FEAT_CMPBR branches are 11 bits.

>From 14b86ce73d64d4ea1c5d1f89fc3f82fcb74a1e3c Mon Sep 17 00:00:00 2001
From: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: Mon, 9 Mar 2026 14:42:59 +0000
Subject: [PATCH] [BOLT][AArch64] Support block reordering beyond 1KB for
 FEAT_CMPBR.

Currently LongJmpPass::relaxLocalBranches bails early if the estimated
size of a binary function is less than 32KB assuming that the shortest
branches are 16 bits. Therefore the fixup value for the cold branch
target may go out of range if the function is larger than 1KB.

I am decreasing ShortestJumpSpan from 32KB to 1KB, since FEAT_CMPBR
branches are 11 bits.
---
 bolt/include/bolt/Passes/LongJmp.h            |  2 +-
 .../compare-and-branch-reorder-blocks.S       | 19 ++++++++++++++-----
 2 files changed, 15 insertions(+), 6 deletions(-)

diff --git a/bolt/include/bolt/Passes/LongJmp.h b/bolt/include/bolt/Passes/LongJmp.h
index 4b4935888599a..4633d30104d43 100644
--- a/bolt/include/bolt/Passes/LongJmp.h
+++ b/bolt/include/bolt/Passes/LongJmp.h
@@ -64,7 +64,7 @@ class LongJmpPass : public BinaryFunctionPass {
   uint32_t NumSharedStubs{0};
 
   /// The shortest distance for any branch instruction on AArch64.
-  static constexpr size_t ShortestJumpBits = 16;
+  static constexpr size_t ShortestJumpBits = 11;
   static constexpr size_t ShortestJumpSpan = 1ULL << (ShortestJumpBits - 1);
 
   /// The longest single-instruction branch.
diff --git a/bolt/test/AArch64/compare-and-branch-reorder-blocks.S b/bolt/test/AArch64/compare-and-branch-reorder-blocks.S
index 464243d788c1f..cf2e1f10c06bf 100644
--- a/bolt/test/AArch64/compare-and-branch-reorder-blocks.S
+++ b/bolt/test/AArch64/compare-and-branch-reorder-blocks.S
@@ -10,8 +10,8 @@
 
 # RUN: %clang %cflags -march=armv9-a+cmpbr -Wl,-q %s -o %t -DNUM_NOPS=256
 # RUN: link_fdata --no-lbr %s %t %t.fdata
-# RUN: not llvm-bolt %t -o %t.bolt --data %t.fdata --reorder-blocks=ext-tsp --compact-code-model --keep-nops 2>&1 \
-# RUN:   | FileCheck %s --check-prefix=FIXUP_OUT_OF_RANGE
+# RUN: llvm-bolt %t -o %t.bolt --data %t.fdata --reorder-blocks=ext-tsp --compact-code-model --keep-nops
+# RUN: llvm-objdump -d %t.bolt | FileCheck %s --check-prefix=BEYOND-1KB
 
   .globl reorder_blocks
   .type reorder_blocks, %function
@@ -31,8 +31,8 @@ reorder_blocks:
   .rept NUM_NOPS
     nop
   .endr
-  mov x0, #2
-  ret
+    mov x0, #2
+    ret
 
 ## Force relocation mode.
 .reloc 0, R_AARCH64_NONE
@@ -46,4 +46,13 @@ reorder_blocks:
 # CHECK-NEXT: [[ADDR]]: {{.*}} mov  x0, #0x1 // =1
 # CHECK-NEXT:           {{.*}} ret
 
-# FIXUP_OUT_OF_RANGE: error: fixup value out of range
+# BEYOND-1KB: Disassembly of section .text:
+
+# BEYOND-1KB: <reorder_blocks>:
+# BEYOND-1KB-NEXT:            {{.*}} cblt x0, #0x1, 0x[[ADDR0:[0-9a-f]+]] <{{.*}}>
+# BEYOND-1KB-NEXT:            {{.*}} b              0x[[ADDR1:[0-9a-f]+]] <{{.*}}>
+# BEYOND-1KB-NEXT: [[ADDR0]]: {{.*}} nop
+# BEYOND-1KB:                 {{.*}} mov  x0, #0x2 // =2
+# BEYOND-1KB-NEXT:            {{.*}} ret
+# BEYOND-1KB-NEXT: [[ADDR1]]: {{.*}} mov  x0, #0x1 // =1
+# BEYOND-1KB-NEXT:            {{.*}} ret