[clang] [llvm] [RISCV] Add `sifive-x160` and `sifive-x180` processor definitions (PR #186264)

Min-Yih Hsu via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 15 17:18:15 PDT 2026

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https://github.com/mshockwave closed https://github.com/llvm/llvm-project/pull/186264

Previous message: [clang] [llvm] [RISCV] Add `sifive-x160` and `sifive-x180` processor definitions (PR #186264)
Next message: [llvm] Compute GUIDs once and store in metadata (PR #184065)
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