[llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)

Jonathan Thackray via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 12 05:11:45 PDT 2026


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@@ -12,737 +16,898 @@
 // RUN:        | llvm-mc -triple=aarch64 -mattr=+d128,+tlb-rmi -disassemble -show-encoding \
 // RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
 
+// Only check assembly with +tlbid for instructions that match tlbip *e{1,2}[io]s*
+// Errors (for when +tlbid is not allowed) are checked in CHECK-NOT-TLBID
+.ifndef TLBID_ONLY
----------------
jthackray wrote:

I've re-ordered these now.

https://github.com/llvm/llvm-project/pull/178913


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