[llvm] [AArch64][llvm] Gate some `tlbip` insns with either +tlbid or +d128 (PR #178913)
Jonathan Thackray via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 10 06:59:02 PDT 2026
https://github.com/jthackray updated https://github.com/llvm/llvm-project/pull/178913
>From 2311a7176fc8542c7cf43db4b4e91ff34dc5bb62 Mon Sep 17 00:00:00 2001
From: Jonathan Thackray <jonathan.thackray at arm.com>
Date: Fri, 30 Jan 2026 16:05:07 +0000
Subject: [PATCH 1/5] [AArch64][llvm] Gate some `tlbip` insns with +tlbid or
+d128
Change the gating of `tlbip` instructions containing `*E1IS*`, `*E1OS*`,
`*E2IS*` or `*E2OS*` to be used with `+tlbid` or `+d128`. This is because
the 2025 Armv9.7-A MemSys specification says:
```
All TLBIP *E1IS*, TLBIP*E1OS*, TLBIP*E2IS* and TLBIP*E2OS* instructions
that are currently dependent on FEAT_D128 are updated to be dependent
on FEAT_D128 or FEAT_TLBID
```
---
.../Target/AArch64/AArch64SystemOperands.td | 9 +-
.../AArch64/AsmParser/AArch64AsmParser.cpp | 20 +-
.../Target/AArch64/Utils/AArch64BaseInfo.h | 20 ++
llvm/test/MC/AArch64/armv9a-tlbip.s | 132 ++++-----
llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s | 259 ++++++++++++++++++
5 files changed, 366 insertions(+), 74 deletions(-)
create mode 100644 llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index 004bff92c082d..2895c9e00e2ab 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -898,18 +898,21 @@ defm TLBIP : TLBITableBase;
multiclass TLBI<string name, bit hasTLBIP, bits<3> op1, bits<4> crn, bits<4> crm,
bits<3> op2, bit needsreg = 1, bit optionalreg = 0> {
+ defvar allowTLBID = !match(name, ".*E[12][IO]S.*");
+ defvar TLBIPRequires = !if(allowTLBID,
+ ["AArch64::FeatureD128", "AArch64::FeatureTLBID"],
+ ["AArch64::FeatureD128"]);
def : TLBIEntry<name, op1, crn, crm, op2, needsreg, optionalreg>;
def : TLBIEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> {
let Encoding{7} = 1;
- let ExtraRequires = ["AArch64::FeatureXS"];
}
if !eq(hasTLBIP, true) then {
def : TLBIPEntry<name, op1, crn, crm, op2, needsreg, optionalreg> {
- let ExtraRequires = ["AArch64::FeatureD128"];
+ let ExtraRequires = TLBIPRequires;
}
def : TLBIPEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> {
let Encoding{7} = 1;
- let ExtraRequires = ["AArch64::FeatureD128"];
+ let ExtraRequires = TLBIPRequires;
}
}
}
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 590da8f93873d..e5d7628404247 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -4264,12 +4264,22 @@ bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc,
const AArch64TLBIP::TLBIP *TLBIP = AArch64TLBIP::lookupTLBIPByName(Op);
if (!TLBIP)
return TokError("invalid operand for TLBIP instruction");
- if (!getSTI().hasFeature(AArch64::FeatureD128) &&
- !getSTI().hasFeature(AArch64::FeatureAll))
- return TokError("instruction requires: d128");
- if (!TLBIP->haveFeatures(getSTI().getFeatureBits())) {
+
+ if (!TLBIP.haveFeatures(getSTI().getFeatureBits())) {
+ FeatureBitset Active = getSTI().getFeatureBits();
+ FeatureBitset Missing = TLBIP.getRequiredFeatures() & ~Active;
+ if (TLBIP.allowTLBID()) {
+ Missing.reset(AArch64::FeatureD128);
+ Missing.reset(AArch64::FeatureTLBID);
+ if (!Active[AArch64::FeatureD128] && !Active[AArch64::FeatureTLBID]) {
+ if (Missing.none())
+ return TokError("instruction requires: tlbid or d128");
+ Missing.set(AArch64::FeatureD128);
+ Missing.set(AArch64::FeatureTLBID);
+ }
+ }
std::string Str("instruction requires: ");
- setRequiredFeatureString(TLBIP->getRequiredFeatures(), Str);
+ setRequiredFeatureString(Missing, Str);
return TokError(Str);
}
createSysAlias(TLBIP->Encoding, Operands, S);
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
index 97777dec45863..aaaf3cdba90ed 100644
--- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
+++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
@@ -858,6 +858,26 @@ struct TLBI : SysAliasOptionalReg {
namespace AArch64TLBIP {
struct TLBIP : SysAliasOptionalReg {
using SysAliasOptionalReg::SysAliasOptionalReg;
+
+ bool allowTLBID() const {
+ return FeaturesRequired[llvm::AArch64::FeatureTLBID];
+ }
+
+ bool haveFeatures(FeatureBitset ActiveFeatures) const {
+ if (ActiveFeatures[llvm::AArch64::FeatureAll])
+ return true;
+
+ FeatureBitset Required = FeaturesRequired;
+ if (allowTLBID()) {
+ Required.reset(llvm::AArch64::FeatureD128);
+ Required.reset(llvm::AArch64::FeatureTLBID);
+ return (Required & ActiveFeatures) == Required &&
+ (ActiveFeatures[llvm::AArch64::FeatureD128] ||
+ ActiveFeatures[llvm::AArch64::FeatureTLBID]);
+ }
+
+ return (Required & ActiveFeatures) == Required;
+ }
};
#define GET_TLBIPTable_DECL
#include "AArch64GenSystemOperands.inc"
diff --git a/llvm/test/MC/AArch64/armv9a-tlbip.s b/llvm/test/MC/AArch64/armv9a-tlbip.s
index 7985b3d0c2e2e..e153cd73d3763 100644
--- a/llvm/test/MC/AArch64/armv9a-tlbip.s
+++ b/llvm/test/MC/AArch64/armv9a-tlbip.s
@@ -30,25 +30,25 @@ tlbip IPAS2E1NXS, x4, x5
tlbip IPAS2E1IS, x4, x5
// CHECK-INST: tlbip ipas2e1is, x4, x5
// CHECK-ENCODING: encoding: [0x24,0x80,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8024 sysp #4, c8, c0, #1, x4, x5
tlbip IPAS2E1ISNXS, x4, x5
// CHECK-INST: tlbip ipas2e1isnxs, x4, x5
// CHECK-ENCODING: encoding: [0x24,0x90,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9024 sysp #4, c9, c0, #1, x4, x5
tlbip IPAS2E1OS, x4, x5
// CHECK-INST: tlbip ipas2e1os, x4, x5
// CHECK-ENCODING: encoding: [0x04,0x84,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8404 sysp #4, c8, c4, #0, x4, x5
tlbip IPAS2E1OSNXS, x4, x5
// CHECK-INST: tlbip ipas2e1osnxs, x4, x5
// CHECK-ENCODING: encoding: [0x04,0x94,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9404 sysp #4, c9, c4, #0, x4, x5
tlbip IPAS2LE1, x4, x5
@@ -66,25 +66,25 @@ tlbip IPAS2LE1NXS, x4, x5
tlbip IPAS2LE1IS, x4, x5
// CHECK-INST: tlbip ipas2le1is, x4, x5
// CHECK-ENCODING: encoding: [0xa4,0x80,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c80a4 sysp #4, c8, c0, #5, x4, x5
tlbip IPAS2LE1ISNXS, x4, x5
// CHECK-INST: tlbip ipas2le1isnxs, x4, x5
// CHECK-ENCODING: encoding: [0xa4,0x90,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c90a4 sysp #4, c9, c0, #5, x4, x5
tlbip IPAS2LE1OS, x4, x5
// CHECK-INST: tlbip ipas2le1os, x4, x5
// CHECK-ENCODING: encoding: [0x84,0x84,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8484 sysp #4, c8, c4, #4, x4, x5
tlbip IPAS2LE1OSNXS, x4, x5
// CHECK-INST: tlbip ipas2le1osnxs, x4, x5
// CHECK-ENCODING: encoding: [0x84,0x94,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9484 sysp #4, c9, c4, #4, x4, x5
tlbip VAE1, x8, x9
@@ -102,25 +102,25 @@ tlbip VAE1NXS, x8, x9
tlbip VAE1IS, x8, x9
// CHECK-INST: tlbip vae1is, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x83,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488328 sysp #0, c8, c3, #1, x8, x9
tlbip VAE1ISNXS, x8, x9
// CHECK-INST: tlbip vae1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x93,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489328 sysp #0, c9, c3, #1, x8, x9
tlbip VAE1OS, x8, x9
// CHECK-INST: tlbip vae1os, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x81,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488128 sysp #0, c8, c1, #1, x8, x9
tlbip VAE1OSNXS, x8, x9
// CHECK-INST: tlbip vae1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x91,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489128 sysp #0, c9, c1, #1, x8, x9
tlbip VALE1, x8, x9
@@ -138,25 +138,25 @@ tlbip VALE1NXS, x8, x9
tlbip VALE1IS, x8, x9
// CHECK-INST: tlbip vale1is, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x83,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54883a8 sysp #0, c8, c3, #5, x8, x9
tlbip VALE1ISNXS, x8, x9
// CHECK-INST: tlbip vale1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x93,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54893a8 sysp #0, c9, c3, #5, x8, x9
tlbip VALE1OS, x8, x9
// CHECK-INST: tlbip vale1os, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x81,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54881a8 sysp #0, c8, c1, #5, x8, x9
tlbip VALE1OSNXS, x8, x9
// CHECK-INST: tlbip vale1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x91,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54891a8 sysp #0, c9, c1, #5, x8, x9
tlbip VAAE1, x8, x9
@@ -174,25 +174,25 @@ tlbip VAAE1NXS, x8, x9
tlbip VAAE1IS, x8, x9
// CHECK-INST: tlbip vaae1is, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x83,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488368 sysp #0, c8, c3, #3, x8, x9
tlbip VAAE1ISNXS, x8, x9
// CHECK-INST: tlbip vaae1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x93,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489368 sysp #0, c9, c3, #3, x8, x9
tlbip VAAE1OS, x8, x9
// CHECK-INST: tlbip vaae1os, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x81,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488168 sysp #0, c8, c1, #3, x8, x9
tlbip VAAE1OSNXS, x8, x9
// CHECK-INST: tlbip vaae1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x91,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489168 sysp #0, c9, c1, #3, x8, x9
tlbip VAALE1, x8, x9
@@ -210,25 +210,25 @@ tlbip VAALE1NXS, x8, x9
tlbip VAALE1IS, x8, x9
// CHECK-INST: tlbip vaale1is, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x83,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54883e8 sysp #0, c8, c3, #7, x8, x9
tlbip VAALE1ISNXS, x8, x9
// CHECK-INST: tlbip vaale1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x93,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54893e8 sysp #0, c9, c3, #7, x8, x9
tlbip VAALE1OS, x8, x9
// CHECK-INST: tlbip vaale1os, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x81,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54881e8 sysp #0, c8, c1, #7, x8, x9
tlbip VAALE1OSNXS, x8, x9
// CHECK-INST: tlbip vaale1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x91,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54891e8 sysp #0, c9, c1, #7, x8, x9
tlbip VAE2, x14, x15
@@ -246,25 +246,25 @@ tlbip VAE2NXS, x14, x15
tlbip VAE2IS, x14, x15
// CHECK-INST: tlbip vae2is, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x83,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c832e sysp #4, c8, c3, #1, x14, x15
tlbip VAE2ISNXS, x14, x15
// CHECK-INST: tlbip vae2isnxs, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x93,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c932e sysp #4, c9, c3, #1, x14, x15
tlbip VAE2OS, x14, x15
// CHECK-INST: tlbip vae2os, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x81,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c812e sysp #4, c8, c1, #1, x14, x15
tlbip VAE2OSNXS, x14, x15
// CHECK-INST: tlbip vae2osnxs, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x91,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c912e sysp #4, c9, c1, #1, x14, x15
tlbip VALE2, x14, x15
@@ -282,25 +282,25 @@ tlbip VALE2NXS, x14, x15
tlbip VALE2IS, x14, x15
// CHECK-INST: tlbip vale2is, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x83,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c83ae sysp #4, c8, c3, #5, x14, x15
tlbip VALE2ISNXS, x14, x15
// CHECK-INST: tlbip vale2isnxs, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x93,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c93ae sysp #4, c9, c3, #5, x14, x15
tlbip VALE2OS, x14, x15
// CHECK-INST: tlbip vale2os, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x81,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c81ae sysp #4, c8, c1, #5, x14, x15
tlbip VALE2OSNXS, x14, x15
// CHECK-INST: tlbip vale2osnxs, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x91,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c91ae sysp #4, c9, c1, #5, x14, x15
tlbip VAE3, x24, x25
@@ -390,25 +390,25 @@ tlbip RVAE1NXS, x18, x19
tlbip RVAE1IS, x18, x19
// CHECK-INST: tlbip rvae1is, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x82,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488232 sysp #0, c8, c2, #1, x18, x19
tlbip RVAE1ISNXS, x18, x19
// CHECK-INST: tlbip rvae1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x92,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489232 sysp #0, c9, c2, #1, x18, x19
tlbip RVAE1OS, x18, x19
// CHECK-INST: tlbip rvae1os, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x85,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488532 sysp #0, c8, c5, #1, x18, x19
tlbip RVAE1OSNXS, x18, x19
// CHECK-INST: tlbip rvae1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x95,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489532 sysp #0, c9, c5, #1, x18, x19
tlbip RVAAE1, x18, x19
@@ -426,25 +426,25 @@ tlbip RVAAE1NXS, x18, x19
tlbip RVAAE1IS, x18, x19
// CHECK-INST: tlbip rvaae1is, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x82,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488272 sysp #0, c8, c2, #3, x18, x19
tlbip RVAAE1ISNXS, x18, x19
// CHECK-INST: tlbip rvaae1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x92,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489272 sysp #0, c9, c2, #3, x18, x19
tlbip RVAAE1OS, x18, x19
// CHECK-INST: tlbip rvaae1os, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x85,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488572 sysp #0, c8, c5, #3, x18, x19
tlbip RVAAE1OSNXS, x18, x19
// CHECK-INST: tlbip rvaae1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x95,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489572 sysp #0, c9, c5, #3, x18, x19
tlbip RVALE1, x18, x19
@@ -462,25 +462,25 @@ tlbip RVALE1NXS, x18, x19
tlbip RVALE1IS, x18, x19
// CHECK-INST: tlbip rvale1is, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x82,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54882b2 sysp #0, c8, c2, #5, x18, x19
tlbip RVALE1ISNXS, x18, x19
// CHECK-INST: tlbip rvale1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x92,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54892b2 sysp #0, c9, c2, #5, x18, x19
tlbip RVALE1OS, x18, x19
// CHECK-INST: tlbip rvale1os, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x85,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54885b2 sysp #0, c8, c5, #5, x18, x19
tlbip RVALE1OSNXS, x18, x19
// CHECK-INST: tlbip rvale1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x95,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54895b2 sysp #0, c9, c5, #5, x18, x19
tlbip RVAALE1, x18, x19
@@ -498,25 +498,25 @@ tlbip RVAALE1NXS, x18, x19
tlbip RVAALE1IS, x18, x19
// CHECK-INST: tlbip rvaale1is, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x82,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54882f2 sysp #0, c8, c2, #7, x18, x19
tlbip RVAALE1ISNXS, x18, x19
// CHECK-INST: tlbip rvaale1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x92,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54892f2 sysp #0, c9, c2, #7, x18, x19
tlbip RVAALE1OS, x18, x19
// CHECK-INST: tlbip rvaale1os, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x85,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54885f2 sysp #0, c8, c5, #7, x18, x19
tlbip RVAALE1OSNXS, x18, x19
// CHECK-INST: tlbip rvaale1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x95,0x48,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54895f2 sysp #0, c9, c5, #7, x18, x19
tlbip RVAE2, x28, x29
@@ -534,25 +534,25 @@ tlbip RVAE2NXS, x28, x29
tlbip RVAE2IS, x28, x29
// CHECK-INST: tlbip rvae2is, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x82,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c823c sysp #4, c8, c2, #1, x28, x29
tlbip RVAE2ISNXS, x28, x29
// CHECK-INST: tlbip rvae2isnxs, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x92,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c923c sysp #4, c9, c2, #1, x28, x29
tlbip RVAE2OS, x28, x29
// CHECK-INST: tlbip rvae2os, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x85,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c853c sysp #4, c8, c5, #1, x28, x29
tlbip RVAE2OSNXS, x28, x29
// CHECK-INST: tlbip rvae2osnxs, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x95,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c953c sysp #4, c9, c5, #1, x28, x29
tlbip RVALE2, x28, x29
@@ -570,25 +570,25 @@ tlbip RVALE2NXS, x28, x29
tlbip RVALE2IS, x28, x29
// CHECK-INST: tlbip rvale2is, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x82,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c82bc sysp #4, c8, c2, #5, x28, x29
tlbip RVALE2ISNXS, x28, x29
// CHECK-INST: tlbip rvale2isnxs, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x92,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c92bc sysp #4, c9, c2, #5, x28, x29
tlbip RVALE2OS, x28, x29
// CHECK-INST: tlbip rvale2os, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x85,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c85bc sysp #4, c8, c5, #5, x28, x29
tlbip RVALE2OSNXS, x28, x29
// CHECK-INST: tlbip rvale2osnxs, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x95,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c95bc sysp #4, c9, c5, #5, x28, x29
tlbip RVAE3, x10, x11
@@ -678,25 +678,25 @@ tlbip RIPAS2E1NXS, x20, x21
tlbip RIPAS2E1IS, x20, x21
// CHECK-INST: tlbip ripas2e1is, x20, x21
// CHECK-ENCODING: encoding: [0x54,0x80,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8054 sysp #4, c8, c0, #2, x20, x21
tlbip RIPAS2E1ISNXS, x20, x21
// CHECK-INST: tlbip ripas2e1isnxs, x20, x21
// CHECK-ENCODING: encoding: [0x54,0x90,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9054 sysp #4, c9, c0, #2, x20, x21
tlbip RIPAS2E1OS, x20, x21
// CHECK-INST: tlbip ripas2e1os, x20, x21
// CHECK-ENCODING: encoding: [0x74,0x84,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8474 sysp #4, c8, c4, #3, x20, x21
tlbip RIPAS2E1OSNXS, x20, x21
// CHECK-INST: tlbip ripas2e1osnxs, x20, x21
// CHECK-ENCODING: encoding: [0x74,0x94,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9474 sysp #4, c9, c4, #3, x20, x21
tlbip RIPAS2LE1, x20, x21
@@ -714,35 +714,35 @@ tlbip RIPAS2LE1NXS, x20, x21
tlbip RIPAS2LE1IS, x20, x21
// CHECK-INST: tlbip ripas2le1is, x20, x21
// CHECK-ENCODING: encoding: [0xd4,0x80,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c80d4 sysp #4, c8, c0, #6, x20, x21
tlbip RIPAS2LE1ISNXS, x20, x21
// CHECK-INST: tlbip ripas2le1isnxs, x20, x21
// CHECK-ENCODING: encoding: [0xd4,0x90,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c90d4 sysp #4, c9, c0, #6, x20, x21
tlbip RIPAS2LE1OS, x20, x21
// CHECK-INST: tlbip ripas2le1os, x20, x21
// CHECK-ENCODING: encoding: [0xf4,0x84,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c84f4 sysp #4, c8, c4, #7, x20, x21
tlbip RIPAS2LE1OSNXS, x20, x21
// CHECK-INST: tlbip ripas2le1osnxs, x20, x21
// CHECK-ENCODING: encoding: [0xf4,0x94,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c94f4 sysp #4, c9, c4, #7, x20, x21
tlbip RIPAS2LE1OS, xzr, xzr
// CHECK-INST: tlbip ripas2le1os, xzr, xzr
// CHECK-ENCODING: encoding: [0xff,0x84,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c84ff sysp #4, c8, c4, #7
tlbip RIPAS2LE1OSNXS, xzr, xzr
// CHECK-INST: tlbip ripas2le1osnxs, xzr, xzr
// CHECK-ENCODING: encoding: [0xff,0x94,0x4c,0xd5]
-// CHECK-ERROR: error: instruction requires: d128
+// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c94ff sysp #4, c9, c4, #7
diff --git a/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s b/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s
new file mode 100644
index 0000000000000..0361fbcc73d4b
--- /dev/null
+++ b/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s
@@ -0,0 +1,259 @@
+// NOTE: These TLBIP forms are valid with either +tlbid or +d128.
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+tlbid,+tlb-rmi,+xs < %s | FileCheck %s --check-prefix=TLBID
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+d128,+tlb-rmi,+xs < %s | FileCheck %s --check-prefix=D128
+
+tlbip VAE1OS, x0, x1
+// TLBID: tlbip vae1os, x0, x1
+// D128: tlbip vae1os, x0, x1
+
+tlbip VAAE1OS, x0, x1
+// TLBID: tlbip vaae1os, x0, x1
+// D128: tlbip vaae1os, x0, x1
+
+tlbip VALE1OS, x0, x1
+// TLBID: tlbip vale1os, x0, x1
+// D128: tlbip vale1os, x0, x1
+
+tlbip VAALE1OS, x0, x1
+// TLBID: tlbip vaale1os, x0, x1
+// D128: tlbip vaale1os, x0, x1
+
+tlbip RVAE1IS, x0, x1
+// TLBID: tlbip rvae1is, x0, x1
+// D128: tlbip rvae1is, x0, x1
+
+tlbip RVAAE1IS, x0, x1
+// TLBID: tlbip rvaae1is, x0, x1
+// D128: tlbip rvaae1is, x0, x1
+
+tlbip RVALE1IS, x0, x1
+// TLBID: tlbip rvale1is, x0, x1
+// D128: tlbip rvale1is, x0, x1
+
+tlbip RVAALE1IS, x0, x1
+// TLBID: tlbip rvaale1is, x0, x1
+// D128: tlbip rvaale1is, x0, x1
+
+tlbip VAE1IS, x0, x1
+// TLBID: tlbip vae1is, x0, x1
+// D128: tlbip vae1is, x0, x1
+
+tlbip VAAE1IS, x0, x1
+// TLBID: tlbip vaae1is, x0, x1
+// D128: tlbip vaae1is, x0, x1
+
+tlbip VALE1IS, x0, x1
+// TLBID: tlbip vale1is, x0, x1
+// D128: tlbip vale1is, x0, x1
+
+tlbip VAALE1IS, x0, x1
+// TLBID: tlbip vaale1is, x0, x1
+// D128: tlbip vaale1is, x0, x1
+
+tlbip RVAE1OS, x0, x1
+// TLBID: tlbip rvae1os, x0, x1
+// D128: tlbip rvae1os, x0, x1
+
+tlbip RVAAE1OS, x0, x1
+// TLBID: tlbip rvaae1os, x0, x1
+// D128: tlbip rvaae1os, x0, x1
+
+tlbip RVALE1OS, x0, x1
+// TLBID: tlbip rvale1os, x0, x1
+// D128: tlbip rvale1os, x0, x1
+
+tlbip RVAALE1OS, x0, x1
+// TLBID: tlbip rvaale1os, x0, x1
+// D128: tlbip rvaale1os, x0, x1
+
+tlbip VAE1OSNXS, x0, x1
+// TLBID: tlbip vae1osnxs, x0, x1
+// D128: tlbip vae1osnxs, x0, x1
+
+tlbip VAAE1OSNXS, x0, x1
+// TLBID: tlbip vaae1osnxs, x0, x1
+// D128: tlbip vaae1osnxs, x0, x1
+
+tlbip VALE1OSNXS, x0, x1
+// TLBID: tlbip vale1osnxs, x0, x1
+// D128: tlbip vale1osnxs, x0, x1
+
+tlbip VAALE1OSNXS, x0, x1
+// TLBID: tlbip vaale1osnxs, x0, x1
+// D128: tlbip vaale1osnxs, x0, x1
+
+tlbip RVAE1ISNXS, x0, x1
+// TLBID: tlbip rvae1isnxs, x0, x1
+// D128: tlbip rvae1isnxs, x0, x1
+
+tlbip RVAAE1ISNXS, x0, x1
+// TLBID: tlbip rvaae1isnxs, x0, x1
+// D128: tlbip rvaae1isnxs, x0, x1
+
+tlbip RVALE1ISNXS, x0, x1
+// TLBID: tlbip rvale1isnxs, x0, x1
+// D128: tlbip rvale1isnxs, x0, x1
+
+tlbip RVAALE1ISNXS, x0, x1
+// TLBID: tlbip rvaale1isnxs, x0, x1
+// D128: tlbip rvaale1isnxs, x0, x1
+
+tlbip VAE1ISNXS, x0, x1
+// TLBID: tlbip vae1isnxs, x0, x1
+// D128: tlbip vae1isnxs, x0, x1
+
+tlbip VAAE1ISNXS, x0, x1
+// TLBID: tlbip vaae1isnxs, x0, x1
+// D128: tlbip vaae1isnxs, x0, x1
+
+tlbip VALE1ISNXS, x0, x1
+// TLBID: tlbip vale1isnxs, x0, x1
+// D128: tlbip vale1isnxs, x0, x1
+
+tlbip VAALE1ISNXS, x0, x1
+// TLBID: tlbip vaale1isnxs, x0, x1
+// D128: tlbip vaale1isnxs, x0, x1
+
+tlbip RVAE1OSNXS, x0, x1
+// TLBID: tlbip rvae1osnxs, x0, x1
+// D128: tlbip rvae1osnxs, x0, x1
+
+tlbip RVAAE1OSNXS, x0, x1
+// TLBID: tlbip rvaae1osnxs, x0, x1
+// D128: tlbip rvaae1osnxs, x0, x1
+
+tlbip RVALE1OSNXS, x0, x1
+// TLBID: tlbip rvale1osnxs, x0, x1
+// D128: tlbip rvale1osnxs, x0, x1
+
+tlbip RVAALE1OSNXS, x0, x1
+// TLBID: tlbip rvaale1osnxs, x0, x1
+// D128: tlbip rvaale1osnxs, x0, x1
+
+tlbip IPAS2E1IS, x0, x1
+// TLBID: tlbip ipas2e1is, x0, x1
+// D128: tlbip ipas2e1is, x0, x1
+
+tlbip RIPAS2E1IS, x0, x1
+// TLBID: tlbip ripas2e1is, x0, x1
+// D128: tlbip ripas2e1is, x0, x1
+
+tlbip IPAS2LE1IS, x0, x1
+// TLBID: tlbip ipas2le1is, x0, x1
+// D128: tlbip ipas2le1is, x0, x1
+
+tlbip RIPAS2LE1IS, x0, x1
+// TLBID: tlbip ripas2le1is, x0, x1
+// D128: tlbip ripas2le1is, x0, x1
+
+tlbip VAE2OS, x0, x1
+// TLBID: tlbip vae2os, x0, x1
+// D128: tlbip vae2os, x0, x1
+
+tlbip VALE2OS, x0, x1
+// TLBID: tlbip vale2os, x0, x1
+// D128: tlbip vale2os, x0, x1
+
+tlbip RVAE2IS, x0, x1
+// TLBID: tlbip rvae2is, x0, x1
+// D128: tlbip rvae2is, x0, x1
+
+tlbip RVALE2IS, x0, x1
+// TLBID: tlbip rvale2is, x0, x1
+// D128: tlbip rvale2is, x0, x1
+
+tlbip VAE2IS, x0, x1
+// TLBID: tlbip vae2is, x0, x1
+// D128: tlbip vae2is, x0, x1
+
+tlbip VALE2IS, x0, x1
+// TLBID: tlbip vale2is, x0, x1
+// D128: tlbip vale2is, x0, x1
+
+tlbip IPAS2E1OS, x0, x1
+// TLBID: tlbip ipas2e1os, x0, x1
+// D128: tlbip ipas2e1os, x0, x1
+
+tlbip RIPAS2E1OS, x0, x1
+// TLBID: tlbip ripas2e1os, x0, x1
+// D128: tlbip ripas2e1os, x0, x1
+
+tlbip IPAS2LE1OS, x0, x1
+// TLBID: tlbip ipas2le1os, x0, x1
+// D128: tlbip ipas2le1os, x0, x1
+
+tlbip RIPAS2LE1OS, x0, x1
+// TLBID: tlbip ripas2le1os, x0, x1
+// D128: tlbip ripas2le1os, x0, x1
+
+tlbip RVAE2OS, x0, x1
+// TLBID: tlbip rvae2os, x0, x1
+// D128: tlbip rvae2os, x0, x1
+
+tlbip RVALE2OS, x0, x1
+// TLBID: tlbip rvale2os, x0, x1
+// D128: tlbip rvale2os, x0, x1
+
+tlbip IPAS2E1ISNXS, x0, x1
+// TLBID: tlbip ipas2e1isnxs, x0, x1
+// D128: tlbip ipas2e1isnxs, x0, x1
+
+tlbip RIPAS2E1ISNXS, x0, x1
+// TLBID: tlbip ripas2e1isnxs, x0, x1
+// D128: tlbip ripas2e1isnxs, x0, x1
+
+tlbip IPAS2LE1ISNXS, x0, x1
+// TLBID: tlbip ipas2le1isnxs, x0, x1
+// D128: tlbip ipas2le1isnxs, x0, x1
+
+tlbip RIPAS2LE1ISNXS, x0, x1
+// TLBID: tlbip ripas2le1isnxs, x0, x1
+// D128: tlbip ripas2le1isnxs, x0, x1
+
+tlbip VAE2OSNXS, x0, x1
+// TLBID: tlbip vae2osnxs, x0, x1
+// D128: tlbip vae2osnxs, x0, x1
+
+tlbip VALE2OSNXS, x0, x1
+// TLBID: tlbip vale2osnxs, x0, x1
+// D128: tlbip vale2osnxs, x0, x1
+
+tlbip RVAE2ISNXS, x0, x1
+// TLBID: tlbip rvae2isnxs, x0, x1
+// D128: tlbip rvae2isnxs, x0, x1
+
+tlbip RVALE2ISNXS, x0, x1
+// TLBID: tlbip rvale2isnxs, x0, x1
+// D128: tlbip rvale2isnxs, x0, x1
+
+tlbip VAE2ISNXS, x0, x1
+// TLBID: tlbip vae2isnxs, x0, x1
+// D128: tlbip vae2isnxs, x0, x1
+
+tlbip VALE2ISNXS, x0, x1
+// TLBID: tlbip vale2isnxs, x0, x1
+// D128: tlbip vale2isnxs, x0, x1
+
+tlbip IPAS2E1OSNXS, x0, x1
+// TLBID: tlbip ipas2e1osnxs, x0, x1
+// D128: tlbip ipas2e1osnxs, x0, x1
+
+tlbip RIPAS2E1OSNXS, x0, x1
+// TLBID: tlbip ripas2e1osnxs, x0, x1
+// D128: tlbip ripas2e1osnxs, x0, x1
+
+tlbip IPAS2LE1OSNXS, x0, x1
+// TLBID: tlbip ipas2le1osnxs, x0, x1
+// D128: tlbip ipas2le1osnxs, x0, x1
+
+tlbip RIPAS2LE1OSNXS, x0, x1
+// TLBID: tlbip ripas2le1osnxs, x0, x1
+// D128: tlbip ripas2le1osnxs, x0, x1
+
+tlbip RVAE2OSNXS, x0, x1
+// TLBID: tlbip rvae2osnxs, x0, x1
+// D128: tlbip rvae2osnxs, x0, x1
+
+tlbip RVALE2OSNXS, x0, x1
+// TLBID: tlbip rvale2osnxs, x0, x1
+// D128: tlbip rvale2osnxs, x0, x1
>From 65094cbdb0207ce4bbc0967a6407d186fa0fabf7 Mon Sep 17 00:00:00 2001
From: Jonathan Thackray <jonathan.thackray at arm.com>
Date: Thu, 19 Feb 2026 14:52:20 +0000
Subject: [PATCH 2/5] fixup! Simplify logic after suggestions from Marian
---
.../Target/AArch64/AArch64SystemOperands.td | 1 +
.../AArch64/AsmParser/AArch64AsmParser.cpp | 23 +++++++++++--------
2 files changed, 14 insertions(+), 10 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index 2895c9e00e2ab..9e66b776eaf04 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -905,6 +905,7 @@ multiclass TLBI<string name, bit hasTLBIP, bits<3> op1, bits<4> crn, bits<4> crm
def : TLBIEntry<name, op1, crn, crm, op2, needsreg, optionalreg>;
def : TLBIEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> {
let Encoding{7} = 1;
+ let ExtraRequires = ["AArch64::FeatureXS"];
}
if !eq(hasTLBIP, true) then {
def : TLBIPEntry<name, op1, crn, crm, op2, needsreg, optionalreg> {
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index e5d7628404247..383109207aa11 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -4265,21 +4265,24 @@ bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc,
if (!TLBIP)
return TokError("invalid operand for TLBIP instruction");
- if (!TLBIP.haveFeatures(getSTI().getFeatureBits())) {
+ if (!TLBIP->haveFeatures(getSTI().getFeatureBits())) {
+ std::string Str("instruction requires: ");
FeatureBitset Active = getSTI().getFeatureBits();
- FeatureBitset Missing = TLBIP.getRequiredFeatures() & ~Active;
- if (TLBIP.allowTLBID()) {
+ FeatureBitset Missing = TLBIP->getRequiredFeatures() & ~Active;
+ bool HasEither =
+ Active[AArch64::FeatureD128] || Active[AArch64::FeatureTLBID];
+ bool NeedOrTLBID = TLBIP->allowTLBID() && !HasEither;
+ if (TLBIP->allowTLBID()) {
Missing.reset(AArch64::FeatureD128);
Missing.reset(AArch64::FeatureTLBID);
- if (!Active[AArch64::FeatureD128] && !Active[AArch64::FeatureTLBID]) {
- if (Missing.none())
- return TokError("instruction requires: tlbid or d128");
- Missing.set(AArch64::FeatureD128);
- Missing.set(AArch64::FeatureTLBID);
- }
}
- std::string Str("instruction requires: ");
+ if (Missing.none()) {
+ Str += "tlbid or d128";
+ return TokError(Str);
+ }
setRequiredFeatureString(Missing, Str);
+ if (NeedOrTLBID)
+ Str += ", tlbid or d128";
return TokError(Str);
}
createSysAlias(TLBIP->Encoding, Operands, S);
>From abb2d9acca08961f659a42e633cd4dd3435bc3aa Mon Sep 17 00:00:00 2001
From: Jonathan Thackray <jonathan.thackray at arm.com>
Date: Tue, 24 Feb 2026 16:59:55 +0000
Subject: [PATCH 3/5] fixup! Don't use ExtraRequires. Instead, set a boolean in
TLBITableBase
---
.../Target/AArch64/AArch64SystemOperands.td | 38 +++++++++-----
.../AArch64/AsmParser/AArch64AsmParser.cpp | 14 +++---
.../Target/AArch64/Utils/AArch64BaseInfo.h | 49 ++++++++++---------
3 files changed, 60 insertions(+), 41 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index 9e66b776eaf04..1b3db6f2d3c65 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -857,7 +857,7 @@ def : TIndex<"nb", 0b1>;
//===----------------------------------------------------------------------===//
class TLBICommon<string name, bits<3> op1, bits<4> crn, bits<4> crm,
- bits<3> op2, bit needsreg, bit optionalreg> {
+ bits<3> op2, bit needsreg, bit optionalreg, bit allowTLBID> {
string Name = name;
bits<14> Encoding;
let Encoding{13-11} = op1;
@@ -866,6 +866,7 @@ class TLBICommon<string name, bits<3> op1, bits<4> crn, bits<4> crm,
let Encoding{2-0} = op2;
bit NeedsReg = needsreg;
bit OptionalReg = optionalreg;
+ bit d128orTLBID = allowTLBID;
list<string> Requires = [];
list<string> ExtraRequires = [];
code RequiresStr = [{ { }] # !interleave(Requires # ExtraRequires, [{, }]) # [{ } }];
@@ -873,11 +874,11 @@ class TLBICommon<string name, bits<3> op1, bits<4> crn, bits<4> crm,
class TLBIEntry<string name, bits<3> op1, bits<4> crn, bits<4> crm,
bits<3> op2, bit needsreg, bit optionalreg>
- : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg>;
+ : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg, 0>;
class TLBIPEntry<string name, bits<3> op1, bits<4> crn, bits<4> crm,
- bits<3> op2, bit needsreg, bit optionalreg>
- : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg>;
+ bits<3> op2, bit needsreg, bit optionalreg, bit allowTLBID>
+ : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg, allowTLBID>;
multiclass TLBITableBase {
def NAME # Table : GenericTable {
@@ -894,26 +895,39 @@ multiclass TLBITableBase {
}
defm TLBI : TLBITableBase;
-defm TLBIP : TLBITableBase;
+
+multiclass TLBIPTableBase {
+ def NAME # Table : GenericTable {
+ let FilterClass = NAME # "Entry";
+ let CppTypeName = NAME;
+ let Fields = ["Name", "Encoding", "NeedsReg", "OptionalReg", "RequiresStr",
+ "d128orTLBID"];
+ let PrimaryKey = ["Encoding"];
+ let PrimaryKeyName = "lookup" # NAME # "ByEncoding";
+ }
+ def lookup # NAME # ByName : SearchIndex {
+ let Table = !cast<GenericTable>(NAME # "Table");
+ let Key = ["Name"];
+ }
+}
+
+defm TLBIP : TLBIPTableBase;
multiclass TLBI<string name, bit hasTLBIP, bits<3> op1, bits<4> crn, bits<4> crm,
bits<3> op2, bit needsreg = 1, bit optionalreg = 0> {
defvar allowTLBID = !match(name, ".*E[12][IO]S.*");
- defvar TLBIPRequires = !if(allowTLBID,
- ["AArch64::FeatureD128", "AArch64::FeatureTLBID"],
- ["AArch64::FeatureD128"]);
def : TLBIEntry<name, op1, crn, crm, op2, needsreg, optionalreg>;
def : TLBIEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> {
let Encoding{7} = 1;
let ExtraRequires = ["AArch64::FeatureXS"];
}
if !eq(hasTLBIP, true) then {
- def : TLBIPEntry<name, op1, crn, crm, op2, needsreg, optionalreg> {
- let ExtraRequires = TLBIPRequires;
+ def : TLBIPEntry<name, op1, crn, crm, op2, needsreg, optionalreg, allowTLBID> {
+ let ExtraRequires = ["AArch64::FeatureD128"];
}
- def : TLBIPEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> {
+ def : TLBIPEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg, allowTLBID> {
let Encoding{7} = 1;
- let ExtraRequires = TLBIPRequires;
+ let ExtraRequires = ["AArch64::FeatureD128"];
}
}
}
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 383109207aa11..48d2d14f76e1a 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -4266,16 +4266,16 @@ bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc,
return TokError("invalid operand for TLBIP instruction");
if (!TLBIP->haveFeatures(getSTI().getFeatureBits())) {
- std::string Str("instruction requires: ");
FeatureBitset Active = getSTI().getFeatureBits();
FeatureBitset Missing = TLBIP->getRequiredFeatures() & ~Active;
- bool HasEither =
- Active[AArch64::FeatureD128] || Active[AArch64::FeatureTLBID];
- bool NeedOrTLBID = TLBIP->allowTLBID() && !HasEither;
- if (TLBIP->allowTLBID()) {
- Missing.reset(AArch64::FeatureD128);
- Missing.reset(AArch64::FeatureTLBID);
+ bool NeedOrTLBID = false;
+
+ if (TLBIP->d128orTLBID) {
+ Missing &= ~AArch64TLBIP::TLBIP::D128OrTLBIDMask;
+ NeedOrTLBID =
+ !(Active[AArch64::FeatureD128] || Active[AArch64::FeatureTLBID]);
}
+ std::string Str("instruction requires: ");
if (Missing.none()) {
Str += "tlbid or d128";
return TokError(Str);
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
index aaaf3cdba90ed..0e00dd80afcab 100644
--- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
+++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
@@ -453,6 +453,31 @@ struct SysAliasOptionalReg : SysAlias {
: SysAlias(N, E, F), NeedsReg(R), OptionalReg(O) {}
};
+struct TLBIPSysAlias : SysAliasOptionalReg {
+ bool d128orTLBID;
+ inline static const FeatureBitset D128OrTLBIDMask =
+ FeatureBitset({llvm::AArch64::FeatureD128, llvm::AArch64::FeatureTLBID});
+
+ constexpr TLBIPSysAlias(const char *N, uint16_t E, bool R, bool O,
+ FeatureBitset F, bool D128OrTLBID)
+ : SysAliasOptionalReg(N, E, R, O, F), d128orTLBID(D128OrTLBID) {}
+
+ bool allowTLBID() const { return d128orTLBID; }
+
+ bool haveFeatures(FeatureBitset ActiveFeatures) const {
+ if (ActiveFeatures[llvm::AArch64::FeatureAll])
+ return true;
+
+ FeatureBitset Required = FeaturesRequired;
+ if (d128orTLBID)
+ Required &= ~D128OrTLBIDMask;
+
+ return (Required & ActiveFeatures) == Required &&
+ (!d128orTLBID || ActiveFeatures[llvm::AArch64::FeatureD128] ||
+ ActiveFeatures[llvm::AArch64::FeatureTLBID]);
+ }
+};
+
struct SysAliasImm : SysAlias {
uint16_t ImmValue;
constexpr SysAliasImm(const char *N, uint16_t E, uint16_t I)
@@ -856,28 +881,8 @@ struct TLBI : SysAliasOptionalReg {
}
namespace AArch64TLBIP {
-struct TLBIP : SysAliasOptionalReg {
- using SysAliasOptionalReg::SysAliasOptionalReg;
-
- bool allowTLBID() const {
- return FeaturesRequired[llvm::AArch64::FeatureTLBID];
- }
-
- bool haveFeatures(FeatureBitset ActiveFeatures) const {
- if (ActiveFeatures[llvm::AArch64::FeatureAll])
- return true;
-
- FeatureBitset Required = FeaturesRequired;
- if (allowTLBID()) {
- Required.reset(llvm::AArch64::FeatureD128);
- Required.reset(llvm::AArch64::FeatureTLBID);
- return (Required & ActiveFeatures) == Required &&
- (ActiveFeatures[llvm::AArch64::FeatureD128] ||
- ActiveFeatures[llvm::AArch64::FeatureTLBID]);
- }
-
- return (Required & ActiveFeatures) == Required;
- }
+struct TLBIP : TLBIPSysAlias {
+ using TLBIPSysAlias::TLBIPSysAlias;
};
#define GET_TLBIPTable_DECL
#include "AArch64GenSystemOperands.inc"
>From 13c39f8f4f32c7f956cbbbc716c62f445e81474c Mon Sep 17 00:00:00 2001
From: Jonathan Thackray <jonathan.thackray at arm.com>
Date: Thu, 5 Mar 2026 12:15:03 +0000
Subject: [PATCH 4/5] fixup! Fix using Marian's suggestion
---
llvm/test/MC/AArch64/armv9a-tlbip.s | 165 +++++++++++++
llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s | 259 ---------------------
2 files changed, 165 insertions(+), 259 deletions(-)
delete mode 100644 llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s
diff --git a/llvm/test/MC/AArch64/armv9a-tlbip.s b/llvm/test/MC/AArch64/armv9a-tlbip.s
index e153cd73d3763..9393388e66fa3 100644
--- a/llvm/test/MC/AArch64/armv9a-tlbip.s
+++ b/llvm/test/MC/AArch64/armv9a-tlbip.s
@@ -1,7 +1,11 @@
// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+d128,+tlb-rmi < %s \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+tlbid,+tlb-rmi -defsym TLBID_ONLY=1 < %s \
+// RUN: | FileCheck %s --check-prefixes=CHECK-TLBID
// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+tlb-rmi < %s 2>&1 \
// RUN: | FileCheck %s --check-prefixes=CHECK-ERROR
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+tlbid,+tlb-rmi < %s 2>&1 \
+// RUN: | FileCheck %s --check-prefixes=CHECK-NOT-TLBID
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+d128,+tlb-rmi < %s \
// RUN: | llvm-objdump -d --mattr=+d128,+tlb-rmi --no-print-imm-hex - | FileCheck %s --check-prefix=CHECK-INST
// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+d128,+tlb-rmi < %s \
@@ -12,737 +16,898 @@
// RUN: | llvm-mc -triple=aarch64 -mattr=+d128,+tlb-rmi -disassemble -show-encoding \
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// Only check assembly with +tlbid for instructions that match tlbip *e{1,2}[io]s*
+// Errors (for when +tlbid is not allowed) are checked in CHECK-NOT-TLBID
+.ifndef TLBID_ONLY
+ .set TLBID_ONLY, 0
+.endif
+
// +d128 required for tlbip
+// +d128 or +tlbid required for tlbip *e{1,2}[io]s*
// +tbl-rmi required for RIPA*/RVA*
+.if !TLBID_ONLY
tlbip IPAS2E1, x4, x5
// CHECK-INST: tlbip ipas2e1, x4, x5
// CHECK-ENCODING: encoding: [0x24,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c8424 sysp #4, c8, c4, #1, x4, x5
tlbip IPAS2E1NXS, x4, x5
// CHECK-INST: tlbip ipas2e1nxs, x4, x5
// CHECK-ENCODING: encoding: [0x24,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c9424 sysp #4, c9, c4, #1, x4, x5
+.endif
tlbip IPAS2E1IS, x4, x5
// CHECK-INST: tlbip ipas2e1is, x4, x5
+// CHECK-TLBID: tlbip ipas2e1is, x4, x5
// CHECK-ENCODING: encoding: [0x24,0x80,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8024 sysp #4, c8, c0, #1, x4, x5
tlbip IPAS2E1ISNXS, x4, x5
// CHECK-INST: tlbip ipas2e1isnxs, x4, x5
+// CHECK-TLBID: tlbip ipas2e1isnxs, x4, x5
// CHECK-ENCODING: encoding: [0x24,0x90,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9024 sysp #4, c9, c0, #1, x4, x5
tlbip IPAS2E1OS, x4, x5
// CHECK-INST: tlbip ipas2e1os, x4, x5
+// CHECK-TLBID: tlbip ipas2e1os, x4, x5
// CHECK-ENCODING: encoding: [0x04,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8404 sysp #4, c8, c4, #0, x4, x5
tlbip IPAS2E1OSNXS, x4, x5
// CHECK-INST: tlbip ipas2e1osnxs, x4, x5
+// CHECK-TLBID: tlbip ipas2e1osnxs, x4, x5
// CHECK-ENCODING: encoding: [0x04,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9404 sysp #4, c9, c4, #0, x4, x5
+.if !TLBID_ONLY
tlbip IPAS2LE1, x4, x5
// CHECK-INST: tlbip ipas2le1, x4, x5
// CHECK-ENCODING: encoding: [0xa4,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c84a4 sysp #4, c8, c4, #5, x4, x5
tlbip IPAS2LE1NXS, x4, x5
// CHECK-INST: tlbip ipas2le1nxs, x4, x5
// CHECK-ENCODING: encoding: [0xa4,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c94a4 sysp #4, c9, c4, #5, x4, x5
+.endif
tlbip IPAS2LE1IS, x4, x5
// CHECK-INST: tlbip ipas2le1is, x4, x5
+// CHECK-TLBID: tlbip ipas2le1is, x4, x5
// CHECK-ENCODING: encoding: [0xa4,0x80,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c80a4 sysp #4, c8, c0, #5, x4, x5
tlbip IPAS2LE1ISNXS, x4, x5
// CHECK-INST: tlbip ipas2le1isnxs, x4, x5
+// CHECK-TLBID: tlbip ipas2le1isnxs, x4, x5
// CHECK-ENCODING: encoding: [0xa4,0x90,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c90a4 sysp #4, c9, c0, #5, x4, x5
tlbip IPAS2LE1OS, x4, x5
// CHECK-INST: tlbip ipas2le1os, x4, x5
+// CHECK-TLBID: tlbip ipas2le1os, x4, x5
// CHECK-ENCODING: encoding: [0x84,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8484 sysp #4, c8, c4, #4, x4, x5
tlbip IPAS2LE1OSNXS, x4, x5
// CHECK-INST: tlbip ipas2le1osnxs, x4, x5
+// CHECK-TLBID: tlbip ipas2le1osnxs, x4, x5
// CHECK-ENCODING: encoding: [0x84,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9484 sysp #4, c9, c4, #4, x4, x5
+.if !TLBID_ONLY
tlbip VAE1, x8, x9
// CHECK-INST: tlbip vae1, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x87,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5488728 sysp #0, c8, c7, #1, x8, x9
tlbip VAE1NXS, x8, x9
// CHECK-INST: tlbip vae1nxs, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x97,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5489728 sysp #0, c9, c7, #1, x8, x9
+.endif
tlbip VAE1IS, x8, x9
// CHECK-INST: tlbip vae1is, x8, x9
+// CHECK-TLBID: tlbip vae1is, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x83,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488328 sysp #0, c8, c3, #1, x8, x9
tlbip VAE1ISNXS, x8, x9
// CHECK-INST: tlbip vae1isnxs, x8, x9
+// CHECK-TLBID: tlbip vae1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x93,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489328 sysp #0, c9, c3, #1, x8, x9
tlbip VAE1OS, x8, x9
// CHECK-INST: tlbip vae1os, x8, x9
+// CHECK-TLBID: tlbip vae1os, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x81,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488128 sysp #0, c8, c1, #1, x8, x9
tlbip VAE1OSNXS, x8, x9
// CHECK-INST: tlbip vae1osnxs, x8, x9
+// CHECK-TLBID: tlbip vae1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0x28,0x91,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489128 sysp #0, c9, c1, #1, x8, x9
+.if !TLBID_ONLY
tlbip VALE1, x8, x9
// CHECK-INST: tlbip vale1, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x87,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54887a8 sysp #0, c8, c7, #5, x8, x9
tlbip VALE1NXS, x8, x9
// CHECK-INST: tlbip vale1nxs, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x97,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54897a8 sysp #0, c9, c7, #5, x8, x9
+.endif
tlbip VALE1IS, x8, x9
// CHECK-INST: tlbip vale1is, x8, x9
+// CHECK-TLBID: tlbip vale1is, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x83,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54883a8 sysp #0, c8, c3, #5, x8, x9
tlbip VALE1ISNXS, x8, x9
// CHECK-INST: tlbip vale1isnxs, x8, x9
+// CHECK-TLBID: tlbip vale1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x93,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54893a8 sysp #0, c9, c3, #5, x8, x9
tlbip VALE1OS, x8, x9
// CHECK-INST: tlbip vale1os, x8, x9
+// CHECK-TLBID: tlbip vale1os, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x81,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54881a8 sysp #0, c8, c1, #5, x8, x9
tlbip VALE1OSNXS, x8, x9
// CHECK-INST: tlbip vale1osnxs, x8, x9
+// CHECK-TLBID: tlbip vale1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0xa8,0x91,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54891a8 sysp #0, c9, c1, #5, x8, x9
+.if !TLBID_ONLY
tlbip VAAE1, x8, x9
// CHECK-INST: tlbip vaae1, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x87,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5488768 sysp #0, c8, c7, #3, x8, x9
tlbip VAAE1NXS, x8, x9
// CHECK-INST: tlbip vaae1nxs, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x97,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5489768 sysp #0, c9, c7, #3, x8, x9
+.endif
tlbip VAAE1IS, x8, x9
// CHECK-INST: tlbip vaae1is, x8, x9
+// CHECK-TLBID: tlbip vaae1is, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x83,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488368 sysp #0, c8, c3, #3, x8, x9
tlbip VAAE1ISNXS, x8, x9
// CHECK-INST: tlbip vaae1isnxs, x8, x9
+// CHECK-TLBID: tlbip vaae1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x93,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489368 sysp #0, c9, c3, #3, x8, x9
tlbip VAAE1OS, x8, x9
// CHECK-INST: tlbip vaae1os, x8, x9
+// CHECK-TLBID: tlbip vaae1os, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x81,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488168 sysp #0, c8, c1, #3, x8, x9
tlbip VAAE1OSNXS, x8, x9
// CHECK-INST: tlbip vaae1osnxs, x8, x9
+// CHECK-TLBID: tlbip vaae1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0x68,0x91,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489168 sysp #0, c9, c1, #3, x8, x9
+.if !TLBID_ONLY
tlbip VAALE1, x8, x9
// CHECK-INST: tlbip vaale1, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x87,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54887e8 sysp #0, c8, c7, #7, x8, x9
tlbip VAALE1NXS, x8, x9
// CHECK-INST: tlbip vaale1nxs, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x97,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54897e8 sysp #0, c9, c7, #7, x8, x9
+.endif
tlbip VAALE1IS, x8, x9
// CHECK-INST: tlbip vaale1is, x8, x9
+// CHECK-TLBID: tlbip vaale1is, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x83,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54883e8 sysp #0, c8, c3, #7, x8, x9
tlbip VAALE1ISNXS, x8, x9
// CHECK-INST: tlbip vaale1isnxs, x8, x9
+// CHECK-TLBID: tlbip vaale1isnxs, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x93,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54893e8 sysp #0, c9, c3, #7, x8, x9
tlbip VAALE1OS, x8, x9
// CHECK-INST: tlbip vaale1os, x8, x9
+// CHECK-TLBID: tlbip vaale1os, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x81,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54881e8 sysp #0, c8, c1, #7, x8, x9
tlbip VAALE1OSNXS, x8, x9
// CHECK-INST: tlbip vaale1osnxs, x8, x9
+// CHECK-TLBID: tlbip vaale1osnxs, x8, x9
// CHECK-ENCODING: encoding: [0xe8,0x91,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54891e8 sysp #0, c9, c1, #7, x8, x9
+.if !TLBID_ONLY
tlbip VAE2, x14, x15
// CHECK-INST: tlbip vae2, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x87,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c872e sysp #4, c8, c7, #1, x14, x15
tlbip VAE2NXS, x14, x15
// CHECK-INST: tlbip vae2nxs, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x97,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c972e sysp #4, c9, c7, #1, x14, x15
+.endif
tlbip VAE2IS, x14, x15
// CHECK-INST: tlbip vae2is, x14, x15
+// CHECK-TLBID: tlbip vae2is, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x83,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c832e sysp #4, c8, c3, #1, x14, x15
tlbip VAE2ISNXS, x14, x15
// CHECK-INST: tlbip vae2isnxs, x14, x15
+// CHECK-TLBID: tlbip vae2isnxs, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x93,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c932e sysp #4, c9, c3, #1, x14, x15
tlbip VAE2OS, x14, x15
// CHECK-INST: tlbip vae2os, x14, x15
+// CHECK-TLBID: tlbip vae2os, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x81,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c812e sysp #4, c8, c1, #1, x14, x15
tlbip VAE2OSNXS, x14, x15
// CHECK-INST: tlbip vae2osnxs, x14, x15
+// CHECK-TLBID: tlbip vae2osnxs, x14, x15
// CHECK-ENCODING: encoding: [0x2e,0x91,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c912e sysp #4, c9, c1, #1, x14, x15
+.if !TLBID_ONLY
tlbip VALE2, x14, x15
// CHECK-INST: tlbip vale2, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x87,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c87ae sysp #4, c8, c7, #5, x14, x15
tlbip VALE2NXS, x14, x15
// CHECK-INST: tlbip vale2nxs, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x97,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c97ae sysp #4, c9, c7, #5, x14, x15
+.endif
tlbip VALE2IS, x14, x15
// CHECK-INST: tlbip vale2is, x14, x15
+// CHECK-TLBID: tlbip vale2is, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x83,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c83ae sysp #4, c8, c3, #5, x14, x15
tlbip VALE2ISNXS, x14, x15
// CHECK-INST: tlbip vale2isnxs, x14, x15
+// CHECK-TLBID: tlbip vale2isnxs, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x93,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c93ae sysp #4, c9, c3, #5, x14, x15
tlbip VALE2OS, x14, x15
// CHECK-INST: tlbip vale2os, x14, x15
+// CHECK-TLBID: tlbip vale2os, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x81,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c81ae sysp #4, c8, c1, #5, x14, x15
tlbip VALE2OSNXS, x14, x15
// CHECK-INST: tlbip vale2osnxs, x14, x15
+// CHECK-TLBID: tlbip vale2osnxs, x14, x15
// CHECK-ENCODING: encoding: [0xae,0x91,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c91ae sysp #4, c9, c1, #5, x14, x15
+.if !TLBID_ONLY
tlbip VAE3, x24, x25
// CHECK-INST: tlbip vae3, x24, x25
// CHECK-ENCODING: encoding: [0x38,0x87,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e8738 sysp #6, c8, c7, #1, x24, x25
tlbip VAE3NXS, x24, x25
// CHECK-INST: tlbip vae3nxs, x24, x25
// CHECK-ENCODING: encoding: [0x38,0x97,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e9738 sysp #6, c9, c7, #1, x24, x25
tlbip VAE3IS, x24, x25
// CHECK-INST: tlbip vae3is, x24, x25
// CHECK-ENCODING: encoding: [0x38,0x83,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e8338 sysp #6, c8, c3, #1, x24, x25
tlbip VAE3ISNXS, x24, x25
// CHECK-INST: tlbip vae3isnxs, x24, x25
// CHECK-ENCODING: encoding: [0x38,0x93,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e9338 sysp #6, c9, c3, #1, x24, x25
tlbip VAE3OS, x24, x25
// CHECK-INST: tlbip vae3os, x24, x25
// CHECK-ENCODING: encoding: [0x38,0x81,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e8138 sysp #6, c8, c1, #1, x24, x25
tlbip VAE3OSNXS, x24, x25
// CHECK-INST: tlbip vae3osnxs, x24, x25
// CHECK-ENCODING: encoding: [0x38,0x91,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e9138 sysp #6, c9, c1, #1, x24, x25
tlbip VALE3, x24, x25
// CHECK-INST: tlbip vale3, x24, x25
// CHECK-ENCODING: encoding: [0xb8,0x87,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e87b8 sysp #6, c8, c7, #5, x24, x25
tlbip VALE3NXS, x24, x25
// CHECK-INST: tlbip vale3nxs, x24, x25
// CHECK-ENCODING: encoding: [0xb8,0x97,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e97b8 sysp #6, c9, c7, #5, x24, x25
tlbip VALE3IS, x24, x25
// CHECK-INST: tlbip vale3is, x24, x25
// CHECK-ENCODING: encoding: [0xb8,0x83,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e83b8 sysp #6, c8, c3, #5, x24, x25
tlbip VALE3ISNXS, x24, x25
// CHECK-INST: tlbip vale3isnxs, x24, x25
// CHECK-ENCODING: encoding: [0xb8,0x93,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e93b8 sysp #6, c9, c3, #5, x24, x25
tlbip VALE3OS, x24, x25
// CHECK-INST: tlbip vale3os, x24, x25
// CHECK-ENCODING: encoding: [0xb8,0x81,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e81b8 sysp #6, c8, c1, #5, x24, x25
tlbip VALE3OSNXS, x24, x25
// CHECK-INST: tlbip vale3osnxs, x24, x25
// CHECK-ENCODING: encoding: [0xb8,0x91,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e91b8 sysp #6, c9, c1, #5, x24, x25
tlbip RVAE1, x18, x19
// CHECK-INST: tlbip rvae1, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x86,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5488632 sysp #0, c8, c6, #1, x18, x19
tlbip RVAE1NXS, x18, x19
// CHECK-INST: tlbip rvae1nxs, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x96,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5489632 sysp #0, c9, c6, #1, x18, x19
+.endif
tlbip RVAE1IS, x18, x19
// CHECK-INST: tlbip rvae1is, x18, x19
+// CHECK-TLBID: tlbip rvae1is, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x82,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488232 sysp #0, c8, c2, #1, x18, x19
tlbip RVAE1ISNXS, x18, x19
// CHECK-INST: tlbip rvae1isnxs, x18, x19
+// CHECK-TLBID: tlbip rvae1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x92,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489232 sysp #0, c9, c2, #1, x18, x19
tlbip RVAE1OS, x18, x19
// CHECK-INST: tlbip rvae1os, x18, x19
+// CHECK-TLBID: tlbip rvae1os, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x85,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488532 sysp #0, c8, c5, #1, x18, x19
tlbip RVAE1OSNXS, x18, x19
// CHECK-INST: tlbip rvae1osnxs, x18, x19
+// CHECK-TLBID: tlbip rvae1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0x32,0x95,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489532 sysp #0, c9, c5, #1, x18, x19
+.if !TLBID_ONLY
tlbip RVAAE1, x18, x19
// CHECK-INST: tlbip rvaae1, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x86,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5488672 sysp #0, c8, c6, #3, x18, x19
tlbip RVAAE1NXS, x18, x19
// CHECK-INST: tlbip rvaae1nxs, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x96,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d5489672 sysp #0, c9, c6, #3, x18, x19
+.endif
tlbip RVAAE1IS, x18, x19
// CHECK-INST: tlbip rvaae1is, x18, x19
+// CHECK-TLBID: tlbip rvaae1is, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x82,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488272 sysp #0, c8, c2, #3, x18, x19
tlbip RVAAE1ISNXS, x18, x19
// CHECK-INST: tlbip rvaae1isnxs, x18, x19
+// CHECK-TLBID: tlbip rvaae1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x92,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489272 sysp #0, c9, c2, #3, x18, x19
tlbip RVAAE1OS, x18, x19
// CHECK-INST: tlbip rvaae1os, x18, x19
+// CHECK-TLBID: tlbip rvaae1os, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x85,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5488572 sysp #0, c8, c5, #3, x18, x19
tlbip RVAAE1OSNXS, x18, x19
// CHECK-INST: tlbip rvaae1osnxs, x18, x19
+// CHECK-TLBID: tlbip rvaae1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0x72,0x95,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d5489572 sysp #0, c9, c5, #3, x18, x19
+.if !TLBID_ONLY
tlbip RVALE1, x18, x19
// CHECK-INST: tlbip rvale1, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x86,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54886b2 sysp #0, c8, c6, #5, x18, x19
tlbip RVALE1NXS, x18, x19
// CHECK-INST: tlbip rvale1nxs, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x96,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54896b2 sysp #0, c9, c6, #5, x18, x19
+.endif
tlbip RVALE1IS, x18, x19
// CHECK-INST: tlbip rvale1is, x18, x19
+// CHECK-TLBID: tlbip rvale1is, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x82,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54882b2 sysp #0, c8, c2, #5, x18, x19
tlbip RVALE1ISNXS, x18, x19
// CHECK-INST: tlbip rvale1isnxs, x18, x19
+// CHECK-TLBID: tlbip rvale1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x92,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54892b2 sysp #0, c9, c2, #5, x18, x19
tlbip RVALE1OS, x18, x19
// CHECK-INST: tlbip rvale1os, x18, x19
+// CHECK-TLBID: tlbip rvale1os, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x85,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54885b2 sysp #0, c8, c5, #5, x18, x19
tlbip RVALE1OSNXS, x18, x19
// CHECK-INST: tlbip rvale1osnxs, x18, x19
+// CHECK-TLBID: tlbip rvale1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0xb2,0x95,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54895b2 sysp #0, c9, c5, #5, x18, x19
+.if !TLBID_ONLY
tlbip RVAALE1, x18, x19
// CHECK-INST: tlbip rvaale1, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x86,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54886f2 sysp #0, c8, c6, #7, x18, x19
tlbip RVAALE1NXS, x18, x19
// CHECK-INST: tlbip rvaale1nxs, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x96,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54896f2 sysp #0, c9, c6, #7, x18, x19
+.endif
tlbip RVAALE1IS, x18, x19
// CHECK-INST: tlbip rvaale1is, x18, x19
+// CHECK-TLBID: tlbip rvaale1is, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x82,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54882f2 sysp #0, c8, c2, #7, x18, x19
tlbip RVAALE1ISNXS, x18, x19
// CHECK-INST: tlbip rvaale1isnxs, x18, x19
+// CHECK-TLBID: tlbip rvaale1isnxs, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x92,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54892f2 sysp #0, c9, c2, #7, x18, x19
tlbip RVAALE1OS, x18, x19
// CHECK-INST: tlbip rvaale1os, x18, x19
+// CHECK-TLBID: tlbip rvaale1os, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x85,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54885f2 sysp #0, c8, c5, #7, x18, x19
tlbip RVAALE1OSNXS, x18, x19
// CHECK-INST: tlbip rvaale1osnxs, x18, x19
+// CHECK-TLBID: tlbip rvaale1osnxs, x18, x19
// CHECK-ENCODING: encoding: [0xf2,0x95,0x48,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54895f2 sysp #0, c9, c5, #7, x18, x19
+.if !TLBID_ONLY
tlbip RVAE2, x28, x29
// CHECK-INST: tlbip rvae2, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x86,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c863c sysp #4, c8, c6, #1, x28, x29
tlbip RVAE2NXS, x28, x29
// CHECK-INST: tlbip rvae2nxs, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x96,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c963c sysp #4, c9, c6, #1, x28, x29
+.endif
tlbip RVAE2IS, x28, x29
// CHECK-INST: tlbip rvae2is, x28, x29
+// CHECK-TLBID: tlbip rvae2is, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x82,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c823c sysp #4, c8, c2, #1, x28, x29
tlbip RVAE2ISNXS, x28, x29
// CHECK-INST: tlbip rvae2isnxs, x28, x29
+// CHECK-TLBID: tlbip rvae2isnxs, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x92,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c923c sysp #4, c9, c2, #1, x28, x29
tlbip RVAE2OS, x28, x29
// CHECK-INST: tlbip rvae2os, x28, x29
+// CHECK-TLBID: tlbip rvae2os, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x85,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c853c sysp #4, c8, c5, #1, x28, x29
tlbip RVAE2OSNXS, x28, x29
// CHECK-INST: tlbip rvae2osnxs, x28, x29
+// CHECK-TLBID: tlbip rvae2osnxs, x28, x29
// CHECK-ENCODING: encoding: [0x3c,0x95,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c953c sysp #4, c9, c5, #1, x28, x29
+.if !TLBID_ONLY
tlbip RVALE2, x28, x29
// CHECK-INST: tlbip rvale2, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x86,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c86bc sysp #4, c8, c6, #5, x28, x29
tlbip RVALE2NXS, x28, x29
// CHECK-INST: tlbip rvale2nxs, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x96,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c96bc sysp #4, c9, c6, #5, x28, x29
+.endif
tlbip RVALE2IS, x28, x29
// CHECK-INST: tlbip rvale2is, x28, x29
+// CHECK-TLBID: tlbip rvale2is, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x82,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c82bc sysp #4, c8, c2, #5, x28, x29
tlbip RVALE2ISNXS, x28, x29
// CHECK-INST: tlbip rvale2isnxs, x28, x29
+// CHECK-TLBID: tlbip rvale2isnxs, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x92,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c92bc sysp #4, c9, c2, #5, x28, x29
tlbip RVALE2OS, x28, x29
// CHECK-INST: tlbip rvale2os, x28, x29
+// CHECK-TLBID: tlbip rvale2os, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x85,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c85bc sysp #4, c8, c5, #5, x28, x29
tlbip RVALE2OSNXS, x28, x29
// CHECK-INST: tlbip rvale2osnxs, x28, x29
+// CHECK-TLBID: tlbip rvale2osnxs, x28, x29
// CHECK-ENCODING: encoding: [0xbc,0x95,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c95bc sysp #4, c9, c5, #5, x28, x29
+.if !TLBID_ONLY
tlbip RVAE3, x10, x11
// CHECK-INST: tlbip rvae3, x10, x11
// CHECK-ENCODING: encoding: [0x2a,0x86,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e862a sysp #6, c8, c6, #1, x10, x11
tlbip RVAE3NXS, x10, x11
// CHECK-INST: tlbip rvae3nxs, x10, x11
// CHECK-ENCODING: encoding: [0x2a,0x96,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e962a sysp #6, c9, c6, #1, x10, x11
tlbip RVAE3IS, x10, x11
// CHECK-INST: tlbip rvae3is, x10, x11
// CHECK-ENCODING: encoding: [0x2a,0x82,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e822a sysp #6, c8, c2, #1, x10, x11
tlbip RVAE3ISNXS, x10, x11
// CHECK-INST: tlbip rvae3isnxs, x10, x11
// CHECK-ENCODING: encoding: [0x2a,0x92,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e922a sysp #6, c9, c2, #1, x10, x11
tlbip RVAE3OS, x10, x11
// CHECK-INST: tlbip rvae3os, x10, x11
// CHECK-ENCODING: encoding: [0x2a,0x85,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e852a sysp #6, c8, c5, #1, x10, x11
tlbip RVAE3OSNXS, x10, x11
// CHECK-INST: tlbip rvae3osnxs, x10, x11
// CHECK-ENCODING: encoding: [0x2a,0x95,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e952a sysp #6, c9, c5, #1, x10, x11
tlbip RVALE3, x10, x11
// CHECK-INST: tlbip rvale3, x10, x11
// CHECK-ENCODING: encoding: [0xaa,0x86,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e86aa sysp #6, c8, c6, #5, x10, x11
tlbip RVALE3NXS, x10, x11
// CHECK-INST: tlbip rvale3nxs, x10, x11
// CHECK-ENCODING: encoding: [0xaa,0x96,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e96aa sysp #6, c9, c6, #5, x10, x11
tlbip RVALE3IS, x10, x11
// CHECK-INST: tlbip rvale3is, x10, x11
// CHECK-ENCODING: encoding: [0xaa,0x82,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e82aa sysp #6, c8, c2, #5, x10, x11
tlbip RVALE3ISNXS, x10, x11
// CHECK-INST: tlbip rvale3isnxs, x10, x11
// CHECK-ENCODING: encoding: [0xaa,0x92,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e92aa sysp #6, c9, c2, #5, x10, x11
tlbip RVALE3OS, x10, x11
// CHECK-INST: tlbip rvale3os, x10, x11
// CHECK-ENCODING: encoding: [0xaa,0x85,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e85aa sysp #6, c8, c5, #5, x10, x11
tlbip RVALE3OSNXS, x10, x11
// CHECK-INST: tlbip rvale3osnxs, x10, x11
// CHECK-ENCODING: encoding: [0xaa,0x95,0x4e,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54e95aa sysp #6, c9, c5, #5, x10, x11
tlbip RIPAS2E1, x20, x21
// CHECK-INST: tlbip ripas2e1, x20, x21
// CHECK-ENCODING: encoding: [0x54,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c8454 sysp #4, c8, c4, #2, x20, x21
tlbip RIPAS2E1NXS, x20, x21
// CHECK-INST: tlbip ripas2e1nxs, x20, x21
// CHECK-ENCODING: encoding: [0x54,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c9454 sysp #4, c9, c4, #2, x20, x21
+.endif
tlbip RIPAS2E1IS, x20, x21
// CHECK-INST: tlbip ripas2e1is, x20, x21
+// CHECK-TLBID: tlbip ripas2e1is, x20, x21
// CHECK-ENCODING: encoding: [0x54,0x80,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8054 sysp #4, c8, c0, #2, x20, x21
tlbip RIPAS2E1ISNXS, x20, x21
// CHECK-INST: tlbip ripas2e1isnxs, x20, x21
+// CHECK-TLBID: tlbip ripas2e1isnxs, x20, x21
// CHECK-ENCODING: encoding: [0x54,0x90,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9054 sysp #4, c9, c0, #2, x20, x21
tlbip RIPAS2E1OS, x20, x21
// CHECK-INST: tlbip ripas2e1os, x20, x21
+// CHECK-TLBID: tlbip ripas2e1os, x20, x21
// CHECK-ENCODING: encoding: [0x74,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c8474 sysp #4, c8, c4, #3, x20, x21
tlbip RIPAS2E1OSNXS, x20, x21
// CHECK-INST: tlbip ripas2e1osnxs, x20, x21
+// CHECK-TLBID: tlbip ripas2e1osnxs, x20, x21
// CHECK-ENCODING: encoding: [0x74,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c9474 sysp #4, c9, c4, #3, x20, x21
+.if !TLBID_ONLY
tlbip RIPAS2LE1, x20, x21
// CHECK-INST: tlbip ripas2le1, x20, x21
// CHECK-ENCODING: encoding: [0xd4,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c84d4 sysp #4, c8, c4, #6, x20, x21
tlbip RIPAS2LE1NXS, x20, x21
// CHECK-INST: tlbip ripas2le1nxs, x20, x21
// CHECK-ENCODING: encoding: [0xd4,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: d128
+// CHECK-NOT-TLBID: error: instruction requires: d128
// CHECK-UNKNOWN: d54c94d4 sysp #4, c9, c4, #6, x20, x21
+.endif
tlbip RIPAS2LE1IS, x20, x21
// CHECK-INST: tlbip ripas2le1is, x20, x21
+// CHECK-TLBID: tlbip ripas2le1is, x20, x21
// CHECK-ENCODING: encoding: [0xd4,0x80,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c80d4 sysp #4, c8, c0, #6, x20, x21
tlbip RIPAS2LE1ISNXS, x20, x21
// CHECK-INST: tlbip ripas2le1isnxs, x20, x21
+// CHECK-TLBID: tlbip ripas2le1isnxs, x20, x21
// CHECK-ENCODING: encoding: [0xd4,0x90,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c90d4 sysp #4, c9, c0, #6, x20, x21
tlbip RIPAS2LE1OS, x20, x21
// CHECK-INST: tlbip ripas2le1os, x20, x21
+// CHECK-TLBID: tlbip ripas2le1os, x20, x21
// CHECK-ENCODING: encoding: [0xf4,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c84f4 sysp #4, c8, c4, #7, x20, x21
tlbip RIPAS2LE1OSNXS, x20, x21
// CHECK-INST: tlbip ripas2le1osnxs, x20, x21
+// CHECK-TLBID: tlbip ripas2le1osnxs, x20, x21
// CHECK-ENCODING: encoding: [0xf4,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c94f4 sysp #4, c9, c4, #7, x20, x21
tlbip RIPAS2LE1OS, xzr, xzr
// CHECK-INST: tlbip ripas2le1os, xzr, xzr
+// CHECK-TLBID: tlbip ripas2le1os, xzr, xzr
// CHECK-ENCODING: encoding: [0xff,0x84,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c84ff sysp #4, c8, c4, #7
tlbip RIPAS2LE1OSNXS, xzr, xzr
// CHECK-INST: tlbip ripas2le1osnxs, xzr, xzr
+// CHECK-TLBID: tlbip ripas2le1osnxs, xzr, xzr
// CHECK-ENCODING: encoding: [0xff,0x94,0x4c,0xd5]
// CHECK-ERROR: error: instruction requires: tlbid or d128
// CHECK-UNKNOWN: d54c94ff sysp #4, c9, c4, #7
diff --git a/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s b/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s
deleted file mode 100644
index 0361fbcc73d4b..0000000000000
--- a/llvm/test/MC/AArch64/tlbip-tlbid-or-d128.s
+++ /dev/null
@@ -1,259 +0,0 @@
-// NOTE: These TLBIP forms are valid with either +tlbid or +d128.
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+tlbid,+tlb-rmi,+xs < %s | FileCheck %s --check-prefix=TLBID
-// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+d128,+tlb-rmi,+xs < %s | FileCheck %s --check-prefix=D128
-
-tlbip VAE1OS, x0, x1
-// TLBID: tlbip vae1os, x0, x1
-// D128: tlbip vae1os, x0, x1
-
-tlbip VAAE1OS, x0, x1
-// TLBID: tlbip vaae1os, x0, x1
-// D128: tlbip vaae1os, x0, x1
-
-tlbip VALE1OS, x0, x1
-// TLBID: tlbip vale1os, x0, x1
-// D128: tlbip vale1os, x0, x1
-
-tlbip VAALE1OS, x0, x1
-// TLBID: tlbip vaale1os, x0, x1
-// D128: tlbip vaale1os, x0, x1
-
-tlbip RVAE1IS, x0, x1
-// TLBID: tlbip rvae1is, x0, x1
-// D128: tlbip rvae1is, x0, x1
-
-tlbip RVAAE1IS, x0, x1
-// TLBID: tlbip rvaae1is, x0, x1
-// D128: tlbip rvaae1is, x0, x1
-
-tlbip RVALE1IS, x0, x1
-// TLBID: tlbip rvale1is, x0, x1
-// D128: tlbip rvale1is, x0, x1
-
-tlbip RVAALE1IS, x0, x1
-// TLBID: tlbip rvaale1is, x0, x1
-// D128: tlbip rvaale1is, x0, x1
-
-tlbip VAE1IS, x0, x1
-// TLBID: tlbip vae1is, x0, x1
-// D128: tlbip vae1is, x0, x1
-
-tlbip VAAE1IS, x0, x1
-// TLBID: tlbip vaae1is, x0, x1
-// D128: tlbip vaae1is, x0, x1
-
-tlbip VALE1IS, x0, x1
-// TLBID: tlbip vale1is, x0, x1
-// D128: tlbip vale1is, x0, x1
-
-tlbip VAALE1IS, x0, x1
-// TLBID: tlbip vaale1is, x0, x1
-// D128: tlbip vaale1is, x0, x1
-
-tlbip RVAE1OS, x0, x1
-// TLBID: tlbip rvae1os, x0, x1
-// D128: tlbip rvae1os, x0, x1
-
-tlbip RVAAE1OS, x0, x1
-// TLBID: tlbip rvaae1os, x0, x1
-// D128: tlbip rvaae1os, x0, x1
-
-tlbip RVALE1OS, x0, x1
-// TLBID: tlbip rvale1os, x0, x1
-// D128: tlbip rvale1os, x0, x1
-
-tlbip RVAALE1OS, x0, x1
-// TLBID: tlbip rvaale1os, x0, x1
-// D128: tlbip rvaale1os, x0, x1
-
-tlbip VAE1OSNXS, x0, x1
-// TLBID: tlbip vae1osnxs, x0, x1
-// D128: tlbip vae1osnxs, x0, x1
-
-tlbip VAAE1OSNXS, x0, x1
-// TLBID: tlbip vaae1osnxs, x0, x1
-// D128: tlbip vaae1osnxs, x0, x1
-
-tlbip VALE1OSNXS, x0, x1
-// TLBID: tlbip vale1osnxs, x0, x1
-// D128: tlbip vale1osnxs, x0, x1
-
-tlbip VAALE1OSNXS, x0, x1
-// TLBID: tlbip vaale1osnxs, x0, x1
-// D128: tlbip vaale1osnxs, x0, x1
-
-tlbip RVAE1ISNXS, x0, x1
-// TLBID: tlbip rvae1isnxs, x0, x1
-// D128: tlbip rvae1isnxs, x0, x1
-
-tlbip RVAAE1ISNXS, x0, x1
-// TLBID: tlbip rvaae1isnxs, x0, x1
-// D128: tlbip rvaae1isnxs, x0, x1
-
-tlbip RVALE1ISNXS, x0, x1
-// TLBID: tlbip rvale1isnxs, x0, x1
-// D128: tlbip rvale1isnxs, x0, x1
-
-tlbip RVAALE1ISNXS, x0, x1
-// TLBID: tlbip rvaale1isnxs, x0, x1
-// D128: tlbip rvaale1isnxs, x0, x1
-
-tlbip VAE1ISNXS, x0, x1
-// TLBID: tlbip vae1isnxs, x0, x1
-// D128: tlbip vae1isnxs, x0, x1
-
-tlbip VAAE1ISNXS, x0, x1
-// TLBID: tlbip vaae1isnxs, x0, x1
-// D128: tlbip vaae1isnxs, x0, x1
-
-tlbip VALE1ISNXS, x0, x1
-// TLBID: tlbip vale1isnxs, x0, x1
-// D128: tlbip vale1isnxs, x0, x1
-
-tlbip VAALE1ISNXS, x0, x1
-// TLBID: tlbip vaale1isnxs, x0, x1
-// D128: tlbip vaale1isnxs, x0, x1
-
-tlbip RVAE1OSNXS, x0, x1
-// TLBID: tlbip rvae1osnxs, x0, x1
-// D128: tlbip rvae1osnxs, x0, x1
-
-tlbip RVAAE1OSNXS, x0, x1
-// TLBID: tlbip rvaae1osnxs, x0, x1
-// D128: tlbip rvaae1osnxs, x0, x1
-
-tlbip RVALE1OSNXS, x0, x1
-// TLBID: tlbip rvale1osnxs, x0, x1
-// D128: tlbip rvale1osnxs, x0, x1
-
-tlbip RVAALE1OSNXS, x0, x1
-// TLBID: tlbip rvaale1osnxs, x0, x1
-// D128: tlbip rvaale1osnxs, x0, x1
-
-tlbip IPAS2E1IS, x0, x1
-// TLBID: tlbip ipas2e1is, x0, x1
-// D128: tlbip ipas2e1is, x0, x1
-
-tlbip RIPAS2E1IS, x0, x1
-// TLBID: tlbip ripas2e1is, x0, x1
-// D128: tlbip ripas2e1is, x0, x1
-
-tlbip IPAS2LE1IS, x0, x1
-// TLBID: tlbip ipas2le1is, x0, x1
-// D128: tlbip ipas2le1is, x0, x1
-
-tlbip RIPAS2LE1IS, x0, x1
-// TLBID: tlbip ripas2le1is, x0, x1
-// D128: tlbip ripas2le1is, x0, x1
-
-tlbip VAE2OS, x0, x1
-// TLBID: tlbip vae2os, x0, x1
-// D128: tlbip vae2os, x0, x1
-
-tlbip VALE2OS, x0, x1
-// TLBID: tlbip vale2os, x0, x1
-// D128: tlbip vale2os, x0, x1
-
-tlbip RVAE2IS, x0, x1
-// TLBID: tlbip rvae2is, x0, x1
-// D128: tlbip rvae2is, x0, x1
-
-tlbip RVALE2IS, x0, x1
-// TLBID: tlbip rvale2is, x0, x1
-// D128: tlbip rvale2is, x0, x1
-
-tlbip VAE2IS, x0, x1
-// TLBID: tlbip vae2is, x0, x1
-// D128: tlbip vae2is, x0, x1
-
-tlbip VALE2IS, x0, x1
-// TLBID: tlbip vale2is, x0, x1
-// D128: tlbip vale2is, x0, x1
-
-tlbip IPAS2E1OS, x0, x1
-// TLBID: tlbip ipas2e1os, x0, x1
-// D128: tlbip ipas2e1os, x0, x1
-
-tlbip RIPAS2E1OS, x0, x1
-// TLBID: tlbip ripas2e1os, x0, x1
-// D128: tlbip ripas2e1os, x0, x1
-
-tlbip IPAS2LE1OS, x0, x1
-// TLBID: tlbip ipas2le1os, x0, x1
-// D128: tlbip ipas2le1os, x0, x1
-
-tlbip RIPAS2LE1OS, x0, x1
-// TLBID: tlbip ripas2le1os, x0, x1
-// D128: tlbip ripas2le1os, x0, x1
-
-tlbip RVAE2OS, x0, x1
-// TLBID: tlbip rvae2os, x0, x1
-// D128: tlbip rvae2os, x0, x1
-
-tlbip RVALE2OS, x0, x1
-// TLBID: tlbip rvale2os, x0, x1
-// D128: tlbip rvale2os, x0, x1
-
-tlbip IPAS2E1ISNXS, x0, x1
-// TLBID: tlbip ipas2e1isnxs, x0, x1
-// D128: tlbip ipas2e1isnxs, x0, x1
-
-tlbip RIPAS2E1ISNXS, x0, x1
-// TLBID: tlbip ripas2e1isnxs, x0, x1
-// D128: tlbip ripas2e1isnxs, x0, x1
-
-tlbip IPAS2LE1ISNXS, x0, x1
-// TLBID: tlbip ipas2le1isnxs, x0, x1
-// D128: tlbip ipas2le1isnxs, x0, x1
-
-tlbip RIPAS2LE1ISNXS, x0, x1
-// TLBID: tlbip ripas2le1isnxs, x0, x1
-// D128: tlbip ripas2le1isnxs, x0, x1
-
-tlbip VAE2OSNXS, x0, x1
-// TLBID: tlbip vae2osnxs, x0, x1
-// D128: tlbip vae2osnxs, x0, x1
-
-tlbip VALE2OSNXS, x0, x1
-// TLBID: tlbip vale2osnxs, x0, x1
-// D128: tlbip vale2osnxs, x0, x1
-
-tlbip RVAE2ISNXS, x0, x1
-// TLBID: tlbip rvae2isnxs, x0, x1
-// D128: tlbip rvae2isnxs, x0, x1
-
-tlbip RVALE2ISNXS, x0, x1
-// TLBID: tlbip rvale2isnxs, x0, x1
-// D128: tlbip rvale2isnxs, x0, x1
-
-tlbip VAE2ISNXS, x0, x1
-// TLBID: tlbip vae2isnxs, x0, x1
-// D128: tlbip vae2isnxs, x0, x1
-
-tlbip VALE2ISNXS, x0, x1
-// TLBID: tlbip vale2isnxs, x0, x1
-// D128: tlbip vale2isnxs, x0, x1
-
-tlbip IPAS2E1OSNXS, x0, x1
-// TLBID: tlbip ipas2e1osnxs, x0, x1
-// D128: tlbip ipas2e1osnxs, x0, x1
-
-tlbip RIPAS2E1OSNXS, x0, x1
-// TLBID: tlbip ripas2e1osnxs, x0, x1
-// D128: tlbip ripas2e1osnxs, x0, x1
-
-tlbip IPAS2LE1OSNXS, x0, x1
-// TLBID: tlbip ipas2le1osnxs, x0, x1
-// D128: tlbip ipas2le1osnxs, x0, x1
-
-tlbip RIPAS2LE1OSNXS, x0, x1
-// TLBID: tlbip ripas2le1osnxs, x0, x1
-// D128: tlbip ripas2le1osnxs, x0, x1
-
-tlbip RVAE2OSNXS, x0, x1
-// TLBID: tlbip rvae2osnxs, x0, x1
-// D128: tlbip rvae2osnxs, x0, x1
-
-tlbip RVALE2OSNXS, x0, x1
-// TLBID: tlbip rvale2osnxs, x0, x1
-// D128: tlbip rvale2osnxs, x0, x1
>From 4da30173ebcb1df0674731d24d136df66819970a Mon Sep 17 00:00:00 2001
From: Jonathan Thackray <jonathan.thackray at arm.com>
Date: Tue, 10 Mar 2026 01:10:19 +0000
Subject: [PATCH 5/5] fixup! More optimisations
---
.../Target/AArch64/AArch64SystemOperands.td | 48 ++++++++-----------
.../AArch64/AsmParser/AArch64AsmParser.cpp | 21 ++++----
.../Target/AArch64/Utils/AArch64BaseInfo.h | 9 +---
3 files changed, 32 insertions(+), 46 deletions(-)
diff --git a/llvm/lib/Target/AArch64/AArch64SystemOperands.td b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
index 1b3db6f2d3c65..fc2c95999e5d3 100644
--- a/llvm/lib/Target/AArch64/AArch64SystemOperands.td
+++ b/llvm/lib/Target/AArch64/AArch64SystemOperands.td
@@ -857,7 +857,7 @@ def : TIndex<"nb", 0b1>;
//===----------------------------------------------------------------------===//
class TLBICommon<string name, bits<3> op1, bits<4> crn, bits<4> crm,
- bits<3> op2, bit needsreg, bit optionalreg, bit allowTLBID> {
+ bits<3> op2, bit needsreg, bit optionalreg> {
string Name = name;
bits<14> Encoding;
let Encoding{13-11} = op1;
@@ -866,7 +866,6 @@ class TLBICommon<string name, bits<3> op1, bits<4> crn, bits<4> crm,
let Encoding{2-0} = op2;
bit NeedsReg = needsreg;
bit OptionalReg = optionalreg;
- bit d128orTLBID = allowTLBID;
list<string> Requires = [];
list<string> ExtraRequires = [];
code RequiresStr = [{ { }] # !interleave(Requires # ExtraRequires, [{, }]) # [{ } }];
@@ -874,34 +873,19 @@ class TLBICommon<string name, bits<3> op1, bits<4> crn, bits<4> crm,
class TLBIEntry<string name, bits<3> op1, bits<4> crn, bits<4> crm,
bits<3> op2, bit needsreg, bit optionalreg>
- : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg, 0>;
+ : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg>;
class TLBIPEntry<string name, bits<3> op1, bits<4> crn, bits<4> crm,
bits<3> op2, bit needsreg, bit optionalreg, bit allowTLBID>
- : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg, allowTLBID>;
-
-multiclass TLBITableBase {
- def NAME # Table : GenericTable {
- let FilterClass = NAME # "Entry";
- let CppTypeName = NAME;
- let Fields = ["Name", "Encoding", "NeedsReg", "OptionalReg", "RequiresStr"];
- let PrimaryKey = ["Encoding"];
- let PrimaryKeyName = "lookup" # NAME # "ByEncoding";
- }
- def lookup # NAME # ByName : SearchIndex {
- let Table = !cast<GenericTable>(NAME # "Table");
- let Key = ["Name"];
- }
+ : TLBICommon<name, op1, crn, crm, op2, needsreg, optionalreg> {
+ bit d128orTLBID = allowTLBID;
}
-defm TLBI : TLBITableBase;
-
-multiclass TLBIPTableBase {
+multiclass TLBITableBase<list<string> fields> {
def NAME # Table : GenericTable {
let FilterClass = NAME # "Entry";
let CppTypeName = NAME;
- let Fields = ["Name", "Encoding", "NeedsReg", "OptionalReg", "RequiresStr",
- "d128orTLBID"];
+ let Fields = fields;
let PrimaryKey = ["Encoding"];
let PrimaryKeyName = "lookup" # NAME # "ByEncoding";
}
@@ -911,23 +895,33 @@ multiclass TLBIPTableBase {
}
}
-defm TLBIP : TLBIPTableBase;
+defm TLBI : TLBITableBase<
+ ["Name", "Encoding", "NeedsReg", "OptionalReg", "RequiresStr"]>;
+defm TLBIP : TLBITableBase<
+ ["Name", "Encoding", "NeedsReg", "OptionalReg", "RequiresStr",
+ "d128orTLBID"]>;
multiclass TLBI<string name, bit hasTLBIP, bits<3> op1, bits<4> crn, bits<4> crm,
bits<3> op2, bit needsreg = 1, bit optionalreg = 0> {
+ // These TLBIP aliases accept either FEAT_D128 or FEAT_TLBID.
defvar allowTLBID = !match(name, ".*E[12][IO]S.*");
+ defvar tlbipExtraRequires =
+ !if(allowTLBID, []<string>, ["AArch64::FeatureD128"]);
+
def : TLBIEntry<name, op1, crn, crm, op2, needsreg, optionalreg>;
def : TLBIEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg> {
let Encoding{7} = 1;
let ExtraRequires = ["AArch64::FeatureXS"];
}
if !eq(hasTLBIP, true) then {
- def : TLBIPEntry<name, op1, crn, crm, op2, needsreg, optionalreg, allowTLBID> {
- let ExtraRequires = ["AArch64::FeatureD128"];
+ def : TLBIPEntry<name, op1, crn, crm, op2, needsreg, optionalreg,
+ allowTLBID> {
+ let ExtraRequires = tlbipExtraRequires;
}
- def : TLBIPEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg, optionalreg, allowTLBID> {
+ def : TLBIPEntry<!strconcat(name, "nXS"), op1, crn, crm, op2, needsreg,
+ optionalreg, allowTLBID> {
let Encoding{7} = 1;
- let ExtraRequires = ["AArch64::FeatureD128"];
+ let ExtraRequires = tlbipExtraRequires;
}
}
}
diff --git a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 48d2d14f76e1a..3480fea3bfff5 100644
--- a/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -4268,21 +4268,20 @@ bool AArch64AsmParser::parseSyspAlias(StringRef Name, SMLoc NameLoc,
if (!TLBIP->haveFeatures(getSTI().getFeatureBits())) {
FeatureBitset Active = getSTI().getFeatureBits();
FeatureBitset Missing = TLBIP->getRequiredFeatures() & ~Active;
- bool NeedOrTLBID = false;
- if (TLBIP->d128orTLBID) {
- Missing &= ~AArch64TLBIP::TLBIP::D128OrTLBIDMask;
- NeedOrTLBID =
- !(Active[AArch64::FeatureD128] || Active[AArch64::FeatureTLBID]);
- }
+ bool NeedD128OrTLBID =
+ TLBIP->allowTLBID() &&
+ !(Active[AArch64::FeatureD128] || Active[AArch64::FeatureTLBID]);
+
std::string Str("instruction requires: ");
- if (Missing.none()) {
+ if (Missing.any())
+ setRequiredFeatureString(Missing, Str);
+
+ if (NeedD128OrTLBID) {
+ if (Missing.any())
+ Str += ", ";
Str += "tlbid or d128";
- return TokError(Str);
}
- setRequiredFeatureString(Missing, Str);
- if (NeedOrTLBID)
- Str += ", tlbid or d128";
return TokError(Str);
}
createSysAlias(TLBIP->Encoding, Operands, S);
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
index 0e00dd80afcab..b012b35bcb5ff 100644
--- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
+++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
@@ -465,14 +465,7 @@ struct TLBIPSysAlias : SysAliasOptionalReg {
bool allowTLBID() const { return d128orTLBID; }
bool haveFeatures(FeatureBitset ActiveFeatures) const {
- if (ActiveFeatures[llvm::AArch64::FeatureAll])
- return true;
-
- FeatureBitset Required = FeaturesRequired;
- if (d128orTLBID)
- Required &= ~D128OrTLBIDMask;
-
- return (Required & ActiveFeatures) == Required &&
+ return SysAliasOptionalReg::haveFeatures(ActiveFeatures) &&
(!d128orTLBID || ActiveFeatures[llvm::AArch64::FeatureD128] ||
ActiveFeatures[llvm::AArch64::FeatureTLBID]);
}
More information about the llvm-commits
mailing list