[llvm] [AArch64] Allocate two emergency spill slots for MTE to fix register … (PR #186505)

[Florian Mayer via llvm-commits]

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@@ -2726,18 +2730,44 @@ void AArch64FrameLowering::determineCalleeSaves(MachineFunction &MF,
       }
     }
 
-    // If we didn't find an extra callee-saved register to spill, create
-    // an emergency spill slot.
-    if (!ExtraCSSpill || MF.getRegInfo().isPhysRegUsed(ExtraCSSpill)) {
-      const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
+    auto CreateEmergencySpillSlot = [&RS, &MFI](const TargetRegisterInfo *TRI) {
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fmayer wrote:

can this just take the MF and RS instead, then we could make it a freestanding function

https://github.com/llvm/llvm-project/pull/186505