The Week Of Monday 5 January 2026 Archives by author

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Starting: Mon Jan 5 00:02:39 PST 2026
Ending: Fri Jan 9 06:13:19 PST 2026
Messages: 4574

• [llvm] [cmake] Make CMAKE_BUILD_TYPE=Release the default (PR #174520)   Aaron Ballman via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Abel Bernabeu via llvm-commits
• [clang] [llvm] [OpenMP] Preserve the original address when `use_device_ptr/addr` lookup fails. (PR #174659)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [OpenMP] Preserve the original address when `use_device_ptr/addr` lookup fails. (PR #174659)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [OpenMP] Preserve the original address when `use_device_ptr/addr` lookup fails. (PR #169438)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [OpenMP] Preserve the original address when `use_device_ptr/addr` lookup fails. (PR #169438)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [OpenMP] Preserve the original address when `use_device_ptr/addr` lookup fails. (PR #169438)   Abhinav Gaba via llvm-commits
• [clang] [llvm] [OpenMP] Preserve the original address when `use_device_ptr/addr` lookup fails. (PR #174659)   Abhinav Gaba via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   Abhiram Jampani via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   Abhiram Jampani via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   Abhiram Jampani via llvm-commits
• [llvm] [CMake] Re-add -fno-rtti to llvm-config --cxxflags (PR #174084)   Abhishek Varma via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   Adam Yang via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   Adam Yang via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   Adam Yang via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   Adam Yang via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   Adam Yang via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   Adam Yang via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   Adam Yang via llvm-commits
• [llvm] [cross-project] Add tests for LLDB data-formatters for llvm::ArrayRef (PR #173238)   Adrian Prantl via llvm-commits
• [llvm] [llvm][formatters] Add LLDB data-formatter for llvm::PointerIntPair (PR #173261)   Adrian Prantl via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Adrian Prantl via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Adrian Prantl via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Adrian Prantl via llvm-commits
• [llvm] 78b9fd2 - [AMDGPU] Remove UTC line from file that does not use it   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU][NewPM] Format llc-pipeline-npm.ll better (PR #174161)   Aiden Grossman via llvm-commits
• [llvm] dbc9feb - [ProfCheck] Exclude new MergeFunc Test   Aiden Grossman via llvm-commits
• [llvm] Revert "Add merge-calling-conv.ll to profcheck-xfail.txt" (PR #174422)   Aiden Grossman via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Aiden Grossman via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Aiden Grossman via llvm-commits
• [llvm] [MLGO] Drop RegallocScoring Pass (PR #173746)   Aiden Grossman via llvm-commits
• [llvm] [InstrProf] Mark __llvm_profile_runtime_user cold (PR #174174)   Aiden Grossman via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Aiden Grossman via llvm-commits
• [llvm] Revert "Add merge-calling-conv.ll to profcheck-xfail.txt" (PR #174422)   Aiden Grossman via llvm-commits
• [llvm] [X86][NewPM] Port x86-fast-tile-config to NewPM (PR #174446)   Aiden Grossman via llvm-commits
• [llvm] [IR] Do not assert and verify that phi nodes do not have a token type (PR #174449)   Aiden Grossman via llvm-commits
• [llvm] [Verifier] Use not --crash for assertion (PR #174296)   Aiden Grossman via llvm-commits
• [llvm] [IR] Do not assert and verify that phi nodes do not have a token type (PR #174449)   Aiden Grossman via llvm-commits
• [llvm] [X86][NewPM] Port x86-fast-tile-config to NewPM (PR #174446)   Aiden Grossman via llvm-commits
• [llvm] [Verifier] Use not --crash for assertion (PR #174296)   Aiden Grossman via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Aiden Grossman via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Aiden Grossman via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Aiden Grossman via llvm-commits
• [llvm] [X86][NewPM] Port x86-fast-tile-config to NewPM (PR #174446)   Aiden Grossman via llvm-commits
• [llvm] [IR] Do not assert and verify that phi nodes do not have a token type (PR #174449)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Add some more C API headers to fix f0ef5dba6d12 (PR #174459)   Aiden Grossman via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Add some more C API headers to fix f0ef5dba6d12 (PR #174459)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Add some more C API headers to fix f0ef5dba6d12 (PR #174459)   Aiden Grossman via llvm-commits
• [llvm] [NFC][Hexagon] Fix unused variable warning (PR #174466)   Aiden Grossman via llvm-commits
• [llvm] [NFC][Hexagon] Fix unused variable warning (PR #174466)   Aiden Grossman via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Port 735b1c284d6a3e838c08699944707ae8c303fa8f (PR #174476)   Aiden Grossman via llvm-commits
• [llvm] [Bazel] Port 735b1c284d6a3e838c08699944707ae8c303fa8f (PR #174476)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Aiden Grossman via llvm-commits
• [llvm] [LLVM] Successor count added to InstCount (PR #171670)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Aiden Grossman via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Mark variable unused in release build [[maybe_unused]] (PR #174648)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Mark variable unused in release build [[maybe_unused]] (PR #174648)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Mark variable unused in release build [[maybe_unused]] (PR #174648)   Aiden Grossman via llvm-commits
• [llvm] worklows/release-tasks: Remove the release-lit workflow (PR #174644)   Aiden Grossman via llvm-commits
• [llvm] [NewPM][X86] Make AsmPrinter work with NewPM (PR #173740)   Aiden Grossman via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Aiden Grossman via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Aiden Grossman via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Port 0d23e3 (PR #174879)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Port 0d23e3 (PR #174879)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Make CAPIIR depend on TransformsPassIncGen (PR #174902)   Aiden Grossman via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #174963)   Aiden Grossman via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Aiden Grossman via llvm-commits
• [llvm] Fix Bazel build for f79f50c (PR #175068)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Port f79f50c (PR #175068)   Aiden Grossman via llvm-commits
• [llvm] [bazel] Port f79f50c (PR #175068)   Aiden Grossman via llvm-commits
• [llvm] [BoundsChecking] Clamp trap ID if it would overflow (PR #175103)   Aiden Grossman via llvm-commits
• [llvm] Revert "[AArch64] Fold scalar-to-vector shuffles into DUP/FMOV" (PR #175123)   Aiden Grossman via llvm-commits
• [flang] [llvm] [flang][OpenMP] Prevent `omp.map.info` ops with user-defined mappers from being marked as parial maps (PR #175133)   Akash Banerjee via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Alan Hu via llvm-commits
• [llvm] [IRCE] Prove predicates with and without loop-guarded SCEVs (PR #174843)   Aleksandr Popov via llvm-commits
• [llvm] [IRCE] Prove predicates with and without loop-guarded SCEVs (PR #174843)   Aleksandr Popov via llvm-commits
• [llvm] [IRCE] Prove predicates with and without loop-guarded SCEVs (PR #174843)   Aleksandr Popov via llvm-commits
• [clang] [llvm] Fixed stack size estimates in the function for the -fstack-usage option (PR #173181)   Aleksandr Ryabikov via llvm-commits
• [clang] [llvm] Fixed stack size estimates in the function for the -fstack-usage option (PR #173181)   Aleksandr Ryabikov via llvm-commits
• [llvm] Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (PR #174559)   Alex Bradbury via llvm-commits
• [llvm] Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (PR #174559)   Alex Bradbury via llvm-commits
• [llvm] Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (PR #174559)   Alex Bradbury via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Alex Bradbury via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Fix ReplaceNodeResults of Intrinsic::experimental_cttz_elts for RV32 (PR #174992)   Alex Bradbury via llvm-commits
• [llvm] [SLP] Use ConstantInt::getSigned for stride argument to strided load/store intrinsics (PR #175007)   Alex Bradbury via llvm-commits
• [llvm] [SLP] Use ConstantInt::getSigned for stride argument to strided load/store intrinsics (PR #175007)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Bail out of combineNarrowableShiftedLoad for types other than scalar int (PR #175011)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Fix ReplaceNodeResults of Intrinsic::experimental_cttz_elts for RV32 (PR #174992)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Fix ReplaceNodeResults of Intrinsic::experimental_cttz_elts for RV32 (PR #174992)   Alex Bradbury via llvm-commits
• [llvm] [RISCV] Bail out of combineNarrowableShiftedLoad for types other than scalar int (PR #175011)   Alex Bradbury via llvm-commits
• [llvm] [OpenMP][Offload] Add a buffer layer to debug messaging (PR #172446)   Alex Duran via llvm-commits
• [llvm] [OpenMP][Offload] Add a buffer layer to debug messaging (PR #172446)   Alex Duran via llvm-commits
• [llvm] [OpenMP][Offload] Add a buffer layer to debug messaging (PR #172446)   Alex Duran via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Alex Duran via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Alex Duran via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Alex Duran via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Alex Duran via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Alex Duran via llvm-commits
• [llvm] [Offload] Fix line numbers after #174804 (PR #174932)   Alex Duran via llvm-commits
• [llvm] [Offload] Fix line numbers after #174804 (PR #174932)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   Alex Duran via llvm-commits
• [llvm] [offload][lit] Enable llvm-omp-device-info.c on Intel GPUs (PR #175084)   Alex Duran via llvm-commits
• [compiler-rt] [CMake] Fix compiler-rt builtins configuration bug on darwin (PR #173811)   Alex Dutka via llvm-commits
• [llvm] [NVPTX][AutoUpgrade] Use integer min/max intrinsics instead of icmp, select (PR #173097)   Alex MacLean via llvm-commits
• [llvm] [DirectX] Account for GlobalOffset in CurrentIndex calculation for cbuffer loads with GEPs in DXILResourceAccess pass (PR #174666)   Alex Sepkowski via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Alex Sepkowski via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Alex Sepkowski via llvm-commits
• [llvm] [SPIRV] Additional fixes for const init via `UtoPtr` (PR #172584)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Additional fixes for const init via `UtoPtr` (PR #172584)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Handle aggregate arguments to `spv_store` (PR #172348)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Additional fixes for const init via `UtoPtr` (PR #172584)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Additional fixes for const init via `UtoPtr` (PR #172584)   Alex Voicu via llvm-commits
• [llvm] [SPIRV] Additional fixes for const init via `UtoPtr` (PR #172584)   Alex Voicu via llvm-commits
• [llvm] Revert "[AA] Improve precision for monotonic atomic load/store operations" (PR #173135)   Alexander Kornienko via llvm-commits
• [llvm] Revert "[AA] Improve precision for monotonic atomic load/store operations" (PR #173135)   Alexander Kornienko via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Alexander Richardson via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Alexander Richardson via llvm-commits
• [llvm] [TableGen] Support RegClassByHwMode in CompressPat (PR #171061)   Alexander Richardson via llvm-commits
• [llvm] [TableGen] Support RegClassByHwMode in CompressPat (PR #171061)   Alexander Richardson via llvm-commits
• [llvm] [XTensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   Alexander Richardson via llvm-commits
• [llvm] [XTensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   Alexander Richardson via llvm-commits
• [llvm] [Xtensa] Regenerate test/CodeGen/Xtensa/mul.ll to fix test (PR #175062)   Alexander Richardson via llvm-commits
• [llvm] [XTensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   Alexander Richardson via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Alexander Richardson via llvm-commits
• [llvm] [Xtensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   Alexander Richardson via llvm-commits
• [llvm] [Xtensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   Alexander Richardson via llvm-commits
• [llvm] [Xtensa] Regenerate test/CodeGen/Xtensa/mul.ll to fix test (PR #175062)   Alexander Richardson via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   Alexandre Ganea via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   Alexandre Ganea via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   Alexandre Ganea via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #174971)   Alexandre Ganea via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #174971)   Alexandre Ganea via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Alexandre Ganea via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT] Fix asserts in isCallCoveredByBTI and insertBTI (PR #174600)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   Alexey Bataev via llvm-commits
• [llvm] [SLP] Report the correct operand to getArithmeticInstrCost() when duplicated scalars (PR #174442)   Alexey Bataev via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   Alexey Bataev via llvm-commits
• [llvm] 39456e4 - [SLP]Do not increment dep count for non-schedulable nodes with non-schedulable parents   Alexey Bataev via llvm-commits
• [llvm] 9fb45c5 - [SLP]Do not generate extractelement subnodes with the same indeces   Alexey Bataev via llvm-commits
• [llvm] [SLP] Use ConstantInt::getSigned for stride argument to strided load/store intrinsics (PR #175007)   Alexey Bataev via llvm-commits
• [llvm] 6e1acd0 - [SLP]Update deps for copyables operands, if the user is used several times in node   Alexey Bataev via llvm-commits
• [llvm] 125a53c - Revert "[SLP]Update deps for copyables operands, if the user is used several times in node"   Alexey Bataev via llvm-commits
• [llvm] [BOLT][NFC] Remove JTIndexReg. (PR #174639)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][Docs] Add arm/large-bolt-tests to README (PR #174727)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   Alexey Moksyakov via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   Alexey Samsonov via llvm-commits
• [llvm] [CMake] Re-add -fno-rtti to llvm-config --cxxflags (PR #174084)   Alexis Engelke via llvm-commits
• [clang] [llvm] [Clang] Invoke pass plugin preCodeGenCallback (PR #171872)   Alexis Engelke via llvm-commits
• [llvm] [llvm-objdump][NFC] Use EnumEntry from Support (PR #174155)   Alexis Engelke via llvm-commits
• [llvm] [CMake] Re-add -fno-rtti to llvm-config --cxxflags (PR #174084)   Alexis Engelke via llvm-commits
• [clang] [flang] [lld] [llvm] [mlir] [RFC] Use pre-compiled headers to speed up LLVM build (~1.5-2x) (PR #173868)   Alexis Engelke via llvm-commits
• [clang] [flang] [lld] [llvm] [mlir] [RFC] Use pre-compiled headers to speed up LLVM build (~1.5-2x) (PR #173868)   Alexis Engelke via llvm-commits
• [llvm] [CMake] Guard cmake JOB_POOL property against duplicate entries if … (PR #169052)   Alexis Engelke via llvm-commits
• [llvm] [LLVM] Successor count added to InstCount (PR #171670)   Alina Sbirlea via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   Alireza Torabian via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Amara Emerson via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] Revert -mcpu fix (PR #174093)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Amina Chabane via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput (PR #174740)   Amina Chabane via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput (PR #174740)   Amina Chabane via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Amina Chabane via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Fix merge-fdata for memory events (PR #128108)   Amir Ayupov via llvm-commits
• [llvm] [BOLT] Remove unnecessary dependency. NFC (PR #174645)   Amir Ayupov via llvm-commits
• [llvm] [DWARF][NFC] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [DWARF][NFC] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   AmirHossein PashaeeHir via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Implement ctor/dtor emission via @@SQINIT and .xtor sections (PR #171476)   Amy Kwan via llvm-commits
• [llvm] [NFC][SystemZ] Update insert() API of the AssociatedDataAreaTable class (PR #174593)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   Amy Kwan via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   Amy Kwan via llvm-commits
• [llvm] [AArch64][PAC] Group arguments of emitPtrauthAuthResign (NFC) (PR #174002)   Anatoly Trosinenko via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Andre Kuhlenschmidt via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Andreas Jonson via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Andreas Jonson via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Fix check-builtins target under LLVM_ENABLE_PROJECTS compiler-rt (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Fix check-builtins target under LLVM_ENABLE_PROJECTS compiler-rt (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Fix check-builtins target under LLVM_ENABLE_PROJECTS compiler-rt (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] fix crt target dependency. (PR #174475)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Fix check-builtins target under LLVM_ENABLE_PROJECTS compiler-rt (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Fix check-builtins buildbot failures (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Fix check-builtins buildbot failures (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Fix check-builtins buildbot failures (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Fix check-builtins buildbot failures (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [llvm] [compiler-rt] Fix check-builtins buildbot failures (PR #174443)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [NFCI] [Darwin] Add APPLE_TARGET_IS_HOST lit option to compiler-rt (PR #174522)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [NFCI] [Darwin] Add APPLE_TARGET_IS_HOST lit option to compiler-rt (PR #174522)   Andrew Haberlandt via llvm-commits
• [llvm] [TSan] Fix TSan instrumenting pointers from non-default address spaces (PR #174518)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   Andrew Haberlandt via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] VerifyMemoryMapping should ignore zero-size sections (PR #175083)   Andrew Haberlandt via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Andrew Lazarev via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Andrew Lazarev via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Andrew Lazarev via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Andrew Lazarev via llvm-commits
• [lld] [ThinLTO][COFF] Pass loop and slp vectorize options to LTO backend (PR #173041)   Andrew Ng via llvm-commits
• [llvm] [Support] Join threads when stopping the ThreadPoolExecutor (PR #166054)   Andrew Ng via llvm-commits
• [clang] [llvm] [clang][LTO] Emit symbols for global inline assembly as module flags (PR #174995)   Andrew Savonichev via llvm-commits
• [llvm] [AArch64] Remove dead tuimm5sN tablegen Operands. NFC (PR #174735)   Andrzej Warzyński via llvm-commits
• [llvm] [AMDGPU] Add regbankselect rules for G_ICMP/G_FCMP (PR #172048)   Anshil Gandhi via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Anshil Gandhi via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Anshil Gandhi via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Anshil Gandhi via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Anshil Gandhi via llvm-commits
• [llvm] [docs] Strengthen our quality standards and connect AI contribution policy to it (PR #154441)   Anshul Nigham via llvm-commits
• [llvm] [llvm-jitlink] Fix perf support error message (PR #174767)   Anthonin Bonnefoy via llvm-commits
• [llvm] [llvm-c] Expose perf support for LLJIT in Orc C-API bindings (PR #174973)   Anthonin Bonnefoy via llvm-commits
• [llvm] [ORC] Handle unset FinalizeFuture in ELFDebugObjectPlugin::awaitTargetMem (PR #175143)   Anthonin Bonnefoy via llvm-commits
• [llvm] [ORC] Handle unset FinalizeFuture in ELFDebugObjectPlugin::awaitTargetMem (PR #175143)   Anthonin Bonnefoy via llvm-commits
• [llvm] [InstCombine] Canonicalize `switch(X^C)` expressions to `switch(X)` (PR #143677)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Canonicalize `switch(X^C)` expressions to `switch(X)` (PR #143677)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Canonicalize `switch(X^C)` expressions to `switch(X)` (PR #143677)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Canonicalize `switch(X^C)` expressions to `switch(X)` (PR #143677)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Canonicalize `switch(X^C)` expressions to `switch(X)` (PR #143677)   Antonio Frighetto via llvm-commits
• [llvm] 2d050f0 - [InstCombine] Canonicalize `switch(X^C)` expressions to `switch(X)`   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Canonicalize `switch(X^C)` expressions to `switch(X)` (PR #143677)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [llvm] [AA][MemCpyOpt] Introduce CapturesBeforeAnalysis and ChainedCaptureAnalysis (NFCI) (PR #174739)   Antonio Frighetto via llvm-commits
• [llvm] [CaptureTracking][AA] Only consider provenance captures (PR #130777)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Restrain folding switch condition operation into case to one-use (PR #174714)   Antonio Frighetto via llvm-commits
• [llvm] [PHIElimination] Ensure correct copy emission for `INLINEASM_BR` indirect targets (PR #173396)   Antonio Frighetto via llvm-commits
• [llvm] 3f7f4a6 - [PHIElimination] Introduce test for PR173396 (NFC)   Antonio Frighetto via llvm-commits
• [llvm] 394a3b9 - [PHIElimination] Ensure correct copy emission for INLINEASM_BR indirect targets   Antonio Frighetto via llvm-commits
• [llvm] [PHIElimination] Ensure correct copy emission for `INLINEASM_BR` indirect targets (PR #173396)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [clang] [llvm] [IR] Make dead_on_return attribute optionally sized (PR #171712)   Antonio Frighetto via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Artem Belevich via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Artem Belevich via llvm-commits
• [llvm] [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (PR #174669)   Artem Belevich via llvm-commits
• [llvm] [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (PR #174669)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][AutoUpgrade] Use integer min/max intrinsics instead of icmp, select (PR #173097)   Artem Belevich via llvm-commits
• [llvm] [NVPTX][AutoUpgrade] Use integer min/max intrinsics instead of icmp, select (PR #173097)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use correct `mul.wide` operand type when matching on `shl` in `combineMulWide` (PR #168986)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use correct `mul.wide` operand type when matching on `shl` in `combineMulWide` (PR #168986)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Use correct `mul.wide` operand type when matching on `shl` in `combineMulWide` (PR #168986)   Artem Belevich via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Artem Belevich via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Artem Belevich via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Arthur Bretas via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Arthur Bretas via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Arthur Bretas via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Asher Dobrescu via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Asher Dobrescu via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Asher Dobrescu via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Asher Dobrescu via llvm-commits
• [llvm] [BOLT][Docs] Add arm/large-bolt-tests to README (PR #174727)   Asher Dobrescu via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Asher Dobrescu via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Asher Dobrescu via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Asher Dobrescu via llvm-commits
• [llvm] [AArch64] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Asher Dobrescu via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   Ayumi OHNO via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   Ayumi OHNO via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   Ayumi OHNO via llvm-commits
• [clang] [llvm] [clang][ssaf] Add the TUSummaryExtractorRegistry (PR #173290)   Balázs Benics via llvm-commits
• [clang] [llvm] [clang][ssaf] Add the TUSummaryExtractorRegistry (PR #173290)   Balázs Benics via llvm-commits
• [clang] [llvm] [clang][ssaf] Add the TUSummaryExtractorRegistry (PR #173290)   Balázs Benics via llvm-commits
• [clang] [llvm] [clang][ssaf] Add the TUSummaryExtractorRegistry (PR #173290)   Balázs Benics via llvm-commits
• [llvm] [DTLTO] Fix handling of multi-module bitcode inputs (PR #174624)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO] Fix handling of multi-module bitcode inputs (PR #174624)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO] Fix handling of multi-module bitcode inputs (PR #174624)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO] Fix handling of multi-module bitcode inputs (PR #174624)   Ben Dunbobbin via llvm-commits
• [llvm] [DTLTO] Fix handling of multi-module bitcode inputs (PR #174624)   Ben Dunbobbin via llvm-commits
• [clang] [lld] [llvm] Integrated Distributed ThinLTO (DTLTO): Design Overview (PR #126654)   Ben Dunbobbin via llvm-commits
• [llvm] [LangRef] Normalize IEEE 754 spelling (PR #174721)   Ben Dunbobbin via llvm-commits
• [llvm] [llvm] Propagate the VFS to `SampleProfileLoaderPass` (PR #173121)   Ben Langmuir via llvm-commits
• [llvm] [llvm] Bypass sandbox in `sys::fs::createTemporaryFile()` (PR #174491)   Ben Langmuir via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Ben Langmuir via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Ben Langmuir via llvm-commits
• [llvm] [llvm] Bypass sandbox for `getMainExecutable()` (PR #174816)   Ben Langmuir via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   Ben Langmuir via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Ben Langmuir via llvm-commits
• [llvm] [AArch64] Use a load instead of a store for inline stack probes (PR #170855)   Benjamin Lerman via llvm-commits
• [llvm] [SDAG] Use reference type in loop (NFC) (PR #174379)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Use reference type in loop (NFC) (PR #174379)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Avoid crash when creating debug fragments for scalable vectors (PR #165233)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Use reference type in loop (NFC) (PR #174379)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Use reference type in loop (NFC) (PR #174379)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Use +0.0 for accumulator for FMUL -> BFMLAL lowering in more cases (PR #174423)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Use +0.0 for accumulator for FMUL -> BFMLAL lowering in more cases (PR #174423)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Use +0.0 for accumulator for FMUL -> BFMLAL lowering in more cases (PR #174423)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Benjamin Maxwell via llvm-commits
• [compiler-rt] [compiler-rt][AArch64] Exit early from __arm_za_disable. (PR #174942)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][VecLib] Add vector function mappings for the modf, sincos, sincospi vector intrinsics (PR #175098)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][VecLib] Add vector function mappings for the modf, sincos, sincospi vector intrinsics (PR #175098)   Benjamin Maxwell via llvm-commits
• [llvm] Remove poison from Value FMF flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value FMF flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value FMF flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value Fast-Math Flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value Fast-Math Flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value Fast-Math Flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value Fast-Math Flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value Fast-Math Flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value Fast-Math Flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] Remove poison from Value Fast-Math Flags (PR #174856)   Benoit Jacob via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Björn Pettersson via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Boyao Wang via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Boyao Wang via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Boyao Wang via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Boyao Wang via llvm-commits
• [llvm] [llvm][RISCV] Support fma codegen for zvfbfa (PR #172949)   Brandon Wu via llvm-commits
• [llvm] [llvm][RISCV] Support rounding mulh for P extension codegen (PR #171593)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][clang] Support f8e4m3 and f8e5m2 suffix type for intrinsics (PR #172626)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][clang] Support f8e4m3 and f8e5m2 suffix type for intrinsics (PR #172626)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][clang] Support f8e4m3 and f8e5m2 suffix type for intrinsics (PR #172626)   Brandon Wu via llvm-commits
• [clang] [llvm] [clang][RISCV] Support Zvfofp8min C intrinsic (PR #172630)   Brandon Wu via llvm-commits
• [clang] [llvm] [clang][RISCV] Support Zvfofp8min C intrinsic (PR #172630)   Brandon Wu via llvm-commits
• [clang] [llvm] [clang][RISCV] Support Zvfofp8min C intrinsic (PR #172630)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support bitwise operation for XLEN fixed vectors (PR #174598)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support bitwise operation for XLEN fixed vectors (PR #174598)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support bitwise operation for XLEN fixed vectors (PR #174598)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Support i32 (S/U)(ADD/SUB)SAT for rv32ip. (PR #173693)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support div/rem codegen for P extension (PR #174801)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support mul codegen for P extension (PR #174793)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support div/rem codegen for P extension (PR #174801)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support div/rem codegen for P extension (PR #174801)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)   Brandon Wu via llvm-commits
• [llvm] [RISCV][llvm] Support div/rem codegen for P extension (PR #174801)   Brandon Wu via llvm-commits
• [llvm] [AMDGPU][True16] extractEltcheap check 16bit in true16 mode (PR #171762)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][True16] extractEltcheap check 16bit in true16 mode (PR #171762)   Brox Chen via llvm-commits
• [llvm] [clang] Initial backend C-restrict support (PR #173395)   Bruno De Fraine via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Carl Ritson via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   Chandler Carruth via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   Chandler Carruth via llvm-commits
• [llvm] Add a filegroup containing _all_ sources to the libc build rules (PR #169155)   Chandler Carruth via llvm-commits
• [llvm] [AMDGPU] Removing unwanted delta in llc-pipeline-npm.ll. (PR #174535)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Removing unwanted delta in llc-pipeline-npm.ll. (PR #174535)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Removing unwanted delta in llc-pipeline-npm.ll. (PR #174535)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Removing unwanted delta in llc-pipeline-npm.ll. (PR #174535)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] Introduce Offset field in SGPR spill Pseudos (PR #174996)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] VGPR instruction placement should be aware of exec mask prol… (PR #175080)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] VGPR instruction placement should be aware of exec mask prol… (PR #175080)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU] VGPR instruction placement should be aware of exec mask prol… (PR #175080)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [CodeGen] Introduce MI flag for Live Range split instructions (PR #117543)   Christudasan Devadasan via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [clang] [compiler-rt] [libcxx] [clang][Sema] Add fortify warnings for `unistd.h` (PR #161737)   Colin Kinloch via llvm-commits
• [llvm] [AArch64] Make ISD::CTLS Legal for i32 and i64. (PR #174367)   Craig Topper via llvm-commits
• [llvm] [AArch64] Make ISD::CTLS Legal for i32 and i64. (PR #174367)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add support for Xqcibi branch on immediate in RISCVRedundantCopyElimination (PR #174358)   Craig Topper via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Craig Topper via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Craig Topper via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Craig Topper via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Craig Topper via llvm-commits
• [llvm] [AArch64] Make ISD::CTLS Legal for i32 and i64. (PR #174367)   Craig Topper via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Craig Topper via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Craig Topper via llvm-commits
• [llvm] [TableGen] Fix what looks like a mistake in RegClassByHwMode.td test. NFC (PR #174252)   Craig Topper via llvm-commits
• [llvm] Add lowering for llvm.vector.splice.va (PR #174261)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Craig Topper via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Craig Topper via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Craig Topper via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Craig Topper via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Craig Topper via llvm-commits
• [llvm] [TableGen] Return unknown type for RegClassByHwMode when NotRegister is set in getImplicitType. (PR #174488)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [RISCV] Don't generate QC.SWMI pair if the start reg is X0 (PR #174532)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add SimplifyDemandedBits and hasAllNBitUsers support for CLSW. (PR #174542)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support bitwise operation for XLEN fixed vectors (PR #174598)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support bitwise operation for XLEN fixed vectors (PR #174598)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Craig Topper via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add computeKnownBits for CLSW. (PR #174636)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add computeKnownBits for CLSW. (PR #174636)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add SimplifyDemandedBits and hasAllNBitUsers support for CLSW. (PR #174542)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add computeKnownBits for CLSW. (PR #174636)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix typo from 6e86037. NFC (PR #174679)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (PR #174713)   Craig Topper via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Craig Topper via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Craig Topper via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Craig Topper via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Craig Topper via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (PR #174713)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (PR #174713)   Craig Topper via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   Craig Topper via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   Craig Topper via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support i32 (S/U)(ADD/SUB)SAT for rv32ip. (PR #173693)   Craig Topper via llvm-commits
• [llvm] [RISCV] Support i32 (S/U)(ADD/SUB)SAT for rv32ip. (PR #173693)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Craig Topper via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Craig Topper via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   Craig Topper via llvm-commits
• [llvm] [RISCV] Prevent P extension from creating unaligned scalar load/store insructions. (PR #174878)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Craig Topper via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use LD_RV32/SD_RV32 for spills and reloads when 4-byte aligned Zilsd is enabled (PR #153595)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Expand CLMUL in PromoteIntRes_CLMUL if the operation isn't legal/custom for the promoted type. (PR #174911)   Craig Topper via llvm-commits
• [llvm] [RISCV] Fix ReplaceNodeResults of Intrinsic::experimental_cttz_elts for RV32 (PR #174992)   Craig Topper via llvm-commits
• [llvm] [RISCV] Bail out of combineNarrowableShiftedLoad for types other than scalar int (PR #175011)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add rules for Zca+Zcb+Zcmp+Zcmpt implying Zce. (PR #175041)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add rules for Zca+Zcb+Zcmp+Zcmpt implying Zce. (PR #175041)   Craig Topper via llvm-commits
• [llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Unify ISD::LOAD handling in ComputeNumSignBits. NFC (PR #175060)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Unify ISD::LOAD handling in ComputeNumSignBits. NFC (PR #175060)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Craig Topper via llvm-commits
• [llvm] [SelectionDAG] Unify ISD::LOAD handling in ComputeNumSignBits. NFC (PR #175060)   Craig Topper via llvm-commits
• [llvm] [GISel][RISCV] Add G_CTLS Opcode and combines, lower to cls(w) (PR #175069)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Craig Topper via llvm-commits
• [llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)   Craig Topper via llvm-commits
• [llvm] [TableGen] Change emitted comments for OPC_Scope to be more like OPC_SwitchType/Opcode. NFC (PR #175124)   Craig Topper via llvm-commits
• [llvm] [TableGen] Add a helper function for emitting an MVT in the isel table. NFC (PR #175127)   Craig Topper via llvm-commits
• [llvm] [TableGen] Print MVT name in the isel table when it doesn't require a VBR. (PR #175128)   Craig Topper via llvm-commits
• [llvm] [TableGen] Print MVT name in the isel table when it doesn't require a VBR. NFC (PR #175128)   Craig Topper via llvm-commits
• [llvm] [TableGen] Print MVT name in the isel table when it doesn't require a VBR. NFC (PR #175128)   Craig Topper via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-mca][AArch64] Refactor Neoverse SVE tests to split out common inputs (NFC) (PR #173023)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-sources: Disable building sub-project tarballs by default (PR #173441)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-sources: Disable building sub-project tarballs by default (PR #173441)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-sources: Disable building sub-project tarballs by default (PR #173441)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-sources: Disable building sub-project tarballs by default (PR #173441)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-sources: Disable building sub-project tarballs by default (PR #173441)   Cullen Rhodes via llvm-commits
• [llvm] worklows/release-tasks: Remove the release-lit workflow (PR #174644)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Cullen Rhodes via llvm-commits
• [llvm] Revert "[llvm-exegesis] Add AArch64 operand initializers, SetRegTo" (PR #174729)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Remove dead tuimm5sN tablegen Operands. NFC (PR #174735)   Cullen Rhodes via llvm-commits
• [llvm] Revert "[llvm-exegesis] Add AArch64 operand initializers, SetRegTo" (PR #174729)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Cullen Rhodes via llvm-commits
• [llvm] [LLVM] Ignore Cursor specific files (PR #174891)   Cullen Rhodes via llvm-commits
• [llvm] workflows/release-lit: Update workflow and enable trusted publishing with pypi (PR #174907)   Cullen Rhodes via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Cullen Rhodes via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Cullen Rhodes via llvm-commits
• [llvm] Reapply "[llvm-exegesis] Add AArch64 operand initializers, SetRegTo" (#174729) (PR #174944)   Cullen Rhodes via llvm-commits
• [llvm] [AMDGPU] Allow amdgpu-waves-per-eu to lower target occupancy range (PR #168358)   Damien Hilloulin via llvm-commits
• [compiler-rt] [NFCI] [Darwin] Add APPLE_TARGET_IS_HOST lit option to compiler-rt (PR #174522)   Dan Blackwell via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Dan Blackwell via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   Dan Blackwell via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   Dan Blackwell via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   Dan Blackwell via llvm-commits
• [llvm] [NFC] Reduce fragility of swdev503538-move-to-valu… test (PR #170702)   Daniil Fukalov via llvm-commits
• [llvm] [PAC][ELF] Place AUTH constants in .data.rel.ro for position dependent code (PR #150418)   Daniil Kovalev via llvm-commits
• [llvm] [LLVM][Option] Support multiline option parsing (PR #171214)   Danny Mösch via llvm-commits
• [llvm] [LLVM][Option] Support multiline option parsing (PR #171214)   Danny Mösch via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Dark Steve via llvm-commits
• [llvm] [cross-project-tests] Unset _FORTIFY_SOURCE when building the LLDB formatter tests (PR #174770)   David Blaikie via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   David Blaikie via llvm-commits
• [clang] [llvm] [DebugInfo] Introduce metadata flag for -gsimple-template-names and optimize template params in skeleton CU. (PR #174904)   David Blaikie via llvm-commits
• [clang] [llvm] [DebugInfo] Introduce metadata flag for -gsimple-template-names and optimize template params in skeleton CU. (PR #174904)   David Blaikie via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   David Blaikie via llvm-commits
• [llvm] [AArch64] Use a load instead of a store for inline stack probes (PR #170855)   David Green via llvm-commits
• [llvm] [CodeGen] Add command-line flags for memory operation inline thresholds (PR #172829)   David Green via llvm-commits
• [llvm] [SelectionDAG][ARM] Add lowering for strict fp16 nodes on systems without fullfp16 (PR #173666)   David Green via llvm-commits
• [llvm] [SelectionDAG][ARM] Add lowering for strict fp16 nodes on systems without fullfp16 (PR #173666)   David Green via llvm-commits
• [llvm] [SelectionDAG][ARM] Add lowering for strict fp16 nodes on systems without fullfp16 (PR #173666)   David Green via llvm-commits
• [llvm] [SelectionDAG][ARM] Add lowering for strict fp16 nodes on systems without fullfp16 (PR #173666)   David Green via llvm-commits
• [llvm] [AArch64] Make ISD::CTLS Legal for i32 and i64. (PR #174367)   David Green via llvm-commits
• [llvm] [AArch64] Fold scalar-to-vector shuffles into DUP/FMOV (PR #166962)   David Green via llvm-commits
• [llvm] 7635474 - [ARM] Update and extend neon-dot-product.ll. NFC   David Green via llvm-commits
• [llvm] [ARM] Add tablegen patterns for vsdot and vudot high index. (PR #174728)   David Green via llvm-commits
• [llvm] [AArch64] Remove dead tuimm5sN tablegen Operands. NFC (PR #174735)   David Green via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   David Green via llvm-commits
• [clang] [flang] [llvm] [Flang][VecLib] Ensure TargetMachine->VecLib is set for flang invocations. (PR #174209)   David Green via llvm-commits
• [llvm] [CodeGen] Add command-line flags for memory operation inline thresholds (PR #172829)   David Green via llvm-commits
• [llvm] [AArch64] Optimize ANDS(CSET, CSET) to CCMP. (PR #174919)   David Green via llvm-commits
• [llvm] [AArch64] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   David Green via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   David Green via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   David Green via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   David Green via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   David Green via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   David Green via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   David Green via llvm-commits
• [clang] [flang] [llvm] [Flang][VecLib] Ensure TargetMachine->VecLib is set for flang invocations. (PR #174209)   David Green via llvm-commits
• [clang] [flang] [llvm] [Flang][VecLib] Ensure TargetMachine->VecLib is set for flang invocations. (PR #174209)   David Green via llvm-commits
• [clang] [flang] [llvm] [Flang][VecLib] Ensure TargetMachine->VecLib is set for flang invocations. (PR #174209)   David Green via llvm-commits
• [llvm] [AArch64] Add lowering for NEON saturating shift intrinsics (PR #171485)   David Green via llvm-commits
• [llvm] [AArch64] Allow usubo and uaddo to happen for any legal type (PR #162907)   David Green via llvm-commits
• [clang] [flang] [llvm] [Flang][VecLib] Ensure TargetMachine->VecLib is set for flang invocations. (PR #174209)   David Green via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for rounding nodes (PR #173004)   David Green via llvm-commits
• [llvm] [AArch64] Optimize ANDS(CSET, CSET) to CCMP. (PR #174919)   David Green via llvm-commits
• [llvm] Revert "[AA] Improve precision for monotonic atomic load/store operations" (PR #173135)   David Li via llvm-commits
• [llvm] [VPlan] Add BranchOnTwoConds, use for early exit plans. (PR #172750)   David Sherwood via llvm-commits
• [llvm] [AArch64] Define cost of i16->i32 udot/sdot instructions (PR #174102)   David Sherwood via llvm-commits
• [llvm] [AArch64] Define cost of i16->i32 udot/sdot instructions (PR #174102)   David Sherwood via llvm-commits
• [llvm] [VPlan] Optimize resume values of IVs together with other exit values. (PR #174239)   David Sherwood via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Remove unnecessary multiply in expandVPWidenIntOrFpInduction (PR #170159)   David Sherwood via llvm-commits
• [llvm] [LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (PR #170159)   David Sherwood via llvm-commits
• [llvm] [LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (PR #170159)   David Sherwood via llvm-commits
• [llvm] [LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (PR #170159)   David Sherwood via llvm-commits
• [llvm] [LV][NFC] Change undef to poison in most tests (PR #163525)   David Sherwood via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   David Sherwood via llvm-commits
• [llvm] [LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (PR #170159)   David Sherwood via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   David Sherwood via llvm-commits
• [llvm] [LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (PR #170159)   David Sherwood via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   David Sherwood via llvm-commits
• [llvm] [AArch64][VecLib] Add vector function mappings for the modf, sincos, sincospi vector intrinsics (PR #175098)   David Sherwood via llvm-commits
• [llvm] [AArch64][VecLib] Add vector function mappings for the modf, sincos, sincospi vector intrinsics (PR #175098)   David Sherwood via llvm-commits
• [llvm] [LLVM][DAGCombiner] Look through freeze when combining extensions of loads (PR #175022)   David Sherwood via llvm-commits
• [llvm] [LLVM][DAGCombiner] Look through freeze when combining extensions of loads (PR #175022)   David Sherwood via llvm-commits
• [llvm] [LV] Consider UserIC when limiting VF. (PR #174573)   David Sherwood via llvm-commits
• [llvm] [LV] Consider UserIC when limiting VF. (PR #174573)   David Sherwood via llvm-commits
• [llvm] [llvm][release] Reveal download links based on uploaded assets (PR #167688)   David Spickett via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #174971)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #174971)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   David Truby via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #174971)   David Truby via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Deepak Eachempati via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Demetrius Kanios via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Derek Schuff via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Derek Schuff via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Derek Schuff via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Disable explicit-locals in the libcalls.ll test. NFC (PR #174811)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Support v128.load{32,64}_zero for f32 and f64 types (PR #172291)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Support v128.load{32,64}_zero for f32 and f64 types (PR #172291)   Derek Schuff via llvm-commits
• [llvm] [MC][WebAssembly] add string support for import/export instructions (PR #173513)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Disable explicit-locals in the libcalls.ll test. NFC (PR #174811)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Disable explicit-locals in the libcalls.ll test. NFC (PR #174811)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Expand vector frem instructions (PR #174854)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Expand vector frem instructions (PR #174854)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Expand vector frem instructions (PR #174854)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Expand vector frem instructions (PR #174854)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly] Add wasm64 testing to varargs.ll [NFC] (PR #175102)   Derek Schuff via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Deric C. via llvm-commits
• [llvm] [DirectX] Specify NegZero as signed (PR #174840)   Deric C. via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Deric C. via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Deric C. via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Deric C. via llvm-commits
• [llvm] [AMDGPU] Initialize FrameOffsetReg for amdgpu_cs_chain functions (PR #165518)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation (PR #156079)   Diana Picus via llvm-commits
• [llvm] [CMake] Re-add -fno-rtti to llvm-config --cxxflags (PR #174084)   Diego Caballero via llvm-commits
• [llvm] [CMake] Fix for d1b88ca (PR #174873)   Diego Caballero via llvm-commits
• [llvm] [CMake] Re-add -fno-rtti to llvm-config --cxxflags (PR #174084)   Diego Caballero via llvm-commits
• [llvm] [CMake] Fix for d1b88ca (PR #174873)   Diego Caballero via llvm-commits
• [llvm] [CMake] Fix for d1b88ca (PR #174873)   Diego Caballero via llvm-commits
• [llvm] [SPIRV] Add legalization pass for zero-size arrays (PR #172367)   Dmitry Sidorov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Dmitry Sidorov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Dmitry Sidorov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Dmitry Sidorov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Dmitry Sidorov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Dmitry Sidorov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Dmitry Sidorov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [SystemZ] Support all instruction formats with `.insn` directive (PR #152667)   Dominik Steenken via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Durgadoss R via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support in sm100 family (PR #174371)   Durgadoss R via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Ebuka Ezike via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Ebuka Ezike via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Ebuka Ezike via llvm-commits
• [clang] [llvm] [Clang] Add __builtin_allow_sanitize_check() (PR #172030)   Eli Friedman via llvm-commits
• [llvm] [SelectionDAG][ARM] Add lowering for strict fp16 nodes on systems without fullfp16 (PR #173666)   Eli Friedman via llvm-commits
• [clang] [llvm] [clang] Initial frontend C-restrict support (PR #173394)   Eli Friedman via llvm-commits
• [llvm] [AArch64][RegAlloc] Reserve LR reservation reserve W30 subreg (PR #173725)   Eli Friedman via llvm-commits
• [llvm] [AArch64] Update reserve-regs-for-regalloc desc (PR #173799)   Eli Friedman via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   Eli Friedman via llvm-commits
• [clang] [llvm] [Clang] Add __builtin_allow_sanitize_check() (PR #172030)   Eli Friedman via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] Implement NoCallerSavedRegs attribute (PR #174320)   Eli Friedman via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] Implement NoCallerSavedRegs attribute (PR #174320)   Eli Friedman via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] Implement NoCallerSavedRegs attribute (PR #174320)   Eli Friedman via llvm-commits
• [llvm] [LV] Prevent `extract-lane` generate unused IRs with single vector operand. (PR #172798)   Elvis Wang via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Eugene Epshteyn via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Eugene Epshteyn via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Eugene Epshteyn via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Implement CFI_show() (PR #155631)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Implement CFI_show() (PR #155631)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   Eugene Epshteyn via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   Eugene Epshteyn via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   Eugene Epshteyn via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Evgenii Kudriashov via llvm-commits
• [llvm] [PseudoProbe] Add switch to control illegal guid warnings (PR #174927)   Evgenii Kudriashov via llvm-commits
• [llvm] [LowerMemIntrinsics] Optimize memset lowering (PR #169040)   Fabian Ritter via llvm-commits
• [clang] [lld] [llvm] [lld] Add support for sdata8 for FDE CIE (PR #174508)   Fangrui Song via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Fangrui Song via llvm-commits
• [llvm] [llvm-objdump][NFC] Use EnumEntry from Support (PR #174155)   Fangrui Song via llvm-commits
• [lld] [llvm] [MC][WebAssembly] Add parameter to set table address type (PR #173063)   Fangrui Song via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Fangrui Song via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Fangrui Song via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Fangrui Song via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Fangrui Song via llvm-commits
• [lld] [lld] Add support for eh_frame_hdr sdata8 (PR #174486)   Farid Zakaria via llvm-commits
• [lld] [lld] Add support for eh_frame_hdr sdata8 (PR #174486)   Farid Zakaria via llvm-commits
• [clang] [lld] [llvm] [lld] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [clang] [lld] [llvm] [lld][llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [clang] [lld] [llvm] [lld][llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [X86] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [llvm] [X86] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Farid Zakaria via llvm-commits
• [clang] [lld] [llvm] [lld][llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [clang] [lld] [llvm] [lld][llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [clang] [lld] [llvm] [lld][llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [lld] [llvm] [lld][llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [lld] [llvm] [lld][llvm/mc] Add support for sdata8 for FDE CIE (PR #174508)   Farid Zakaria via llvm-commits
• [llvm] [DirectX] Update DXILValueEnumerator for the new SwitchInst format (PR #174672)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Farzon Lotfi via llvm-commits
• [llvm] [DirectX] Specify NegZero as signed (PR #174840)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [HLSL] Implement f32tof16() intrinsic (PR #172469)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Farzon Lotfi via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Farzon Lotfi via llvm-commits
• [llvm] Honor alignment for HVX masked loads/stores (incl. loops) (PR #174419)   Fateme Hosseini via llvm-commits
• [llvm] Honor alignment for HVX masked loads/stores (incl. loops) (PR #174419)   Fateme Hosseini via llvm-commits
• [llvm] Honor alignment for HVX masked loads/stores (incl. loops) (PR #174419)   Fateme Hosseini via llvm-commits
• [llvm] Honor alignment for HVX masked loads/stores (incl. loops) (PR #174419)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add lowering for llvm.vector.splice.va (PR #174261)   Fateme Hosseini via llvm-commits
• [llvm] [Hexagon] Add lowering for llvm.vector.splice.va (PR #174261)   Fateme Hosseini via llvm-commits
• [llvm] Add lowering for llvm.vector.splice.va (PR #174261)   Fateme Hosseini via llvm-commits
• [llvm] [NFC][Hexagon] Fix unused variable warning (PR #174466)   Fateme Hosseini via llvm-commits
• [llvm] [RIPPLE][HEXAGON-BACKEND] Fix insert DBG_VALUE after terminator (PR #173401)   Fateme Hosseini via llvm-commits
• [llvm] Fix insert DBG_VALUE after terminator (PR #173401)   Fateme Hosseini via llvm-commits
• [llvm] Fix insert DBG_VALUE after terminator Failure for Hexagon (PR #173401)   Fateme Hosseini via llvm-commits
• [llvm] Fix insert DBG_VALUE after terminator Failure for Hexagon (PR #173401)   Fateme Hosseini via llvm-commits
• [llvm] Fix insert DBG_VALUE after terminator Failure for Hexagon (PR #173401)   Fateme Hosseini via llvm-commits
• [llvm] Fix insert DBG_VALUE after terminator Failure for Hexagon (PR #173401)   Fateme Hosseini via llvm-commits
• [clang] [llvm] [X86][APX] Emit SetZUCC instead of legacy setcc when ZU is enabled (PR #173965)   Feng Zou via llvm-commits
• [clang] [llvm] [X86][APX] Emit SetZUCC instead of legacy setcc when ZU is enabled (PR #173965)   Feng Zou via llvm-commits
• [llvm] [X86][APX] Exclusively emit setzucc to avoid false dependency (PR #142092)   Feng Zou via llvm-commits
• [llvm] [DirectX] Specify NegZero as signed (PR #174840)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Specify NegZero as signed (PR #174840)   Finn Plummer via llvm-commits
• [llvm] [DirectX] Specify NegZero as signed (PR #174840)   Finn Plummer via llvm-commits
• [llvm] [HLSL] Fix WaveBallot dxil op function name (PR #174901)   Finn Plummer via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Florian Hahn via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Florian Hahn via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Add poison/undef canonicalization for SCEVAddExpr, SCEVAddRecExpr. (PR #170741)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle all PtrtoIntExpr construction in CastSinkingRewriter (NFC) (PR #174435)   Florian Hahn via llvm-commits
• [llvm] [polly] [SCEV] Sink SCEVPtrToAddr to leaf SCEVUnknowns. (PR #174437)   Florian Hahn via llvm-commits
• [llvm] [LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (PR #170159)   Florian Hahn via llvm-commits
• [llvm] [SCEV] URem range (PR #174456)   Florian Hahn via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Florian Hahn via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Florian Hahn via llvm-commits
• [llvm] 4bbc1f6 - [LV] Add test case for costs of load of pointer inductions (NFC).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Florian Hahn via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   Florian Hahn via llvm-commits
• [llvm] Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (PR #174559)   Florian Hahn via llvm-commits
• [llvm] [LV] Conservatively predicate SDiv/SRem (PR #170818)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Florian Hahn via llvm-commits
• [llvm] [LV] Consider UserIC when limiting VF. (PR #174573)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Detect and create partial reductions in VPlan. (NFCI) (PR #167851)   Florian Hahn via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Florian Hahn via llvm-commits
• [llvm] [LV] Consider UserIC when limiting VF. (PR #174573)   Florian Hahn via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   Florian Hahn via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Florian Hahn via llvm-commits
• [llvm] 01d34eb - [VPlan] Only use isAddressSCEVForCost in legacy getAddressAccSCEV (NFCI)   Florian Hahn via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Mark variable unused in release build [[maybe_unused]] (PR #174648)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Florian Hahn via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] 6e6996e - [LV] Add tests for argmin/argmax with epilogue vectorization. (NFC)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC)(WIP) (PR #142285)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC)(WIP) (PR #142285)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Fold VPDef into VPRecipeBase (NFC). (PR #174282)   Florian Hahn via llvm-commits
• [llvm] 4998280 - [LV] Find reduction result VPInstruction from backedge value (NFC).   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add BranchOnTwoConds, use for early exit plans. (PR #172750)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (PR #174026)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Strip iterator-invalidation guard in findHeaderMask (NFC) (PR #174930)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Use m_LiveIn to improve code (NFC) (PR #174943)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Refine some types to VPIRValue (NFC) (PR #174939)   Florian Hahn via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Florian Hahn via llvm-commits
• [llvm] [LV] Simplify extract-lane with scalar operand to the scalar value itself. (PR #174534)   Florian Hahn via llvm-commits
• [llvm] [LV] Prevent `extract-lane` generate unused IRs with single vector operand. (PR #172798)   Florian Hahn via llvm-commits
• [llvm] 8c830d3 - [VPlan] Merge cases inferring type of operand 0 (NFC).   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Absorb VPDef into VPRecipeBase (NFC) (PR #175085)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Fix off-by-one error in FindFirstIV ranges (PR #174441)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Fix off-by-one error in FindFirstIV ranges (PR #174441)   Florian Hahn via llvm-commits
• [llvm] [HWASan] [MTE] use precise lifetimes even if they don't cover all exits (PR #174875)   Florian Mayer via llvm-commits
• [llvm] [HWASan] [MTE] use precise lifetimes even if they don't cover all exits (PR #174875)   Florian Mayer via llvm-commits
• [llvm] [HWASan] [MTE] use precise lifetimes even if they don't cover all exits (PR #174875)   Florian Mayer via llvm-commits
• [llvm] [HWASan] [MTE] use precise lifetimes even if they don't cover all exits (PR #174875)   Florian Mayer via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Folkert de Vries via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Folkert de Vries via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Folkert de Vries via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Folkert de Vries via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Folkert de Vries via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Folkert de Vries via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   Folkert de Vries via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   Folkert de Vries via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   Folkert de Vries via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Folkert de Vries via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Francesco Petrogalli via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   Francesco Petrogalli via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   Francesco Petrogalli via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Implement and select the RISCVMachOTargetObjectFile. (PR #174677)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Implement and select the RISCVMachOTargetObjectFile. (PR #174677)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Implement and select the RISCVMachOTargetObjectFile. (PR #174677)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Ensure MCTargetStreamer is initialized. (PR #174800)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V][Mach-O] Ensure MCTargetStreamer is initialized. (PR #174800)   Francesco Petrogalli via llvm-commits
• [llvm] [RISC-V] Ensure MCTargetStreamer is initialized. (PR #174800)   Francesco Petrogalli via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Prefer non reloc layout for short branches beyond fragment. (PR #174546)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Fix isCallCoveredByBTI and insertBTI assertions (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Fix isCallCoveredByBTI and insertBTI assertions (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Fix asserts in isCallCoveredByBTI and insertBTI (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Fix asserts in isCallCoveredByBTI and insertBTI (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Fix asserts in isCallCoveredByBTI and insertBTI (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Fix asserts in isCallCoveredByBTI and insertBTI (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Disassemble PLT entries when processing BTI binaries (PR #169663)   Gergely Bálint via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Disallow instrumenting BTI binaries (PR #174936)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Disallow instrumenting BTI binaries (PR #174936)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Disallow instrumenting BTI binaries (PR #174936)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][BTI] Disallow instrumenting BTI binaries (PR #174936)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Gergely Bálint via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   Gergo Stomfai via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   Gergo Stomfai via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   Gergo Stomfai via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [clang] [llvm] [Clang] Invoke pass plugin preCodeGenCallback (PR #171872)   Grigor Nikolov via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Grigory Pastukhov via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   Grigory Pastukhov via llvm-commits
• [clang] [flang] [llvm] [mlir] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Guray Ozen via llvm-commits
• [clang] [flang] [llvm] [mlir] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Guray Ozen via llvm-commits
• [clang] [flang] [llvm] [mlir] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Guray Ozen via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   Gábor Horváth via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   Haibo Jiang via llvm-commits
• [lld] Fix lld crash using --fix-cortex-a53-843419 (PR #170495)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LLD][COFF] Prefetch inputs early-on to improve link times (PR #169224)   Hans Wennborg via llvm-commits
• [llvm] [aarch64] Mix the frame pointer with the stack cookie when protecting the stack (PR #161114)   Hans Wennborg via llvm-commits
• [llvm] [PseudoProbe] Add switch to control illegal guid warnings (PR #174927)   Haohai Wen via llvm-commits
• [llvm] [PseudoProbe] Add switch to control illegal guid warnings (PR #174927)   Haohai Wen via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Haoren Wang via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Haoren Wang via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Haoren Wang via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Haoren Wang via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Haoren Wang via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Haoren Wang via llvm-commits
• [llvm] [BOLT][NFC] Remove JTIndexReg. (PR #174639)   Harald van Dijk via llvm-commits
• [llvm] [BOLT][NFC] Remove JTIndexReg. (PR #174639)   Harald van Dijk via llvm-commits
• [llvm] [BOLT][NFC] Remove JTIndexReg. (PR #174639)   Harald van Dijk via llvm-commits
• [llvm] [BOLT][NFC] Remove JTIndexReg. (PR #174639)   Harald van Dijk via llvm-commits
• [llvm] [BOLT] Avoid UB due to misaligned access. (PR #174990)   Harald van Dijk via llvm-commits
• [llvm] [BOLT][AArch64] Avoid UB due to shift of negative value. (PR #174994)   Harald van Dijk via llvm-commits
• [llvm] [BOLT][AArch64] Avoid UB due to shift of negative value. (PR #174994)   Harald van Dijk via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Hassnaa Hamdi via llvm-commits
• [llvm] [WebAssembly] Expand vector frem instructions (PR #174854)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Add wasm64 testing to varargs.ll [NFC] (PR #175102)   Heejin Ahn via llvm-commits
• [llvm] [DirectX] Avoid precalculating GEPs in DXILResourceAccess (PR #172720)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Avoid precalculating GEPs in DXILResourceAccess (PR #172720)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Avoid precalculating GEPs in DXILResourceAccess (PR #172720)   Helena Kotas via llvm-commits
• [llvm] [DirectX] Avoid precalculating GEPs in DXILResourceAccess (PR #172720)   Helena Kotas via llvm-commits
• [llvm] [mlir] [MLIR][Python] remove pybind11 support (PR #172581)   Hideto Ueno via llvm-commits
• [llvm] [mlir] [MLIR][Python] remove pybind11 support (PR #172581)   Hideto Ueno via llvm-commits
• [clang] [compiler-rt] [Sanitizers] the access size (8 bytes) exceeds the max lock-free size (4 bytes) for 32-bit (PR #125388)   Honey Goyal via llvm-commits
• [compiler-rt] Make mmap-munmap interceptor fail earlier (PR #171295)   Honey Goyal via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Hongyu Chen via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Hussam A. via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Hussam A. via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Hussam A. via llvm-commits
• [llvm] [ORC][JITLink] Fix generated perf jitdump file's invalid header Flags (PR #174732)   Icenowy Zheng via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [TableGen] Support emitting preprocessed output (PR #120113)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Support emitting preprocessed output (PR #120113)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Support emitting preprocessed output (PR #120113)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [TableGen] Support emitting preprocessed output (PR #120113)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Regenerate all MC checks after #164424 (PR #175156)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [Bazel] Port 735b1c284d6a3e838c08699944707ae8c303fa8f (PR #174476)   Ivan Tadeu Ferreira Antunes Filho via llvm-commits
• [llvm] [LLVM] Successor count added to InstCount (PR #171670)   Iñaki V Arrechea via llvm-commits
• [llvm] [LLVM] Successor count added to InstCount (PR #171670)   Iñaki V Arrechea via llvm-commits
• [lld] [LLD] [MinGW] Add the --fat-lto-objects flag (PR #174962)   Jacek Caban via llvm-commits
• [llvm] [OpenMP] Fix member type name in LooprangeT, NFC (PR #174241)   Jack Styles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Jack Styles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Jack Styles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Jack Styles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Jack Styles via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   Jacques Pienaar via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   Jacques Pienaar via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Jake Egan via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Jake Egan via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Jake Egan via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Jake Egan via llvm-commits
• [llvm] [CommandLine] Use DenseMap instead of StringMap (NFC) (PR #174988)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Jakub Kuderski via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Jakub Kuderski via llvm-commits
• [llvm] Reland: CodeGen: Record MMOs in finalizeBundle (PR #166689)   James Nagurne via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   James Y Knight via llvm-commits
• [llvm] DeveloperPolicy: Add note about legacy bitcode performance (PR #174720)   James Y Knight via llvm-commits
• [clang] [llvm] [LTO] Parse global inline assembly with +all target flags (PR #167439)   James Y Knight via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Jan Patrick Lehr via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU] Enable overwrite ALU bit in sched.barrier mask (PR #160782)   Jan Patrick Lehr via llvm-commits
• [llvm] [AMDGPU] Enable overwrite ALU bit in sched.barrier mask (PR #160782)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Fix line numbers after #174804 (PR #174932)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Fix line numbers after #174804 (PR #174932)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload] Fix line numbers after #174804 (PR #174932)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   Jan Patrick Lehr via llvm-commits
• [llvm] [RedirectingFileSystem] Don't update error result value (PR #172900)   Jan Svoboda via llvm-commits
• [llvm] [llvm] Propagate the VFS to `SampleProfileLoaderPass` (PR #173121)   Jan Svoboda via llvm-commits
• [llvm] [llvm] Bypass sandbox in `sys::fs::createTemporaryFile()` (PR #174491)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Jan Svoboda via llvm-commits
• [llvm] [llvm] Bypass sandbox for `getMainExecutable()` (PR #174816)   Jan Svoboda via llvm-commits
• [llvm] [llvm] Bypass sandbox for `getMainExecutable()` (PR #174816)   Jan Svoboda via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   Jan Svoboda via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   Jan Svoboda via llvm-commits
• [lld] Revert "[lld][COFF] Add /linkreprofullpathrsp flag" (PR #174831)   Jan Svoboda via llvm-commits
• [lld] Revert "[lld][COFF] Add /linkreprofullpathrsp flag" (PR #174831)   Jan Svoboda via llvm-commits
• [lld] Revert "[lld][COFF] Add /linkreprofullpathrsp flag" (PR #174831)   Jan Svoboda via llvm-commits
• [llvm] [llvm] Bypass sandbox for `getMainExecutable()` (PR #174816)   Jan Svoboda via llvm-commits
• [llvm] [llvm] Bypass sandbox for `getMainExecutable()` (PR #174816)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Jan Svoboda via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   Jan Svoboda via llvm-commits
• [llvm] [AMDGPU] siloadstoreopt generate REG_SEQUENCE with aligned operands (PR #162088)   Janek van Oirschot via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Jannik Glückert via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Jannik Glückert via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Jannik Glückert via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Jannik Glückert via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Jannik Glückert via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Jason Molenda via llvm-commits
• [llvm] Revert "[AMDGPU] Fix excessive stack usage in SIInsertWaitcnts::run (#134835)" (PR #174215)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and document waitcnt handling on call and return (PR #172453)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make WaitcntBrackets::simplifyWaitcnt const again (PR #173390)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make WaitcntBrackets::simplifyWaitcnt const again (PR #173390)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify and document waitcnt handling on call and return (PR #172453)   Jay Foad via llvm-commits
• [llvm] [TableGen] Support emitting preprocessed output (PR #120113)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make WaitcntBrackets::simplifyWaitcnt const again (PR #173390)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][NewPM] Format llc-pipeline-npm.ll better (PR #174161)   Jay Foad via llvm-commits
• [llvm] [CodeGen][NPM] Update dominator tree and post dominator tree consistently (PR #173485)   Jay Foad via llvm-commits
• [llvm] [CodeGen][NPM] Update dominator tree and post dominator tree consistently (PR #173485)   Jay Foad via llvm-commits
• [llvm] [CodeGen][NPM] Update dominator tree and post dominator tree consistently (PR #173485)   Jay Foad via llvm-commits
• [llvm] [CodeGen][NPM] Update dominator tree and post dominator tree consistently (PR #173485)   Jay Foad via llvm-commits
• [llvm] [NFC][AMDGPU] Add comments for literal arguments of WMMA profiles (PR #174175)   Jay Foad via llvm-commits
• [llvm] ValueTracking: Improve computeKnownFPClass fmul handling (PR #173247)   Jay Foad via llvm-commits
• [llvm] InstCombine: Positive normal exp results imply possible negative normal inputs (PR #174273)   Jay Foad via llvm-commits
• [llvm] ValueTracking: Rephrase fmul sign bit checks (PR #174498)   Jay Foad via llvm-commits
• [llvm] Revert "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic" (PR #174501)   Jay Foad via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Inline two helpers in SIInsertWaitcnts. NFC. (PR #174557)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Inline two helpers in SIInsertWaitcnts. NFC. (PR #174557)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Make WaitcntBrackets::simplifyWaitcnt const again (PR #173390)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Inline two helpers in SIInsertWaitcnts. NFC. (PR #174557)   Jay Foad via llvm-commits
• [llvm] [AMD] using divergent/uniform information in ISel of zext (PR #174539)   Jay Foad via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   Jay Foad via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Jay Foad via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Jay Foad via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Jay Foad via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through glue (PR #174766)   Jay Foad via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through glue (PR #174766)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Jay Foad via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through glue (PR #174766)   Jay Foad via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through glue (PR #174766)   Jay Foad via llvm-commits
• [llvm] [NFCI][AMDGPU] Update Mode register mask for gfx1250 (PR #174771)   Jay Foad via llvm-commits
• [llvm] e5623b1 - Revert "SelectionDAG: Do not propagate divergence through glue (#174766)"   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove some redundant SubtargetPredicate settings. NFC. (PR #174788)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Remove some redundant SubtargetPredicate settings. NFC. (PR #174788)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Reimplement VOP3 CMPX encoding fixup using PostEncoderMethod. NFCI. (PR #174799)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Reimplement VOP3 CMPX encoding fixup using PostEncoderMethod. NFCI. (PR #174799)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify class VINTERPe. NFC. (PR #175006)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify class VINTERPe. NFC. (PR #175006)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Simplify class VINTERPe. NFC. (PR #175006)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][Scheduler] Scoring system for rematerializations (PR #175050)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Jay Foad via llvm-commits
• [llvm] [TableGen] Remove deprecated !getop and !setop (PR #175155)   Jay Foad via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   Jay Foad via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   Jay Foad via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   Jay Foad via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   Jay Foad via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   Jay Foad via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Regenerate all MC checks after #164424 (PR #175156)   Jay Foad via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [flang][MIF] Adding Stop and ErrorStop operations (PR #166787)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [flang][MIF] Adding Stop and ErrorStop operations (PR #166787)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [flang][MIF] Adding Stop and ErrorStop operations (PR #166787)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [flang][MIF] Adding Stop and ErrorStop operations (PR #166787)   Jean-Didier PAILLEUX via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [flang][MIF] Adding Stop and ErrorStop operations (PR #166787)   Jean-Didier PAILLEUX via llvm-commits
• [flang] [llvm] [flang][MIF] Adding Stop and ErrorStop operations (PR #166787)   Jean-Didier PAILLEUX via llvm-commits
• [clang] [llvm] [clang] Initial frontend C-restrict support (PR #173394)   Jeroen Dobbelaere via llvm-commits
• [llvm] [RISCV] Add rules for Zca+Zcb+Zcmp+Zcmpt implying Zce. (PR #175041)   Jerry Zhang Jian via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Jessica Clarke via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Jessica Clarke via llvm-commits
• [llvm] [InstCombinePHI] Enable gep arg fold transform with constant indices (PR #174981)   Jessica Del via llvm-commits
• [llvm] [RISCV] Update Andes45 vector integer arithmetic scheduling info (PR #174538)   Jim Lin via llvm-commits
• [llvm] [RISCV] Simplify testcases in xqcibi-redundant-copy-elim.ll. NFC. (PR #174695)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add support for XAndesPerf branch on immediate in RISCVRedundantCopyElimination (PR #174706)   Jim Lin via llvm-commits
• [llvm] 0b819a6 - [RISCV] Simplify the RUN lines for ZVFH/ZVFHMIN. NFC.   Jim Lin via llvm-commits
• [llvm] 39e9d57 - [RISCV] Indent body of let scopes in RISCVInstrInfoXAndes.td. NFC.   Jim Lin via llvm-commits
• [llvm] bf0c216 - [RISCV] Add missing comment at end of let scope in RISCVInstrInfoXAndes.td. NFC.   Jim Lin via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Jim Lin via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [profcheck] Fix profile metadata in IntegerDivision/ExpandIRinsts (PR #173114)   Jin Huang via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   Joe Nash via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   Joe Nash via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   Joe Nash via llvm-commits
• [llvm] [LoopUnroll] Use branch probability in multi-exit loop unrolling (PR #164799)   Joel E. Denny via llvm-commits
• [llvm] [LoopUnroll] Use branch probability in multi-exit loop unrolling (PR #164799)   Joel E. Denny via llvm-commits
• [llvm] [LoopUnroll] Use branch probability in multi-exit loop unrolling (PR #164799)   Joel E. Denny via llvm-commits
• [llvm] [LoopUnroll] Use branch probability in multi-exit loop unrolling (PR #164799)   Joel E. Denny via llvm-commits
• [llvm] [LoopUnroll] Use branch probability in multi-exit loop unrolling (PR #164799)   Joel E. Denny via llvm-commits
• [llvm] [LoopUnroll] Use branch probability in multi-exit loop unrolling (PR #164799)   Joel E. Denny via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [VPlan] Don't use the legacy cost model for loop conditions (PR #156864)   John Brawn via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   John Harrison via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   John Harrison via llvm-commits
• [llvm] [AArch64][NFC] Fix label checks on ZCM tests (PR #173482)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][NFC] Fix label checks on ZCM tests (PR #173482)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][llvm-mca] Add old Cyclone instruction tables for reference (PR #172652)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][llvm-mca] Add old Cyclone instruction tables for reference (PR #172652)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][llvm-mca] Add old Cyclone instruction tables for reference (PR #172652)   Jon Roelofs via llvm-commits
• [llvm] [AArch64] Add ZCM/ZCZ lowering statistics (PR #172863)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][NFC] Fix label checks on ZCM tests (PR #173482)   Jon Roelofs via llvm-commits
• [llvm] [AArch64][NFC] Fix label checks on ZCM tests (PR #173482)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jon Roelofs via llvm-commits
• [llvm] [CodeGen][EarlyIfConversion] Fix loop invariant operands check (PR #174765)   Jon Roelofs via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   Jonas Devlieghere via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   Jonas Devlieghere via llvm-commits
• [llvm] [CommandLine] Use DenseMap instead of StringMap (NFC) (PR #174988)   Jonas Devlieghere via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen][EarlyIfConversion] Fix loop invariant operands check (PR #174765)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [llvm] [AArch64][MachineCombiner] Fix setting reg state for gather lane pattern (PR #149703)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen][EarlyIfConversion] Fix loop invariant operands check (PR #174765)   Jonathan Cohen via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   Jonathan Cohen via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Add codegen for simd fpcvt intrinsics (PR #173272)   Jonathan Thackray via llvm-commits
• [llvm] [bazel] Add some more C API headers to fix f0ef5dba6d12 (PR #174459)   Jordan Rupprecht via llvm-commits
• [llvm] [NFC][Hexagon] Fix unused variable warning (PR #174466)   Jordan Rupprecht via llvm-commits
• [llvm] [bazel] Add comment about DEFAULT_TARGETS (PR #174479)   Jordan Rupprecht via llvm-commits
• [llvm] [offload] Change olLaunchKernel to accept argument arrays (PR #173263)   Joseph Huber via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Joseph Huber via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   Joseph Huber via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   Joseph Huber via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Attach `Attribute::OptimizeNone` to user-defined (and default) mappers (PR #174776)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Joseph Huber via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Joseph Huber via llvm-commits
• [llvm] [OpenMP][Offload] Add a buffer layer to debug messaging (PR #172446)   Joseph Huber via llvm-commits
• [llvm] [OpenMP][Offload] Add a buffer layer to debug messaging (PR #172446)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Joseph Huber via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Joseph Huber via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   Joseph Huber via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   Joseph Huber via llvm-commits
• [flang] [llvm] [flang][OpenMP] Prevent `omp.map.info` ops with user-defined mappers from being marked as parial maps (PR #175133)   Joseph Huber via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   Joshua Batista via llvm-commits
• [llvm] [HLSL] Fix WaveBallot dxil op function name (PR #174901)   Joshua Batista via llvm-commits
• [llvm] [HLSL] Fix WaveBallot dxil op function name (PR #174901)   Joshua Batista via llvm-commits
• [llvm] [HLSL] Fix WaveBallot dxil op function name (PR #174901)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Handle WaveActiveBallot struct return type appropriately (PR #175105)   Joshua Batista via llvm-commits
• [clang] [llvm] [HLSL] Handle WaveActiveBallot struct return type appropriately (PR #175105)   Joshua Batista via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Joshua Cranmer via llvm-commits
• [llvm] [LangRef] Normalize IEEE 754 spelling (PR #174721)   Joshua Cranmer via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (PR #174734)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (PR #174734)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (PR #174734)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Avoid temporary SmallVector by using make_early_inc_range (PR #174748)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Avoid temporary SmallVector by using make_early_inc_range (PR #174748)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Avoid temporary SmallVector by using make_early_inc_range (PR #174748)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][SPIRV] Avoid temporary SmallVector by using make_early_inc_range (PR #174748)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Julian Nagele via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Julian Nagele via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Julian Nagele via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Julian Nagele via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Julian Nagele via llvm-commits
• [llvm] [DirectX] Account for GlobalOffset in CurrentIndex calculation for cbuffer loads with GEPs in DXILResourceAccess pass (PR #174666)   Justin Bogner via llvm-commits
• [llvm] [NVPTX] Draft aidan (PR #119086)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX][AutoUpgrade] Use integer min/max intrinsics instead of icmp, select (PR #173097)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Use correct `mul.wide` operand type when matching on `shl` in `combineMulWide` (PR #168986)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Use correct `mul.wide` operand type when matching on `shl` in `combineMulWide` (PR #168986)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Justin Fargnoli via llvm-commits
• [llvm] [NVPTX] Use correct `mul.wide` operand type when matching on `shl` in `combineMulWide` (PR #168986)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   Justin Fargnoli via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Justin Stitt via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Justin Stitt via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [llvm] [SystemZ][z/OS] Improve use of formatv (PR #174503)   Kai Nacke via llvm-commits
• [llvm] [DirectX] Specify NegZero as signed (PR #174840)   Kaitlin Peng via llvm-commits
• [llvm] [openmp] [OMPT][Offload][OpenMP] Fixes for OMPT data used by libomptarget (reapply #156020) (PR #175165)   Kaloyan Ignatov via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   Kareem Ergawy via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Attach `Attribute::OptimizeNone` to user-defined (and default) mappers (PR #174776)   Kareem Ergawy via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Attach `Attribute::OptimizeNone` to user-defined (and default) mappers (PR #174776)   Kareem Ergawy via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Attach `Attribute::OptimizeNone` to user-defined (and default) mappers (PR #174776)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [flang][OpenMP] Prevent `omp.map.info` ops with user-defined mappers from being marked as parial maps (PR #175133)   Kareem Ergawy via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Attach `Attribute::OptimizeNone` to user-defined (and default) mappers (PR #174776)   Kareem Ergawy via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Attach `Attribute::OptimizeNone` to user-defined (and default) mappers (PR #174776)   Kareem Ergawy via llvm-commits
• [flang] [llvm] [flang][OpenMP] Prevent `omp.map.info` ops with user-defined mappers from being marked as parial maps (PR #175133)   Kareem Ergawy via llvm-commits
• [llvm] [X86] lowerFPToIntToFP - handle UI2FP on AVX512VL targets and i64 types on AVX512DQ targets (PR #162656)   Kavin Gnanapandithan via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Add Initial Taskloop Clause Support (PR #174623)   Kaviya Rajendiran via llvm-commits
• [llvm] [bazel] Add comment about DEFAULT_TARGETS (PR #174479)   Keith Smiley via llvm-commits
• [llvm] Fix Xtensa Bazel build (PR #173073)   Keith Smiley via llvm-commits
• [clang] [lldb] [llvm] [cmake] Add support for statically linking libxml2 (PR #166867)   Keith Smiley via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for lowering fp_to_int nodes (PR #173001)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (PR #172851)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64] Add support for range prefetch intrinsic (PR #170490)   Kerry McLaughlin via llvm-commits
• [clang] [llvm] [AArch64] Add support for range prefetch intrinsic (PR #170490)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (PR #172851)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (PR #172851)   Kerry McLaughlin via llvm-commits
• [llvm] [AArch64]: Replaced assertion with check (PR #173737)   Kevin Per via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   Kevin Sala Penades via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Kiran Chandramohan via llvm-commits
• [llvm] [RISCV][llvm-readobj,llvm-objdump] Use getRISCVVendorRelocationTypeName for RISCV vendor relocations (PR #172811)   Kito Cheng via llvm-commits
• [llvm] [RISCV][llvm-readobj,llvm-objdump] Use getRISCVVendorRelocationTypeName for RISCV vendor relocations (PR #172811)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Add support for XAndesPerf branch on immediate in RISCVRedundantCopyElimination (PR #174706)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Mark More Relocs as Relaxable (PR #151422)   Kito Cheng via llvm-commits
• [llvm] [DWARF] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   Konrad Kleine via llvm-commits
• [llvm] [DWARF] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   Konrad Kleine via llvm-commits
• [llvm] [DWARF][NFC] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   Konrad Kleine via llvm-commits
• [llvm] [DWARF][NFC] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   Konrad Kleine via llvm-commits
• [llvm] [DWARF][NFC] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   Konrad Kleine via llvm-commits
• [llvm] [DWARF][NFC] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   Konrad Kleine via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Krzysztof Drewniak via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Krzysztof Drewniak via llvm-commits
• [llvm] [mlir] Reland [mlir][amdgpu] Expose waitcnt bitpacking infra (PR #172678)   Krzysztof Drewniak via llvm-commits
• [llvm] [OpenMP] Fix member type name in LooprangeT, NFC (PR #174241)   Krzysztof Parzyszek via llvm-commits
• [llvm] [OpenMP] Remove special handling of implicit clauses in decomposition (PR #174654)   Krzysztof Parzyszek via llvm-commits
• [llvm] [OpenMP] Remove special handling of implicit clauses in decomposition (PR #174654)   Krzysztof Parzyszek via llvm-commits
• [flang] [llvm] [mlir] [OpenMP] Fix truncation/extension bug when calling __kmpc_push_num_teams (PR #173067)   Krzysztof Parzyszek via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add platform enumeration and info query using liboffload (PR #166927)   Kseniya Tikhomirova via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Kshitij Paranjape via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Kshitij Paranjape via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Kshitij Paranjape via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Kshitij Paranjape via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Kshitij Paranjape via llvm-commits
• [llvm] [DevirtSCC] Repeat inline while ind call is replaced by a non-call value (PR #174400)   Kunqiu Chen via llvm-commits
• [llvm] [UTC] Align label var handling of old lines to new lines (PR #173850)   Kunqiu Chen via llvm-commits
• [llvm] [docs] Strengthen our quality standards and connect AI contribution policy to it (PR #154441)   Kyrylo Riabov via llvm-commits
• [llvm] [mlir] [OpenMP][MLIR] Hoist static `alloca`s emitted by private `init` regions to the allocation IP of the construct (PR #171597)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm][RISCV] Support fma codegen for zvfbfa (PR #172949)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat fma chains which share concatenated operands (PR #174401)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [clang][RISCV] Support Zvfofp8min C intrinsic (PR #172630)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   LLVM Continuous Integration via llvm-commits
• [llvm] [RedirectingFileSystem] Don't update error result value (PR #172900)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstrProf] Mark __llvm_profile_runtime_user cold (PR #174174)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [mlir][Python] create MLIRPythonSupport (PR #171775)   LLVM Continuous Integration via llvm-commits
• [llvm] Add documentation for MemProf. (PR #172238)   LLVM Continuous Integration via llvm-commits
• [llvm] [DWP] Fix writeStringsAndOffsets declaration (PR #173298)   LLVM Continuous Integration via llvm-commits
• [llvm] [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (PR #152393)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   LLVM Continuous Integration via llvm-commits
• [llvm] [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (PR #152393)   LLVM Continuous Integration via llvm-commits
• [llvm] [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (PR #152393)   LLVM Continuous Integration via llvm-commits
• [llvm] [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (PR #152393)   LLVM Continuous Integration via llvm-commits
• [llvm] [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (PR #174307)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   LLVM Continuous Integration via llvm-commits
• [llvm] [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (PR #174307)   LLVM Continuous Integration via llvm-commits
• [llvm] [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (PR #174307)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC][C API] Replace 'bool' with 'LLVMBool'. (PR #174525)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   LLVM Continuous Integration via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.left and vector.splice.right (PR #170796)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   LLVM Continuous Integration via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   LLVM Continuous Integration via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (PR #174243)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add computeKnownBits for CLSW. (PR #174636)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [NFCI] [Darwin] Add APPLE_TARGET_IS_HOST lit option to compiler-rt (PR #174522)   LLVM Continuous Integration via llvm-commits
• [llvm] [InstCombine][AArch64] Lower NEON shift intrinsics when possible (PR #172465)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   LLVM Continuous Integration via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   LLVM Continuous Integration via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through glue (PR #174766)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV] Add legalization pass for zero-size arrays (PR #172367)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Add baseline test for SimplifyDemandedFPClass log handling (PR #173880)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   LLVM Continuous Integration via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV] Add legalization pass for zero-size arrays (PR #172367)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Add ISD::CTLS to canCreateUndefOrPoison. (PR #174709)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Reimplement VOP3 CMPX encoding fixup using PostEncoderMethod. NFCI. (PR #174799)   LLVM Continuous Integration via llvm-commits
• [llvm] [SPIRV] Add legalization pass for zero-size arrays (PR #172367)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (PR #174669)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [LLVM][NVPTX] Enable family specific support for a few intrinsics (PR #173268)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   LLVM Continuous Integration via llvm-commits
• [llvm] MIPS: expandDivRem add a NOP after BNE (PR #174908)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   LLVM Continuous Integration via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   LLVM Continuous Integration via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   LLVM Continuous Integration via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #174971)   LLVM Continuous Integration via llvm-commits
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• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   LLVM Continuous Integration via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC] Add utilities for limited symbolication of JIT backtraces (PR #175099)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC] Add utilities for limited symbolication of JIT backtraces (PR #175099)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC] Add utilities for limited symbolication of JIT backtraces (PR #175099)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC] Add utilities for limited symbolication of JIT backtraces (PR #175099)   LLVM Continuous Integration via llvm-commits
• [llvm] [ORC] Add utilities for limited symbolication of JIT backtraces (PR #175099)   LLVM Continuous Integration via llvm-commits
• [llvm] Reapply "[llvm-exegesis] Add AArch64 operand initializers, SetRegTo" (#174729) (PR #174944)   LLVM Continuous Integration via llvm-commits
• [llvm] [Instcombine] Fix crash in foldMinimumMaximumSharedOp. (PR #173705)   LLVM Continuous Integration via llvm-commits
• [llvm] [CMake] Don't explicitly set folder for InstrumentationTests (PR #170041)   LLVM Continuous Integration via llvm-commits
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• [llvm] [CSKY] Use `softPromoteHalfType` (PR #175138)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Rename commute-clmul.ll -> commute-pclmul.ll (PR #175157)   LLVM Continuous Integration via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   LLVM Continuous Integration via llvm-commits
• [llvm] 5f0bfc8 - [gn build] Port 75d025124aa3   LLVM GN Syncbot via llvm-commits
• [llvm] 187942d - [gn build] Port 7f9a00e59c56   LLVM GN Syncbot via llvm-commits
• [llvm] a9bdc41 - [gn build] Port ba6c5f8e4ed3   LLVM GN Syncbot via llvm-commits
• [llvm] [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (PR #174307)   Lang Hames via llvm-commits
• [llvm] [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (PR #174307)   Lang Hames via llvm-commits
• [llvm] [ORC][MCJIT] add RuntimeLibraryInfoWrapper pass to PM (PR #174682)   Lang Hames via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Lang Hames via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Lang Hames via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Lang Hames via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Lang Hames via llvm-commits
• [llvm] [ORC] Add JITDylibDefunct Error. (PR #174923)   Lang Hames via llvm-commits
• [llvm] [ORC] Add JITDylibDefunct Error. (PR #174923)   Lang Hames via llvm-commits
• [llvm] [ORC] Add utilities for limited symbolication of JIT backtraces (PR #175099)   Lang Hames via llvm-commits
• [llvm] Revert "[aarch64] Mix the frame pointer with the stack cookie when protecting the stack (#161114)" (PR #173987)   Leandro Lupori via llvm-commits
• [clang] [llvm] [PowerPC] Add Support for BCDSHIFT, BCDSHIFTR, BCDTRUNC, BCDUTRUNC, and BCDUSHIFT instruction support (PR #154715)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Optimize not equal compares against zero vectors (PR #150422)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   Lei Huang via llvm-commits
• [llvm] [NFC][PowerPC] fix IR to be splat and not zeroinitializer (PR #174699)   Lei Huang via llvm-commits
• [llvm] [AMDGPU] Propagate alias information in AMDGPULowerKernelArguments. (PR #174977)   Leon Clark via llvm-commits
• [llvm] 292c613 - [gn build] Port c7c5259f016bdb12c670b1fba84a17417ff8e3a2   Leonard Grey via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Liao Chunyu via llvm-commits
• [llvm] [DAGCombine]Fold (fadd A, Splat(fneg(B))) -> (fsub A, Splat(B)) (PR #173967)   Liao Chunyu via llvm-commits
• [llvm] [DAGCombine]Fold (fadd A, Splat(fneg(B))) -> (fsub A, Splat(B)) (PR #173967)   Liao Chunyu via llvm-commits
• [llvm] [DAG]Add ISD::SPLAT_VECTOR to TargetLowering::getNegatedExpression (PR #173967)   Liao Chunyu via llvm-commits
• [llvm] [DebugInfo] Suppress template parameter information in the skeleton CU. (PR #173342)   Liu Ke via llvm-commits
• [clang] [llvm] [DebugInfo] Introduce metadata flag for -gsimple-template-names and optimize template params in skeleton CU. (PR #174904)   Liu Ke via llvm-commits
• [llvm] [DebugInfo] Add a new DI flag to record if the name of a template function/type has been simplified (1/3). (PR #175130)   Liu Ke via llvm-commits
• [llvm] [DebugInfo] Add a new DI flag to record if the name of a template function/type has been simplified (1/3). (PR #175130)   Liu Ke via llvm-commits
• [llvm] [DebugInfo] Add a new DI flag to record if the name of a template function/type has been simplified (1/3). (PR #175130)   Liu Ke via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Lucas Ramirez via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Allow amdgpu-waves-per-eu to lower target occupancy range (PR #168358)   Lucas Ramirez via llvm-commits
• [llvm] [Draft][AMDGPU] Take into account amdgpu-waves-per-eu in getRegPressureLimit (PR #173992)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Allow amdgpu-waves-per-eu to lower target occupancy range (PR #168358)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Scoring system for rematerializations (PR #175050)   Lucas Ramirez via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define empty set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Define set of BPF libcalls (PR #169537)   Lucas Ste via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   Lucas Ste via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   Lucas Ste via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   Lucas Ste via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   Lucas Ste via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   Lucas Ste via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   Lucas Ste via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Luke Lau via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.left and vector.splice.right (PR #170796)   Luke Lau via llvm-commits
• [llvm] [IR] Split vector.splice into vector.splice.left and vector.splice.right (PR #170796)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   Luke Lau via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   Luke Lau via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Luke Lau via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Luke Lau via llvm-commits
• [llvm] [LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (PR #170159)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Luke Lau via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Luke Lau via llvm-commits
• [llvm] [NFC][LV]: Differentiate between Pred and Unpred masked operations. (PR #169509)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Luke Lau via llvm-commits
• [llvm] Add lowering for llvm.vector.splice.va (PR #174261)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify extract-lane with scalar operand to the scalar value itself. (PR #174534)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   Luke Lau via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Luke Lau via llvm-commits
• [llvm] [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (PR #173808)   Luke Lau via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   Luke Lau via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   Luke Lau via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   Luke Lau via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Luke Lau via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   Luke Lau via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   Luke Lau via llvm-commits
• [llvm] [LV] Prevent `extract-lane` generate unused IRs with single vector operand. (PR #172798)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (PR #174713)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (PR #174713)   Luke Lau via llvm-commits
• [llvm] [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (PR #174713)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify extract-lane with scalar operand to the scalar value itself. (PR #174534)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Luke Lau via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Skip WASM-specific InstCombine tests properly (PR #174900)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Skip WASM-specific InstCombine tests properly (PR #174900)   Luke Lau via llvm-commits
• [llvm] [LV] Simplify extract-lane with scalar operand to the scalar value itself. (PR #174534)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Luke Lau via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Luke Lau via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Luke Lau via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Luke Lau via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with predicated successors (PR #172454)   Luke Lau via llvm-commits
• [llvm] [VPlan] Strip iterator-invalidation guard in findHeaderMask (NFC) (PR #174930)   Luke Lau via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Luke Lau via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Luke Lau via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Luke Lau via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with predicated successors (PR #172454)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with predicated successors (PR #172454)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with predicated successors (PR #172454)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with predicated successors (PR #172454)   Luke Lau via llvm-commits
• [llvm] [VPlan] Handle early exit loops with non-dereferenceable loads in latch (PR #172454)   Luke Lau via llvm-commits
• [llvm] [VPlan] Allow tail folding with uncountable early exits (PR #174974)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Luke Lau via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [GVN] Support rnflow pattern matching and transform (PR #162259)   Madhur Amilkanthwar via llvm-commits
• [llvm] [mlir] [mlir][Python] create MLIRPythonSupport (PR #171775)   Maksim Levental via llvm-commits
• [llvm] [mlir] [mlir][Python] move IRTypes and IRAttributes to MLIRPythonSupport (PR #174118)   Maksim Levental via llvm-commits
• [llvm] [mlir] [MLIR][Python] remove pybind11 support (PR #172581)   Maksim Levental via llvm-commits
• [llvm] [GitHub] Add more glob patterns for `mlir:python` label (PR #174711)   Maksim Levental via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   Maksim Levental via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   Maksim Levental via llvm-commits
• [llvm] [BOLT][AArch64] Add rseq test (PR #174413)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Remove unnecessary dependency. NFC (PR #174645)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Remove unnecessary dependency. NFC (PR #174645)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Add call relaxation pass (PR #173952)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Add call relaxation pass (PR #173952)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT][AArch64] Add call relaxation pass (PR #173952)   Maksim Panchenko via llvm-commits
• [llvm] fdead4d - [BOLT] Update maintainers list   Maksim Panchenko via llvm-commits
• [llvm] [Verifier] Use not --crash for assertion (PR #174296)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Handle poison values in lifetime intrinsics (PR #174578)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Handle poison values in lifetime intrinsics (PR #174578)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Handle poison values in lifetime intrinsics (PR #174578)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Handle poison values in lifetime intrinsics (PR #174578)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Add support for non-interposable function aliases (PR #172730)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   Manuel Carrasco via llvm-commits
• [clang] [llvm] [Clang] Add __builtin_allow_sanitize_check() (PR #172030)   Marco Elver via llvm-commits
• [clang] [llvm] [Clang] Add __builtin_allow_sanitize_check() (PR #172030)   Marco Elver via llvm-commits
• [clang] [llvm] [Clang] Add __builtin_allow_sanitize_check() (PR #172030)   Marco Elver via llvm-commits
• [clang] [llvm] [Clang] Add __builtin_allow_sanitize_check() (PR #172030)   Marco Elver via llvm-commits
• [clang] [llvm] [Clang] Add __builtin_allow_sanitize_check() (PR #172030)   Marco Elver via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   Marco Elver via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   Marco Elver via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   Marco Elver via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   Marco Elver via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Mark Zhuang via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Mark Zhuang via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Mark Zhuang via llvm-commits
• [clang] [flang] [lld] [llvm] [mlir] [RFC] Use pre-compiled headers to speed up LLVM build (~1.5-2x) (PR #173868)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Add the --fat-lto-objects flag (PR #174962)   Martin Storsjö via llvm-commits
• [lld] [llvm] [llvm][LLD][COFF] Add fat-lto-object support for COFF targets (PR #165529)   Martin Storsjö via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #165449)   Martin Storsjö via llvm-commits
• [lld] [LLD] [MinGW] Add the --fat-lto-objects flag (PR #174962)   Martin Storsjö via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Marvin Häuser via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Marvin Häuser via llvm-commits
• [clang] [llvm] [PowerPC] Add AMO load signed builtins (PR #168747)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   Maryam Moghadas via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add AMO load signed builtins (PR #168747)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [PowerPC] Add AMO load builtins for conditional increment/decrement (PR #169435)   Maryam Moghadas via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for fmul SimplifyDemandedFPClass handling (PR #173871)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Use reference type in loop (NFC) (PR #174379)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add MipsPat `add $gp, (select $cond, tglobaladdr, tglobaladdr)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add MipsPat `add $gp, (select $cond, tglobaladdr, tglobaladdr)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Matt Arsenault via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Matt Arsenault via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Matt Arsenault via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   Matt Arsenault via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Matt Arsenault via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   Matt Arsenault via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Matt Arsenault via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Matt Arsenault via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Matt Arsenault via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Matt Arsenault via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Matt Arsenault via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Matt Arsenault via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Positive normal exp results imply possible negative normal inputs (PR #174273)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Reorder exp's known-nan source handling (PR #174417)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Reorder exp's known-nan source handling (PR #174417)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Reorder exp's known-nan source handling (PR #174417)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Reorder exp's known-nan source handling (PR #174417)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Generate more efficient code to avoid shift64 hazard (PR #171871)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Reorder exp's known-nan source handling (PR #174417)   Matt Arsenault via llvm-commits
• [llvm] [NFC][AMDGPU] Declare variables initialized with getDebugLoc (PR #174434)   Matt Arsenault via llvm-commits
• [llvm] [IR] Do not assert and verify that phi nodes do not have a token type (PR #174449)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Add lowering for llvm.vector.splice.va (PR #174261)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fmul operand could be undef (PR #174458)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fmul operand could be undef (PR #174458)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fmul operand could be undef (PR #174458)   Matt Arsenault via llvm-commits
• [llvm] [UEFI] Codeview do not crash when no llvm.dbg.cu (PR #174460)   Matt Arsenault via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Matt Arsenault via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Matt Arsenault via llvm-commits
• [llvm] [TableGen] Fix what looks like a mistake in RegClassByHwMode.td test. NFC (PR #174252)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG][ARM] Add lowering for strict fp16 nodes on systems without fullfp16 (PR #173666)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fmul operand could be undef (PR #174458)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Matt Arsenault via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for fmul SimplifyDemandedFPClass handling (PR #173871)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Matt Arsenault via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Matt Arsenault via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Matt Arsenault via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   Matt Arsenault via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   Matt Arsenault via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Convert tests to opaque pointers (PR #174563)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Convert tests to opaque pointers (PR #174563)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Convert tests to opaque pointers (PR #174563)   Matt Arsenault via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   Matt Arsenault via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   Matt Arsenault via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   Matt Arsenault via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   Matt Arsenault via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   Matt Arsenault via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: clang-format AMDGPULowerKernelAttributes (PR #174567)   Matt Arsenault via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   Matt Arsenault via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   Matt Arsenault via llvm-commits
• [llvm] SPIRV: Convert tests to opaque pointers (PR #174563)   Matt Arsenault via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Matt Arsenault via llvm-commits
• [llvm] Revert "AMDGPU: Do not infer implicit inputs for !nocallback intrinsics" (PR #174224)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Matt Arsenault via llvm-commits
• [llvm] [UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (PR #174117)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Use LibcallLoweringInfo analysis in legalizer (PR #170328)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate debug locations to compiler-generated instructions (PR #168573)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate debug locations to compiler-generated instructions (PR #168573)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Propagate debug locations to compiler-generated instructions (PR #168573)   Matt Arsenault via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Matt Arsenault via llvm-commits
• [llvm] [UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (PR #174117)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Matt Arsenault via llvm-commits
• [llvm] [RuntimeLibcalls] Rework LibcallImplCallingConvs to reduce stack usage (PR #174689)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add ISD::CTLS to canCreateUndefOrPoison. (PR #174709)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Matt Arsenault via llvm-commits
• [llvm] DeveloperPolicy: Add note about legacy bitcode performance (PR #174720)   Matt Arsenault via llvm-commits
• [llvm] DeveloperPolicy: Add note about legacy bitcode performance (PR #174720)   Matt Arsenault via llvm-commits
• [llvm] DeveloperPolicy: Add note about legacy bitcode performance (PR #174720)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Matt Arsenault via llvm-commits
• [llvm] DeveloperPolicy: Add note about legacy bitcode performance (PR #174720)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Matt Arsenault via llvm-commits
• [llvm] Revert "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174758)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Matt Arsenault via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Matt Arsenault via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Matt Arsenault via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove some redundant SubtargetPredicate settings. NFC. (PR #174788)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline test for SimplifyDemandedFPClass log handling (PR #173880)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline test for SimplifyDemandedFPClass log handling (PR #173880)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for minimum/maximum SimplifyDemandedFPClass handling (PR #173896)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for minimum/maximum SimplifyDemandedFPClass handling (PR #173896)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle fmul by -0 case in SimplifyDemandedFPClass (PR #174023)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle fmul by -0 case in SimplifyDemandedFPClass (PR #174023)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline test for SimplifyDemandedFPClass log handling (PR #173880)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle minimum/maximum in SimplifyDemandedFPClass (PR #173897)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle minimum/maximum in SimplifyDemandedFPClass (PR #173897)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle log/log2/log10 in SimplifyDemandedFPClass (PR #173881)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline minimumnum/maximumnum SimplifyDemandedFPClass tests (#173976) (PR #174817)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline minimumnum/maximumnum SimplifyDemandedFPClass tests (#173976) (PR #174817)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline minimumnum/maximumnum SimplifyDemandedFPClass tests (#173976) (PR #174817)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline minimumnum/maximumnum SimplifyDemandedFPClass tests (#173976) (PR #174817)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle log/log2/log10 in SimplifyDemandedFPClass (PR #173881)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle minimum/maximum in SimplifyDemandedFPClass (PR #173897)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle minimum/maximum in SimplifyDemandedFPClass (PR #173897)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle fmul by -0 case in SimplifyDemandedFPClass (PR #174023)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Consider not-inf/nan context when simplifying fmul (PR #174024)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Consider not-inf/nan context when simplifying fmul (PR #174024)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Consider not-inf/nan context when simplifying fmul (PR #174024)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Handle minimumnum/maximumnum in SimplifyDemandedFPClass (PR #173977)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Baseline tests for sqrt never returning denormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Baseline tests for sqrt never returning denormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Teach lowering that sqrt never returns subnormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Teach lowering that sqrt never returns subnormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Teach lowering that sqrt never returns subnormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Teach lowering that sqrt never returns subnormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (PR #174845)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add fpext SimplifyDemandedFPClass baseline tests (PR #174848)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Consider not-inf/nan context when simplifying fmul (PR #174024)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add fpext SimplifyDemandedFPClass baseline tests (PR #174848)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add fpext SimplifyDemandedFPClass baseline tests (PR #174848)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Implement SimplifyDemandedFPClass for sqrt (PR #173883)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (PR #174662)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (PR #174662)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (PR #174845)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Prepare to handle multiple uses in SimplifyDemandedFPClass (PR #174863)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Prepare to handle multiple uses in SimplifyDemandedFPClass (PR #174863)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Prepare to handle multiple uses in SimplifyDemandedFPClass (PR #174863)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Add command-line flags for memory operation inline thresholds (PR #172829)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Set up full SimplifyQuery for nofpclass (PR #174928)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Set up full SimplifyQuery for nofpclass (PR #174928)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Set up full SimplifyQuery for nofpclass (PR #174928)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Use fcmp parent function to query denormal mode (PR #174929)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Use fcmp parent function to query denormal mode (PR #174929)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Use fcmp parent function to query denormal mode (PR #174929)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add MipsPat `(MipsGPRel tglobaladdr:$in)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add MipsPat `(MipsGPRel tglobaladdr:$in)` to select MipsISD::GPRel TargetGlobalAddress (PR #165531)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add MipsPat `(MipsGPRel tglobaladdr:$in)` to select MipsISD::GPRel TargetGlobalAddress (PR #165531)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Teach lowering that sqrt never returns subnormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Teach lowering that sqrt never returns subnormal (PR #174838)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Refactor computeKnownFPClass select handling (PR #174957)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Refactor computeKnownFPClass select handling (PR #174957)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Refactor computeKnownFPClass select handling (PR #174957)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Add builtin/intrinsic global_(load|store)_b128 (PR #172090)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   Matt Arsenault via llvm-commits
• [llvm] [PHIElimination] Ensure correct copy emission for `INLINEASM_BR` indirect targets (PR #173396)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Simplify class VINTERPe. NFC. (PR #175006)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Refactor computeKnownFPClass select handling (PR #174957)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fixup known fp class for select and compare (PR #174958)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fixup known fp class for select and compare (PR #174958)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Fixup known fp class for select and compare (PR #174958)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for improved copysign handling (PR #175026)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for improved copysign handling (PR #175026)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for improved copysign handling (PR #175026)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Add more baseline tests for fdiv sign tracking (PR #174651)   Matt Arsenault via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Implement SimplifyDemandedFPClass for sqrt (PR #173883)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Unify ISD::LOAD handling in ComputeNumSignBits. NFC (PR #175060)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Unify ISD::LOAD handling in ComputeNumSignBits. NFC (PR #175060)   Matt Arsenault via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Matt Arsenault via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Matt Arsenault via llvm-commits
• [llvm] Precommit test for PR #171012 (PR #171013)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Consider imm offsets when sorting framerefs (PR #171012)   Matt Arsenault via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement llvm.fptosi.sat and llvm.fptoui.sat (PR #174726)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Matt Arsenault via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Matt Arsenault via llvm-commits
• [llvm] DeveloperPolicy: Add note about legacy bitcode performance (PR #174720)   Matt Arsenault via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Matt Arsenault via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_PTRMASK (PR #174889)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_UMULH, G_SMULH (PR #174555)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (PR #174662)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FLDEXP (PR #175072)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize block count calculations to the new ABI (PR #174112)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   Matt Arsenault via llvm-commits
• [llvm] [LangRef] Normalize IEEE 754 spelling (PR #174721)   Matt Arsenault via llvm-commits
• [llvm] [MachineVerifier](NFC)(TestOnly) Canonicalise top-level MachineVerifier tests (PR #172527)   Matt Arsenault via llvm-commits
• [llvm] [MachineVerifier](NFC)(TestOnly) Canonicalise top-level MachineVerifier tests (PR #172527)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FLDEXP (PR #175072)   Matt Arsenault via llvm-commits
• [llvm] [bazel] Add potential bzlmod inclusion example (PR #173124)   Matt Clarkson via llvm-commits
• [llvm] [Support] Join threads when stopping the ThreadPoolExecutor (PR #166054)   Maurice Heumann via llvm-commits
• [llvm] [llvm][utils] Bump urllib to 2.6.3 (PR #174880)   Max Kudryavtsev via llvm-commits
• [llvm] [llvm][utils] Bump urllib to 2.6.3 (PR #174880)   Max Kudryavtsev via llvm-commits
• [llvm] [cmake] Make CMAKE_BUILD_TYPE=Release the default (PR #174520)   Mehdi Amini via llvm-commits
• [llvm] [cmake] Make CMAKE_BUILD_TYPE=Release the default (PR #174520)   Mehdi Amini via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [IVDescriptors] Bail out on FindFirst/FindLast reductions on i1. (PR #174225)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Mel Chen via llvm-commits
• [llvm] [VPlan] Transform VPFirstOrderRecurrencePHIRecipe into concrete recipes (PR #172009)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Mel Chen via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Mel Chen via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [LV][EVL] Add test case for issue #173260. nfc (PR #173262)   Mel Chen via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Mel Chen via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink vector loop region recipes in licm (PR #172343)   Mel Chen via llvm-commits
• [llvm] [cross-project] Add tests for LLDB data-formatters for llvm::ArrayRef (PR #173238)   Michael Buch via llvm-commits
• [llvm] [cross-project] Add tests for LLDB data-formatters for llvm::ArrayRef (PR #173238)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests] Unset _FORTIFY_SOURCE when building the LLDB formatter tests (PR #174770)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests] Unset _FORTIFY_SOURCE when building the LLDB formatter tests (PR #174770)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   Michael Buch via llvm-commits
• [llvm] [cross-project] Add tests for LLDB data-formatters for llvm::ArrayRef (PR #173238)   Michael Buch via llvm-commits
• [llvm] [VPlan] Mark variable unused in release build [[maybe_unused]] (PR #174648)   Michael Jones via llvm-commits
• [llvm] [bazel] Port f79f50c (PR #175068)   Michael Jones via llvm-commits
• [flang] [llvm] [mlir] [OpenMP] Fix truncation/extension bug when calling __kmpc_push_num_teams (PR #173067)   Michael Klemm via llvm-commits
• [llvm] [runtimes][CMake] Move Fortran support code from flang-rt (PR #171610)   Michael Kruse via llvm-commits
• [llvm] [Flang-RT] Add test dependency (PR #174427)   Michael Kruse via llvm-commits
• [llvm] [Flang-RT] Add test dependency (PR #174427)   Michael Kruse via llvm-commits
• [llvm] [Flang-RT] Add test dependency (PR #174427)   Michael Kruse via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [polly] [Polly] Allow changing array dims when importing JScop (PR #174582)   Michael Kruse via llvm-commits
• [polly] [Polly] Allow changing array dims when importing JScop (PR #174582)   Michael Kruse via llvm-commits
• [polly] [Polly] Allow changing array dims when importing JScop (PR #174582)   Michael Kruse via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   Michael Kruse via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   Michael Kruse via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   Michael Kruse via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Michael Kruse via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   Michael Kruse via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   Michael Kruse via llvm-commits
• [llvm] [polly] [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (PR #166809)   Michael Kruse via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Michael Kruse via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michael Kruse via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   Michael Kruse via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michael Kruse via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Michael Kruse via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michael Kruse via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   Michael Kruse via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   Michael Kruse via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   Michael Kruse via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   Michael Kruse via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   Michael Kruse via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #174963)   Michael Kruse via llvm-commits
• [llvm] 474c6ad - [TwoAddressInstruction] Remove AA from twoaddressinstruction. NFC   Michael Liao via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [llvm] [openmp] [offload][openmp] - Remove standalone build in favor of 'runtimes' (PR #170693)   Michał Górny via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Miguel Saldivar via llvm-commits
• [llvm] [cross-project] Add tests for LLDB data-formatters for llvm::ArrayRef (PR #173238)   Mikael Holmen via llvm-commits
• [llvm] [RISCV] Add basic Mach-O triple support. (PR #141682)   Mikael Holmen via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Mikael Holmen via llvm-commits
• [llvm] [cross-project-tests] Unset _FORTIFY_SOURCE when building the LLDB formatter tests (PR #174770)   Mikael Holmen via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Mikael Holmen via llvm-commits
• [llvm] [cross-project] Add tests for LLDB data-formatters for llvm::ArrayRef (PR #173238)   Mikael Holmen via llvm-commits
• [llvm] [cross-project] Add tests for LLDB data-formatters for llvm::ArrayRef (PR #173238)   Mikael Holmen via llvm-commits
• [llvm] [CFIInserter] Improve `CSRSavedLocation` struct. (PR #168869)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen] Refactor `determineCalleeSaves`. (PR #166763)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen] Refactor `determineCalleeSaves`. (PR #166763)   Mikhail Gudim via llvm-commits
• [llvm] [CFIInserter] Improve `CSRSavedLocation` struct. (PR #168869)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen][NFC] Improve readability of getLocalLiveOutMIDef (PR #175074)   Mikhail Gudim via llvm-commits
• [llvm] [ReachingDefAnalysis][NFC] Use named constants. (PR #175075)   Mikhail Gudim via llvm-commits
• [llvm] [ReachingDefAnalysis][NFC] Use named constants. (PR #175075)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen][NFC] Improve readability of getLocalLiveOutMIDef (PR #175074)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen][NFC] Improve readability of getLocalLiveOutMIDef (PR #175074)   Mikhail Gudim via llvm-commits
• [llvm] [CodeGen][NFC] Improve readability of getLocalLiveOutMIDef (PR #175074)   Mikhail Gudim via llvm-commits
• [llvm] [ReachingDefAnalysis] Simpilify `getGlobalReachingDefs` (PR #175169)   Mikhail Gudim via llvm-commits
• [llvm] [ReachingDefAnalysis][NFC] Use named constants. (PR #175075)   Mikhail Gudim via llvm-commits
• [llvm] [CFIInserter] Improve `CSRSavedLocation` struct. (PR #168869)   Mikhail Gudim via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Mikhail R. Gadelha via llvm-commits
• [llvm] [IR] Propagate fast-math flags through autoupgraded target intrinsics (PR #174432)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Honor rewrite semantics in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Don't check global nsz flag in x86ISel (PR #174627)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] Add remaining patterns for floating-point flag matches (PR #173912)   Mikołaj Piróg via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Min-Yih Hsu via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV][MCA] Consolidate inputs for different SchedModel tests (PR #173926)   Min-Yih Hsu via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Add a custom pre-ra scheduler (PR #172613)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new syntax for processor-specific tuning feature strings (Take 2) (PR #175063)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new tune feature string syntax and its parser (PR #168160)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Introduce a new syntax for processor-specific tuning feature strings (Take 2) (PR #175063)   Min-Yih Hsu via llvm-commits
• [llvm] Add documentation for MemProf. (PR #172238)   Mingming Liu via llvm-commits
• [clang] [llvm] [StaticDataLayout][MemProf]Introduce an LLVM option to specify one of read-only vs read-write sections using data access profiles (PR #174921)   Mingming Liu via llvm-commits
• [clang] [llvm] [StaticDataLayout][MemProf]Introduce an LLVM option to specify one of read-only vs read-write sections using data access profiles (PR #174921)   Mingming Liu via llvm-commits
• [llvm] Add merge-calling-conv.ll to profcheck-xfail.txt (PR #174418)   Mircea Trofin via llvm-commits
• [llvm] Add merge-calling-conv.ll to profcheck-xfail.txt (PR #174418)   Mircea Trofin via llvm-commits
• [llvm] [MLGO] Drop RegallocScoring Pass (PR #173746)   Mircea Trofin via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec lib refactor (PR #174133)   Mircea Trofin via llvm-commits
• [llvm] [InstrProf] Mark __llvm_profile_runtime_user cold (PR #174174)   Mircea Trofin via llvm-commits
• [llvm] Memset (PR #174490)   Mircea Trofin via llvm-commits
• [llvm] update UTC test (PR #174630)   Mircea Trofin via llvm-commits
• [llvm] update UTC test (PR #174630)   Mircea Trofin via llvm-commits
• [llvm] [nfc] update UTC test (PR #174630)   Mircea Trofin via llvm-commits
• [llvm] [nfc] UTC-update AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll (PR #174630)   Mircea Trofin via llvm-commits
• [llvm] [nfc] UTC-update AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll (PR #174630)   Mircea Trofin via llvm-commits
• [llvm] [nfc] UTC-update AMDGPU/lower-buffer-fat-pointers-mem-transfer.ll (PR #174630)   Mircea Trofin via llvm-commits
• [llvm] Memset (PR #174490)   Mircea Trofin via llvm-commits
• [llvm] Memset (PR #174490)   Mircea Trofin via llvm-commits
• [llvm] Memset (PR #174490)   Mircea Trofin via llvm-commits
• [llvm] [LowerMemIntrinsics] Propagate value profile to branch weights (PR #174490)   Mircea Trofin via llvm-commits
• [llvm] [LowerMemIntrinsics] Propagate value profile to branch weights (PR #174490)   Mircea Trofin via llvm-commits
• [llvm] [AArch64] Use a load instead of a store for inline stack probes (PR #170855)   Momchil Velikov via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Use a load instead of a store for inline stack probes (PR #170855)   Momchil Velikov via llvm-commits
• [llvm] [AArch64] Use a load instead of a store for inline stack probes (PR #170855)   Momchil Velikov via llvm-commits
• [clang] [llvm] [Coverage] Make additional counters available for BranchRegion. NFC. (PR #120930)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [Coverage] Make additional counters available for BranchRegion. NFC. (PR #120930)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [Coverage] Make additional counters available for BranchRegion. NFC. (PR #120930)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [Coverage] Make additional counters available for BranchRegion. NFC. (PR #120930)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [Coverage] Make additional counters available for BranchRegion. NFC. (PR #120930)   NAKAMURA Takumi via llvm-commits
• [llvm] Fix Xtensa Bazel build (PR #173073)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [Coverage] Make additional counters available for BranchRegion. NFC. (PR #120930)   NAKAMURA Takumi via llvm-commits
• [clang] [llvm] [Coverage] Make additional counters available for BranchRegion. NFC. (PR #120930)   NAKAMURA Takumi via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Nashe Mncube via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   Nashe Mncube via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Nathan Chancellor via llvm-commits
• [llvm] [MachineVerifier](NFC)(TestOnly) Canonicalise top-level MachineVerifier tests (PR #172527)   Nathan Corbyn via llvm-commits
• [llvm] [InstCombine] Add combines for unsigned comparison of absolute value to constant (PR #172021)   Nathan Corbyn via llvm-commits
• [llvm] [InstCombine] Add combines for unsigned comparison of absolute value to constant (PR #172021)   Nathan Corbyn via llvm-commits
• [llvm] [InstCombine] Add combines for unsigned comparison of absolute value to constant (PR #172021)   Nathan Corbyn via llvm-commits
• [llvm] [InstCombine] Add combines for unsigned comparison of absolute value to constant (PR #172021)   Nathan Corbyn via llvm-commits
• [llvm] [InstCombine] Add combines for unsigned comparison of absolute value to constant (PR #172021)   Nathan Corbyn via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Nathan Corbyn via llvm-commits
• [llvm] [InstCombine] Add combines for unsigned comparison of absolute value to constant (PR #172021)   Nathan Corbyn via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   Nathan Gauër via llvm-commits
• [llvm] [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (PR #174734)   Nathan Gauër via llvm-commits
• [llvm] [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (PR #174734)   Nathan Gauër via llvm-commits
• [llvm] [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (PR #174734)   Nathan Gauër via llvm-commits
• [clang] [llvm] Make OpenCL an OSType rather than an EnvironmentType. (PR #170297)   Nathan Gauër via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Neil Phan via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Neil Phan via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Neil Phan via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Neil Phan via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Neil Phan via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Neil Phan via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Neil Phan via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [llvm] [PHIElimination] Ensure correct copy emission for `INLINEASM_BR` indirect targets (PR #173396)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Nick Desaulniers via llvm-commits
• [llvm] [SPIRV] Add legalization pass for zero-size arrays (PR #172367)   Nick Sarnie via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] Fix requires.c after 'not' behavior change (PR #174499)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Add legalization pass for zero-size arrays (PR #172367)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Add legalization pass for zero-size arrays (PR #172367)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   Nick Sarnie via llvm-commits
• [llvm] [Offload] Fix line numbers after #174804 (PR #174932)   Nick Sarnie via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   Nick Sarnie via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Nick Sarnie via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Nick Sarnie via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] Enable llvm-omp-device-info.c on Intel GPUs (PR #175084)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] Enable llvm-omp-device-info.c on Intel GPUs (PR #175084)   Nick Sarnie via llvm-commits
• [llvm] [offload][lit] Enable llvm-omp-device-info.c on Intel GPUs (PR #175084)   Nick Sarnie via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Nicolai Hähnle via llvm-commits
• [llvm] [ValueTracking] Support ptrtoaddr in computeKnownBits() (PR #173358)   Nikita Popov via llvm-commits
• [llvm] [ValueTracking] Support ptrtoaddr in inequality implication (PR #173362)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Nikita Popov via llvm-commits
• [llvm] 8fd85ba - [LLVM] Temporarily allow implicit truncation in some places   Nikita Popov via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Nikita Popov via llvm-commits
• [llvm] [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (PR #174307)   Nikita Popov via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Nikita Popov via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Nikita Popov via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Nikita Popov via llvm-commits
• [llvm] a82e6ee - Revert "[ConstantInt] Disable implicit truncation in ConstantInt::get() (#171456)"   Nikita Popov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Nikita Popov via llvm-commits
• [llvm] [IVDescriptors] Bail out on FindFirst/FindLast reductions on i1. (PR #174225)   Nikita Popov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Nikita Popov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Nikita Popov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Nikita Popov via llvm-commits
• [llvm] [RFC][SPIR-V] Add intrinsics to convert to/from ap.float (PR #164252)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   Nikita Popov via llvm-commits
• [llvm] [Verifier] Use not --crash for assertion (PR #174296)   Nikita Popov via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   Nikita Popov via llvm-commits
• [clang] [llvm] IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (PR #174484)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   Nikita Popov via llvm-commits
• [llvm] d189b49 - Reapply [ConstantInt] Disable implicit truncation in ConstantInt::get() (#171456)   Nikita Popov via llvm-commits
• [llvm] 0e789a8 - Revert "Reapply [ConstantInt] Disable implicit truncation in ConstantInt::get() (#171456)"   Nikita Popov via llvm-commits
• [llvm] Group the InstrumentationTests target with other LLVM unit test targe… (PR #170041)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Handle poison values in lifetime intrinsics (PR #174578)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   Nikita Popov via llvm-commits
• [llvm] 7f6afc4 - [CGP] Use getSigned() for scale during address sinking   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Nikita Popov via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle all PtrtoIntExpr construction in CastSinkingRewriter (NFC) (PR #174435)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle all PtrtoIntExpr construction in CastSinkingRewriter (NFC) (PR #174435)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle all PtrtoIntExpr construction in CastSinkingRewriter (NFC) (PR #174435)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle all PtrtoIntExpr construction in CastSinkingRewriter (NFC) (PR #174435)   Nikita Popov via llvm-commits
• [llvm] [SCEV] Handle all PtrtoIntExpr construction in CastSinkingRewriter (NFC) (PR #174435)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] a83c894 - Reapply [ConstantInt] Disable implicit truncation in ConstantInt::get() (#171456)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Normalize IEEE 754 spelling (PR #174721)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] faa7ede - [llvm-stress] Allow implicit truncation   Nikita Popov via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [CMake] Drop per-target LLVM_REQUIRES_RTTI (PR #174201)   Nikita Popov via llvm-commits
• [llvm] [CMake] Fix for d1b88ca (PR #174873)   Nikita Popov via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (PR #152684)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (PR #152684)   Nikita Popov via llvm-commits
• [llvm] [WebAssembly] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152833)   Nikita Popov via llvm-commits
• [llvm] [WebAssembly] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152833)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152632)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152632)   Nikita Popov via llvm-commits
• [llvm] [CommandLine] Use DenseMap instead of StringMap (NFC) (PR #174988)   Nikita Popov via llvm-commits
• [llvm] [CommandLine] Use DenseMap instead of StringMap (NFC) (PR #174988)   Nikita Popov via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   Nikita Popov via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   Nikita Popov via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Nikita Popov via llvm-commits
• [llvm] [regex][FileCheck] Support back-references up to 20. (PR #174150)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Nikita Popov via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Nikita Popov via llvm-commits
• [llvm] [XTensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   Nikita Popov via llvm-commits
• [llvm] fix for miscompilation for #150120 (PR #173961)   Nikita Popov via llvm-commits
• [llvm] fix for miscompilation for #150120 (PR #173961)   Nikita Popov via llvm-commits
• [llvm] fix for miscompilation for #150120 (PR #173961)   Nikita Popov via llvm-commits
• [llvm] [MoveAutoInit] Fix for miscompilation for #150120 (PR #173961)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   Nikita Popov via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Nikita Popov via llvm-commits
• [llvm] 1c07ba6 - [SeparateConstOffsetFromGEP] Use getSigned() for accumulated offset   Nikita Popov via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Ensure simplifyValueKnownNonZero adds instrs in dominance order. (PR #173703)   Nikita Popov via llvm-commits
• [llvm] [Instcombine] Fix infinite loop in visitSelectInst. (PR #173704)   Nikita Popov via llvm-commits
• [llvm] [Lanai] Use `softPromoteHalfType` (PR #175137)   Nikita Popov via llvm-commits
• [llvm] [Lanai] Use `softPromoteHalfType` (PR #175137)   Nikita Popov via llvm-commits
• [llvm] [MSP430] Use `softPromoteHalfType` (PR #175139)   Nikita Popov via llvm-commits
• [llvm] [MSP430] Use `softPromoteHalfType` (PR #175139)   Nikita Popov via llvm-commits
• [llvm] [M68k] Use `softPromoteHalfType` (PR #175140)   Nikita Popov via llvm-commits
• [llvm] [VE] Use `softPromoteHalfType` (PR #175141)   Nikita Popov via llvm-commits
• [llvm] [VE] Use `softPromoteHalfType` (PR #175141)   Nikita Popov via llvm-commits
• [llvm] [CSKY] Use `softPromoteHalfType` (PR #175138)   Nikita Popov via llvm-commits
• [llvm] [CSKY] Use `softPromoteHalfType` (PR #175138)   Nikita Popov via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Nikita Popov via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Nikita Popov via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Nikita Popov via llvm-commits
• [llvm] [Delinearization] Extract array dimensions from global declarations (PR #175158)   Nikita Popov via llvm-commits
• [llvm] fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] [MoveAutoInit] Fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] [MoveAutoInit] Fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] [MoveAutoInit] Fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] [MoveAutoInit] Fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] [MoveAutoInit] Fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] [MoveAutoInit] Fix for miscompilation for #150120 (PR #173961)   Nimit Sachdeva via llvm-commits
• [llvm] [IR2Vec] Introducing python bindings for IR2Vec (PR #173194)   Nishant Sachdeva via llvm-commits
• [llvm] [IR2Vec] Introducing python bindings for IR2Vec (PR #173194)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] Llvm ir2vec lib refactor incr (PR #174597)   Nishant Sachdeva via llvm-commits
• [llvm] Llvm ir2vec lib refactor incr (PR #174597)   Nishant Sachdeva via llvm-commits
• [llvm] Llvm ir2vec lib refactor incr (PR #174597)   Nishant Sachdeva via llvm-commits
• [llvm] Llvm ir2vec lib refactor incr (PR #174597)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] Llvm ir2vec lib refactor incr (PR #174597)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [IR2Vec] Introducing python bindings for IR2Vec (PR #173194)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   Nishant Sachdeva via llvm-commits
• [llvm] [DebugInfo] Find call site values for params in preserved registers (PR #172339)   Orlando Cazalet-Hyams via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Owen Anderson via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] Revert "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174758)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] [VectorCombine] Fold scalar selects from bitcast into vector select (PR #173990)   Pankaj Dwivedi via llvm-commits
• [llvm] reapply "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174762)   Pankaj Dwivedi via llvm-commits
• [llvm] Revert "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174758)   Pankaj Dwivedi via llvm-commits
• [llvm] reapply "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174762)   Pankaj Dwivedi via llvm-commits
• [llvm] Reapply "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174762)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pankaj Dwivedi via llvm-commits
• [llvm] Reapply "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174762)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Jump over reducible cycles when locating join blocks (PR #174938)   Pankaj Dwivedi via llvm-commits
• [llvm] [UniformityAnalysis] Jump over reducible cycles when locating join blocks (PR #174938)   Pankaj Dwivedi via llvm-commits
• [llvm] Reapply "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174762)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   Pankaj Dwivedi via llvm-commits
• [llvm] [BOLT][AArch64] Add rseq test (PR #174413)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add rseq test (PR #174413)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add rseq test (PR #174413)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add rseq test (PR #174413)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add rseq test (PR #174413)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Fix assertions checking getNumOperands (PR #174600)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Docs] Add arm/large-bolt-tests to README (PR #174727)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add call relaxation pass (PR #173952)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][AArch64] Add call relaxation pass (PR #173952)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][Docs] Add arm/large-bolt-tests to README (PR #174727)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Add Arm's large-bolt-tests in docker-tests (PR #174961)   Paschalis Mpeis via llvm-commits
• [llvm] [bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (PR #165723)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   Paschalis Mpeis via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   Paul Kirth via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   Paul Kirth via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   Paul Kirth via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Paul Kirth via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Paul Kirth via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Paul Kirth via llvm-commits
• [llvm] [llvm][utils] Make GitHubAPI methods pass around PR number (PR #174860)   Paul Kirth via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   Pengcheng Wang via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add rules for Zca+Zcb+Zcmp+Zcmpt implying Zce. (PR #175041)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   Pengcheng Wang via llvm-commits
• [llvm] [TableGen] Change emitted comments for OPC_Scope to be more like OPC_SwitchType/Opcode. NFC (PR #175124)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Pengcheng Wang via llvm-commits
• [llvm] [TableGen] Add a helper function for emitting an MVT in the isel table. NFC (PR #175127)   Pengcheng Wang via llvm-commits
• [llvm] [TableGen] Print MVT name in the isel table when it doesn't require a VBR. NFC (PR #175128)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove RISCVVMV0Elimination pass (PR #175147)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove RISCVVMV0Elimination pass (PR #175147)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove RISCVVMV0Elimination pass (PR #175147)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Remove RISCVVMV0Elimination pass (PR #175147)   Pengcheng Wang via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Peter Klausler via llvm-commits
• [flang] [llvm] [flang][MIF] Adding Stop and ErrorStop operations (PR #166787)   Peter Klausler via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Peter Klausler via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Peter Klausler via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Peter Klausler via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   Peter Klausler via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Peter Smith via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Peter Smith via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Peter Smith via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   Peter Smith via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Peter Smith via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Peter Smith via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   Peter Smith via llvm-commits
• [lld] Fix lld crash using --fix-cortex-a53-843419 (PR #170495)   Peter Smith via llvm-commits
• [llvm] [BOLT] Fix asserts in isCallCoveredByBTI and insertBTI (PR #174600)   Peter Waller via llvm-commits
• [llvm] [BOLT][BTI] Disallow instrumenting BTI binaries (PR #174936)   Peter Waller via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Petr Hosek via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   Petr Hosek via llvm-commits
• [llvm] [utils][git] Skip subscribers for PRs labeled as skip-precommit-approval (PR #174819)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make GitHubAPI methods pass around PR number (PR #174860)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Petr Hosek via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Phoebe Wang via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Phoebe Wang via llvm-commits
• [llvm] [X86] Don't check global nsz flag in x86ISel (PR #174627)   Phoebe Wang via llvm-commits
• [llvm] [X86] Don't check global nsz flag in x86ISel (PR #174627)   Phoebe Wang via llvm-commits
• [llvm] [X86] Don't check global nsz flag in x86ISel (PR #174627)   Phoebe Wang via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Phoebe Wang via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Phoebe Wang via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Phoebe Wang via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Phoebe Wang via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Phoebe Wang via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Phoebe Wang via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Phoebe Wang via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Phoebe Wang via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Phoebe Wang via llvm-commits
• [llvm] Revert "[AMDGPU] Fix excessive stack usage in SIInsertWaitcnts::run (#134835)" (PR #174215)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU][SIInsertWaitcnt] Implement Waitcnt Expansion for Profiling (PR #169345)   Pierre van Houtryve via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Pierre van Houtryve via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Pierre van Houtryve via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Pierre van Houtryve via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Pierre van Houtryve via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Pierre van Houtryve via llvm-commits
• [llvm] [offload] Change olLaunchKernel to accept argument arrays (PR #173263)   Piotr Balcer via llvm-commits
• [llvm] [offload] Change olLaunchKernel to accept argument arrays (PR #173263)   Piotr Balcer via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Piotr Fusik via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Piotr Fusik via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Piotr Fusik via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Piotr Fusik via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Piotr Fusik via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Piotr Fusik via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Piotr Fusik via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Piyou Chen via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Piyou Chen via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Piyou Chen via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Piyou Chen via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Piyou Chen via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   Piyou Chen via llvm-commits
• [llvm] [UEFI] Match codeview behavior to Windows triple. (PR #174460)   Prabhu Rajasekaran via llvm-commits
• [llvm] [UEFI] Match codeview behavior to Windows triple. (PR #174460)   Prabhu Rajasekaran via llvm-commits
• [llvm] [UEFI] Codeview do not crash when no llvm.dbg.cu (PR #174460)   Prabhu Rajasekaran via llvm-commits
• [llvm] [UEFI] Codeview do not crash when no llvm.dbg.cu (PR #174460)   Prabhu Rajasekaran via llvm-commits
• [llvm] [UEFI] Codeview do not crash when no llvm.dbg.cu (PR #174460)   Prabhu Rajasekaran via llvm-commits
• [llvm] [UEFI] Codeview do not crash when no llvm.dbg.cu (PR #174460)   Prabhu Rajasekaran via llvm-commits
• [llvm] [UEFI] Codeview do not crash when no llvm.dbg.cu (PR #174460)   Prabhu Rajasekaran via llvm-commits
• [llvm] [LLVM][NVPTX] Enable family specific support for a few intrinsics (PR #173268)   Pradeep Kumar via llvm-commits
• [llvm] [LLVM][NVPTX] Enable family specific support for a few intrinsics (PR #173268)   Pradeep Kumar via llvm-commits
• [llvm] [LLVM][NVPTX] Enable family specific support for a few intrinsics (PR #173268)   Pradeep Kumar via llvm-commits
• [llvm] [LLVM][NVPTX] Enable family specific support for a few intrinsics (PR #173268)   Pradeep Kumar via llvm-commits
• [llvm] Fix Bazel build for 4dc9a0e (PR #174691)   Pranav Kant via llvm-commits
• [llvm] [bazel] Make CAPIIR depend on TransformsPassIncGen (PR #174902)   Pranav Kant via llvm-commits
• [lld] Resolve undefined prefetch targets to zero to effectively prefetch the next instruction. (PR #174448)   Rahman Lavaee via llvm-commits
• [lld] Resolve undefined prefetch targets to zero to effectively prefetch the next instruction. (PR #174448)   Rahman Lavaee via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Rahman Lavaee via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Rahman Lavaee via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Rahman Lavaee via llvm-commits
• [llvm] Insert symbols for prefetch targets read from basic blocks section profile. (PR #168439)   Rahman Lavaee via llvm-commits
• [llvm] X86: Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [llvm] X86: Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [llvm] X86: Add prefetch insertion based on Propeller profile (PR #166324)   Rahman Lavaee via llvm-commits
• [llvm] [LLVM][TableGen] Use integers instead of string in CodeEmitterGen CaseMap (PR #172885)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (PR #174669)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (PR #174669)   Rahul Joshi via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support in sm100 family (PR #174371)   Rajat Bajpai via llvm-commits
• [llvm] [LLVM][NVPTX] Enable family specific support for a few intrinsics (PR #173268)   Rajat Bajpai via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Ralf Jung via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Ralf Jung via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Ralf Jung via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Ralf Jung via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   Ralf Jung via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDesc] Fix off-by-one error in FindFirstIV ranges (PR #174441)   Ramkumar Ramachandra via llvm-commits
• [llvm] [IVDescriptors] Bail out on FindFirst/FindLast reductions on i1. (PR #174225)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Reuse allowed-users logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Avoid VectorPointer bail in narrowInterleaveGroups (PR #172286)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel] Introduce llvm.clmul intrinsic (PR #168731)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #172477)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix major error in mul-to-shl simpl (PR #174558)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Ramkumar Ramachandra via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   Ramkumar Ramachandra via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   Ramkumar Ramachandra via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   Ramkumar Ramachandra via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   Ramkumar Ramachandra via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Mark variable unused in release build [[maybe_unused]] (PR #174648)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Ramkumar Ramachandra via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SelectionDAG] Expand CLMUL in PromoteIntRes_CLMUL if the operation isn't legal/custom for the promoted type. (PR #174911)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip iterator-invalidation guard in findHeaderMask (NFC) (PR #174930)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip iterator-invalidation guard in findHeaderMask (NFC) (PR #174930)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip iterator-invalidation guard in findHeaderMask (NFC) (PR #174930)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Strip iterator-invalidation guard in findHeaderMask (NFC) (PR #174930)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Refine some types to VPIRValue (NFC) (PR #174939)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Prevent `extract-lane` generate unused IRs with single vector operand. (PR #172798)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Prevent `extract-lane` generate unused IRs with single vector operand. (PR #172798)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Prevent `extract-lane` generate unused IRs with single vector operand. (PR #172798)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Prevent `extract-lane` generate unused IRs with single vector operand. (PR #172798)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Refine some types to VPIRValue (NFC) (PR #174939)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Use m_LiveIn to improve code (NFC) (PR #174943)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Absorb VPDef into VPRecipeBase (NFC) (PR #175085)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Absorb VPDef into VPRecipeBase (NFC) (PR #175085)   Ramkumar Ramachandra via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Ramkumar Ramachandra via llvm-commits
• [llvm] Add missing include in ProgramStack.cpp (PR #173002)   Raúl Marín via llvm-commits
• [llvm] [cmake] Make CMAKE_BUILD_TYPE=Release the default (PR #174520)   Reid Kleckner via llvm-commits
• [llvm] x86: fix musttail sibcall miscompilation (PR #168956)   Reid Kleckner via llvm-commits
• [llvm] Add CMake configure preset building blocks (PR #170019)   Richard Thomson via llvm-commits
• [llvm] Group the InstrumentationTests target with other LLVM unit test targe… (PR #170041)   Richard Thomson via llvm-commits
• [llvm] Group the InstrumentationTests target with other LLVM unit test targe… (PR #170041)   Richard Thomson via llvm-commits
• [llvm] [CMake] Don't explicitly set folder for InstrumentationTests (PR #170041)   Richard Thomson via llvm-commits
• [llvm] [CMake] Don't explicitly set folder for InstrumentationTests (PR #170041)   Richard Thomson via llvm-commits
• [llvm] [CMake] Don't explicitly set folder for InstrumentationTests (PR #170041)   Richard Thomson via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Roland McGrath via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Roland McGrath via llvm-commits
• [llvm] [SampleProf] test that calls to function aliases get profile info (PR #169355)   Rose Hudson via llvm-commits
• [llvm] [llvm-objdump] Default to --mattr=+special for AVR (PR #174731)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Default to --mattr=+special for AVR (PR #174731)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Default to --mattr=+special for AVR (PR #174731)   Ruoyu Qiu via llvm-commits
• [llvm] [llvm-objdump] Default to --mattr=+special for AVR (PR #174731)   Ruoyu Qiu via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Report the correct operand to getArithmeticInstrCost() when duplicated scalars (PR #174442)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Report the correct operand to getArithmeticInstrCost() when duplicated scalars (PR #174442)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Create SLP trees starting from constant stride stores (PR #175126)   Ryan Buchner via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   Ryan Cowan via llvm-commits
• [llvm] [TableGen][SIInsertWaitcnts] use RegIntervals for AMDGPU (PR #174888)   Ryan Mitchell via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap dependency check (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap dependency check (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap dependency check (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap check in dependency analysis (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap check in dependency analysis (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap check in dependency analysis (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap check in dependence analysis (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap check in dependence analysis (PR #174390)   Ryotaro Kasuga via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Ryotaro Kasuga via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for nsw doesn't hold on entire iteration space (NFC) (PR #162281)   Ryotaro Kasuga via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   S. VenkataKeerthy via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   S. VenkataKeerthy via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   S. VenkataKeerthy via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   S. VenkataKeerthy via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Saleem Abdulrasool via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Saleem Abdulrasool via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Saleem Abdulrasool via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Saleem Abdulrasool via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Saleem Abdulrasool via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Saleem Abdulrasool via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   Saleem Abdulrasool via llvm-commits
• [llvm] [RISCV] Add support for Xqcibi branch on immediate in RISCVRedundantCopyElimination (PR #174358)   Sam Elliott via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add SimplifyDemandedBits and hasAllNBitUsers support for CLSW. (PR #174542)   Sam Elliott via llvm-commits
• [llvm] [RISCV] AIFoundry.org ET extensions for RISCV (PR #174571)   Sam Elliott via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Sam Elliott via llvm-commits
• [llvm] [RISC-V][Mach-O] Print immediate operands in hexadecimal format. (PR #174505)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Add Spacemit X100 processor definition (PR #173988)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add computeKnownBits for CLSW. (PR #174636)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Improve load/store pairing for Xqcilsm instructions in RISCVLoadStoreOptimizer (PR #174612)   Sam Elliott via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   Sam Elliott via llvm-commits
• [llvm] [RISC-V][Mach-O] Ensure MCTargetStreamer is initialized. (PR #174800)   Sam Elliott via llvm-commits
• [llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)   Sam Elliott via llvm-commits
• [llvm] [RISC-V] Ensure MCTargetStreamer is initialized. (PR #174800)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Mark More Relocs as Relaxable (PR #151422)   Sam Elliott via llvm-commits
• [llvm] [CodeGen] Let RDA recompute live-ins. (PR #166773)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add rules for Zca+Zcb+Zcmp+Zcmpt implying Zce. (PR #175041)   Sam Elliott via llvm-commits
• [llvm] [CodeGen][NFC] Improve readability of getLocalLiveOutMIDef (PR #175074)   Sam Elliott via llvm-commits
• [clang] [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (PR #175122)   Sam Elliott via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] 0501950 - Revert "[UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (#174117)"   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (PR #174117)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Add DS loop waitcnt optimization for GFX12+ (PR #172728)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Doc][AMDGPU] Add barrier execution & memory model (PR #170447)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [UniformityAnalysis] Jump over reducible cycles when locating join blocks (PR #174938)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [UniformityAnalysis] Jump over reducible cycles when locating join blocks (PR #174938)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [UniformityAnalysis] Jump over reducible cycles when locating join blocks (PR #174938)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [UniformityAnalysis] Jump over reducible cycles when locating join blocks (PR #174938)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [compiler-rt] [compiler-rt][AArch64] Exit early from __arm_za_disable. (PR #174942)   Sander de Smalen via llvm-commits
• [compiler-rt] [compiler-rt][AArch64] Exit early from __arm_za_disable. (PR #174942)   Sander de Smalen via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Sander de Smalen via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Sander de Smalen via llvm-commits
• [llvm] [LLVM][DAGCombiner] Look through freeze when combining extensions of loads (PR #175022)   Sander de Smalen via llvm-commits
• [llvm] [HLSL] Fix WaveBallot dxil op function name (PR #174901)   Sarah Spall via llvm-commits
• [llvm] XCOFF associated metadata (PR #159096)   Sean Fertile via llvm-commits
• [llvm] XCOFF associated metadata (PR #159096)   Sean Fertile via llvm-commits
• [llvm] XCOFF associated metadata (PR #159096)   Sean Fertile via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Sean Fertile via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Sean Perry via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Sebastian Buchwald via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   Sebastian Buchwald via llvm-commits
• [llvm] [DA] batch delinearization (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [DA] batch delinearization for fixed-size arrays (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [DA] batch delinearization for fixed-size arrays (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [DA] batch delinearization for fixed-size arrays (PR #170519)   Sebastian Pop via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   Sergei Barannikov via llvm-commits
• [llvm] [SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   Sergei Barannikov via llvm-commits
• [llvm] [LLVM][TableGen] Use integers instead of string in CodeEmitterGen CaseMap (PR #172885)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Make ClassInfo sorting deterministic in AsmMatcherEmitter (PR #172894)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Regenerate test/CodeGen/Xtensa/mul.ll to fix test (PR #175062)   Sergei Barannikov via llvm-commits
• [llvm] [Xtensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Change emitted comments for OPC_Scope to be more like OPC_SwitchType/Opcode. NFC (PR #175124)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Add a helper function for emitting an MVT in the isel table. NFC (PR #175127)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Print MVT name in the isel table when it doesn't require a VBR. NFC (PR #175128)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen] Remove deprecated !getop and !setop (PR #175155)   Sergei Barannikov via llvm-commits
• [llvm] Honor alignment for HVX masked loads/stores (incl. loops) (PR #174419)   Sergei Larin via llvm-commits
• [llvm] Honor alignment for HVX masked loads/stores (incl. loops) (PR #174419)   Sergei Larin via llvm-commits
• [llvm] [Hexagon] Add lowering for llvm.vector.splice.va (PR #174261)   Sergei Larin via llvm-commits
• [llvm] Introduction of typified section in ExtBinary format (PR #166553)   Sergey Shcherbinin via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   Sergio Sánchez Ramírez via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   Sergio Sánchez Ramírez via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   Sergio Sánchez Ramírez via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   Sergio Sánchez Ramírez via llvm-commits
• [llvm] [Clang] Add Picolibc environment type for triples (PR #169613)   Shankar Easwaran via llvm-commits
• [llvm] [LV] Add extra check for signed overflow for SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Simplify (sdiv/srem lhs, (select header, rhs, 1)) -> (sdiv/srem lhs, rhs) (PR #174547)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Conservatively predicate SDiv/SRem (PR #170818)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Simplify (sdiv/srem lhs, (select header, rhs, 1)) -> (sdiv/srem lhs, rhs) (PR #174547)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Simplify (sdiv/srem lhs, (select header, rhs, 1)) -> (sdiv/srem lhs, rhs) (PR #174547)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Simplify (sdiv/srem lhs, (select header, rhs, 1)) -> (sdiv/srem lhs, rhs) (PR #174547)   Shih-Po Hung via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (PR #174117)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Shilei Tian via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   Shilei Tian via llvm-commits
• [llvm] [UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (PR #174117)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (PR #174117)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Shilei Tian via llvm-commits
• [clang] [llvm] [mlir] Reapply "[AMDGPU] Rework the clamp support for WMMA instructions" (#174674) (PR #174697)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through glue (PR #174766)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Definitions of new gfx1250 HW_REG_MODE fields. NFC. (PR #156527)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Shilei Tian via llvm-commits
• [llvm] [NFCI][AMDGPU] Update Mode register mask for gfx1250 (PR #174771)   Shilei Tian via llvm-commits
• [llvm] [NFCI][AMDGPU] Update Mode register mask for gfx1250 (PR #174771)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Shilei Tian via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   Shilei Tian via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Shilei Tian via llvm-commits
• [llvm] [LoopRotate] Update branch weights for multi-exit loops (PR #164006)   Shimin Cui via llvm-commits
• [llvm] [AArch64] Make ISD::CTLS Legal for i32 and i64. (PR #174367)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test showing failure to make use of existing concatenated operands for profitable fadd concatenation (PR #174383)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test showing failure to make use of existing concatenated operands for profitable fadd concatenation (PR #174383)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test showing failure to make use of existing concatenated operands for profitable fadd concatenation (PR #174383)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineSelect - replace manual constant pow2 checks and ctlz constant fold with standard DAG methods (PR #174395)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineSelect - replace manual constant pow2 checks and ctlz constant fold with standard DAG methods (PR #174395)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - check for an existing operands concatenation (PR #174397)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - check for an existing operands concatenation (PR #174397)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineSelect - replace manual constant pow2 checks and ctlz constant fold with standard DAG methods (PR #174395)   Simon Pilgrim via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - check for an existing operands concatenation (PR #174397)   Simon Pilgrim via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat fma chains which share concatenated operands (PR #174401)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat fma chains which share concatenated operands (PR #174401)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat fma chains which share concatenated operands (PR #174401)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat comparisons due to the delayed expansion of intrinsics (PR #174408)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add tests showing failure to concat comparisons due to the delayed expansion of intrinsics (PR #174408)   Simon Pilgrim via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add missing X86ISD::CMPM handling (PR #174420)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add missing X86ISD::CMPM handling (PR #174420)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add missing X86ISD::CMPM handling (PR #174420)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Make ISD::CTLS Legal for i32 and i64. (PR #174367)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Simon Pilgrim via llvm-commits
• [llvm] [X86][NewPM] Port x86-fast-tile-config to NewPM (PR #174446)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineOr - convert `OR(X,KSHIFTL(Y,Elts/2)) -> CONCAT_VECTORS(X,Y)` fold to SDPatternMatch. NFC. (PR #174554)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineOr - convert `OR(X,KSHIFTL(Y,Elts/2)) -> CONCAT_VECTORS(X,Y)` fold to SDPatternMatch. NFC. (PR #174554)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine]Fold (fadd A, Splat(fneg(B))) -> (fsub A, Splat(B)) (PR #173967)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineOr - convert `OR(X,KSHIFTL(Y,Elts/2)) -> CONCAT_VECTORS(X,Y)` fold to SDPatternMatch. NFC. (PR #174554)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - failure to track OperandValueInfo (PR #171934)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - failure to track OperandValueInfo (PR #171934)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - failure to track OperandValueInfo (PR #171934)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - failure to track OperandValueInfo (PR #171934)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - failure to track OperandValueInfo (PR #171934)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - failure to track OperandValueInfo (PR #171934)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - failure to track OperandValueInfo (PR #171934)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add rewrite pattern for SSE41/AVX1 roundss/sd + blendps/pd (PR #172056)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add rewrite pattern for SSE41/AVX1 roundss/sd + blendps/pd (PR #172056)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add rewrite pattern for SSE41/AVX1 roundss/sd + blendps/pd (PR #172056)   Simon Pilgrim via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Simon Pilgrim via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Simon Pilgrim via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerFPToIntToFP - handle UI2FP on AVX512VL targets and i64 types on AVX512DQ targets (PR #162656)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerFPToIntToFP - handle UI2FP on AVX512VL targets and i64 types on AVX512DQ targets (PR #162656)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerFPToIntToFP - handle UI2FP on AVX512VL targets and i64 types on AVX512DQ targets (PR #162656)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerFPToIntToFP - handle UI2FP on AVX512VL targets and i64 types on AVX512DQ targets (PR #162656)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lowerFPToIntToFP - handle UI2FP on AVX512VL targets and i64 types on AVX512DQ targets (PR #162656)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Allow EVEX compression for mask registers (PR #171980)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineOr - attempt to concat `OR(X, KSHIFTL(Y, Elts/2))` sub-16-element masks (PR #174570)   Simon Pilgrim via llvm-commits
• [llvm] [X86] TableGen-erate SDNode descriptions (PR #168421)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Sink NOT to be fold into ANDN (PR #172329)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Enable bitcast STLF for Constant/Undef (PR #172523)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Enable bitcast STLF for Constant/Undef (PR #172523)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Enable bitcast STLF for Constant/Undef (PR #172523)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SDPatternMatch - add a m_SpecificNeg() matcher (PR #173807)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] SDPatternMatch - add a m_SpecificNeg() matcher (PR #173807)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Simon Pilgrim via llvm-commits
• [llvm] [MC] Add canonicalizeMnemonic hook (PR #174160)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Simon Pilgrim via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Simon Pilgrim via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Simon Pilgrim via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Simon Pilgrim via llvm-commits
• [llvm] [X86] use `VPMADDWD` for widening adjacent addition (PR #174149)   Simon Pilgrim via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Allow usubo and uaddo to happen for any legal type (PR #162907)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Allow usubo and uaddo to happen for any legal type (PR #162907)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Allow usubo and uaddo to happen for any legal type (PR #162907)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Allow usubo and uaddo to happen for any legal type (PR #162907)   Simon Pilgrim via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Simon Pilgrim via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   Simon Pilgrim via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   Simon Pilgrim via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] Add TRUNCATE_SSAT_S/U and TRUNCATE_USAT_U to canCreateUndefOrPoison and computeKnownBits (#152143) (PR #168809)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Use the standard cmp+cmov for select (X != 0), -1, Y if we will be setting sbb to 0 anyway (PR #149672)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][PPC][X86] Add test coverage for #128377 (PR #174661)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][PPC][X86] Add test coverage for #128377 (PR #174661)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][PPC][X86] Add test coverage for #128377 (PR #174661)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] foldAddToAvg - add patterns to form avgceil(A, B) from ((A >> 1) + (B >> 1)) + ((A | B) & 1) (PR #174719)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Simon Pilgrim via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine]Fold (fadd A, Splat(fneg(B))) -> (fsub A, Splat(B)) (PR #173967)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine]Fold (fadd A, Splat(fneg(B))) -> (fsub A, Splat(B)) (PR #173967)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombine]Fold (fadd A, Splat(fneg(B))) -> (fsub A, Splat(B)) (PR #173967)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Simon Pilgrim via llvm-commits
• [llvm] X86: Stop overriding getRegClass (PR #155128)   Simon Pilgrim via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Improve simplifyDivRem's handling of zero numerators (PR #163531)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Remove redundant and-not pattern code in X86 (PR #157687)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Simon Pilgrim via llvm-commits
• [llvm] [X86] packss.ll/packus.ll - add AVX512 test coverage (PR #174777)   Simon Pilgrim via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Simon Pilgrim via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Simon Pilgrim via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[X86] Allow EVEX compression for mask registers" (PR #174872)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[X86] Allow EVEX compression for mask registers" (PR #174872)   Simon Pilgrim via llvm-commits
• [llvm] Revert "[X86] Allow EVEX compression for mask registers" (PR #174872)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - IsConcatFree - detect splats first, then check for repeated load. NFC. (PR #174950)   Simon Pilgrim via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test showing failure to concat fma nodes due to the constant being hidden (PR #174969)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add test showing failure to concat fma nodes due to the constant being hidden (PR #174969)   Simon Pilgrim via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   Simon Pilgrim via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - IsConcatFree - detect splats that comes from a common load/broadcastload (PR #174986)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineConcatVectorOps - IsConcatFree - detect splats that comes from a common load/broadcastload (PR #174986)   Simon Pilgrim via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   Simon Pilgrim via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Simon Pilgrim via llvm-commits
• [llvm] [TableGen] Add a helper function for emitting an MVT in the isel table. NFC (PR #175127)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] foldAddToAvg - add patterns to form avgceil(A, B) from ((A >> 1) + (B >> 1)) + ((A | B) & 1) (PR #174719)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add rewrite pattern for SSE41/AVX1 roundss/sd + blendps/pd (PR #172056)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add rewrite pattern for SSE41/AVX1 roundss/sd + blendps/pd (PR #172056)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Add rewrite pattern for SSE41/AVX1 roundss/sd + blendps/pd (PR #172056)   Simon Pilgrim via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Simon Pilgrim via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Simon Pilgrim via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Rename commute-clmul.ll -> commute-pclmul.ll (PR #175157)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Rename commute-clmul.ll -> commute-pclmul.ll (PR #175157)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Rename commute-clmul.ll -> commute-pclmul.ll (PR #175157)   Simon Pilgrim via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Simon Tatham via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput for Neoverse N2 (PR #174740)   Simon Wallis via llvm-commits
• [llvm] [llvm-exegesis] Add AArch64 operand initializers, SetRegTo (PR #169912)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Sjoerd Meijer via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Sjoerd Meijer via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Sjoerd Meijer via llvm-commits
• [llvm] [Delinearization] Remove `isKnownLessThan` (PR #171821)   Sjoerd Meijer via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   Sjoerd Meijer via llvm-commits
• [llvm] [Delinearization] Extract array dimensions from global declarations (PR #175158)   Sjoerd Meijer via llvm-commits
• [llvm] [Delinearization] Extract array dimensions from global declarations (PR #175158)   Sjoerd Meijer via llvm-commits
• [llvm] Add documentation for MemProf. (PR #172238)   Snehasish Kumar via llvm-commits
• [llvm] Add documentation for MemProf. (PR #172238)   Snehasish Kumar via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [NVPTX] Add intrinsics for new narrow FP conversions (PR #173954)   Srinivasa Ravi via llvm-commits
• [llvm] [AMDGPU] Add test for v_fmamk_f16/v_fmaak_f16 in real-true16. NFC (PR #173307)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Allow allocation of lo128 registers from all banks (PR #172614)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Definitions of new gfx1250 HW_REG_MODE fields. NFC. (PR #156527)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Definitions of new gfx1250 HW_REG_MODE fields. NFC. (PR #156527)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [GISel][RISCV] Add G_CTLS Opcode and combines, lower to cls(w) (PR #175069)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [GISel][RISCV] Add G_CTLS Opcode and combines, lower to cls(w) (PR #175069)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [GISel][RISCV] Add G_CTLS Opcode and combines, lower to cls(w) (PR #175069)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Stephen Tozer via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   Stephen Tozer via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Improve vector legalization and type deduction (PR #175067)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Improve vector legalization and type deduction (PR #175067)   Steven Perron via llvm-commits
• [llvm] [RedirectingFileSystem] Don't update error result value (PR #172900)   Steven Wu via llvm-commits
• [llvm] [llvm][Support] Make sys::fs::file_t into a seperate type (PR #160588)   Steven Wu via llvm-commits
• [llvm] [RedirectingFileSystem] Don't update error result value (PR #172900)   Steven Wu via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   Steven Wu via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   Steven Wu via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   Steven Wu via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   Steven Wu via llvm-commits
• [llvm] [SPIRV] Added Support for the SPV_ALTERA_arbitrary_precision_floating_point Extension (PR #160054)   Subash B via llvm-commits
• [llvm] [SDAG] Avoid crash when creating debug fragments for scalable vectors (PR #165233)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add support for Xqcibi branch on immediate in RISCVRedundantCopyElimination (PR #174358)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Do not iterate over the second instruction when we dont pair Xqcilsm instructions in RISCVLoadStoreOptimizer (PR #174612)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Improve load/store pairing for Xqcilsm instructions in RISCVLoadStoreOptimizer (PR #174612)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Fix typo from 6e86037. NFC (PR #174679)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Improve load/store pairing for Xqcilsm instructions in RISCVLoadStoreOptimizer (PR #174612)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV][WIP] Run the RISCVMakeCompressible pass before RISCVLoadStoreOptimizer (PR #174694)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Simplify testcases in xqcibi-redundant-copy-elim.ll. NFC. (PR #174695)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Use LD_RV32/SD_RV32 for spills and reloads when Zilsd is enabled (PR #153595)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Use LD_RV32/SD_RV32 for spills and reloads when 4-byte aligned Zilsd is enabled (PR #153595)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (PR #174789)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Sudharsan Veeravalli via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   Sudharsan Veeravalli via llvm-commits
• [clang] [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   Sudharsan Veeravalli via llvm-commits
• [llvm] [AArch64] Define cost of i16->i32 udot/sdot instructions (PR #174102)   Sushant Gokhale via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [llvm] [llvm-c] Add LLVMParseIRInContext2 (PR #174085)   Tamir Duberstein via llvm-commits
• [lld] Fix lld crash using --fix-cortex-a53-843419 (PR #170495)   Tarcísio Fischer via llvm-commits
• [lld] Fix lld crash using --fix-cortex-a53-843419 (PR #170495)   Tarcísio Fischer via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Tarcísio Fischer via llvm-commits
• [llvm] [ADT][NFC] Inline some functions in FoldingSetBase (PR #172371)   Thibault Monnier via llvm-commits
• [llvm] [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (PR #174307)   Thomas Munro via llvm-commits
• [llvm] [regex][FileCheck] Support back-references up to 20. (PR #174150)   Thomas Symalla via llvm-commits
• [llvm] [regex][FileCheck] Support back-references up to 20. (PR #174150)   Thomas Symalla via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Thurston Dang via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Add tests for dot product intrinsics on Arm (PR #174042)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Add tests for dot product intrinsics on Arm (PR #174042)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Add tests for dot product intrinsics on Arm (PR #174042)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Add tests for dot product intrinsics on Arm (PR #174042)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle NEON matrix multiplication (integral) (PR #174510)   Thurston Dang via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Thurston Dang via llvm-commits
• [compiler-rt] [asan][sanitizer_common][AIX] Set allocator size and beginning (PR #144784)   Thurston Dang via llvm-commits
• [llvm] [PseudoProbe] Add switch to control illegal guid warnings (PR #174927)   Tianle Liu via llvm-commits
• [llvm] [AArch64] Add command-line flag to disable MOPS for memory intrinsics (PR #172722)   Ties Stuij via llvm-commits
• [llvm] [AArch64] Add command-line flag to disable MOPS for memory intrinsics (PR #172722)   Ties Stuij via llvm-commits
• [llvm] [CodeGen] Add command-line flags for memory operation inline thresholds (PR #172829)   Ties Stuij via llvm-commits
• [llvm] [CodeGen] Add command-line flags for memory operation inline thresholds (PR #172829)   Ties Stuij via llvm-commits
• [llvm] [AArch64] Add command-line flag to disable MOPS for memory intrinsics (PR #172722)   Ties Stuij via llvm-commits
• [llvm] [CodeGen] Add command-line flags for memory operation inline thresholds (PR #172829)   Ties Stuij via llvm-commits
• [llvm] [CodeGen] Add command-line flags for memory operation inline thresholds (PR #172829)   Ties Stuij via llvm-commits
• [llvm] [ConstantHoisting] Remove redundant cleanup (NFC) (PR #173823)   Tim Gymnich via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   Tim Gymnich via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Tirthankar Mazumder via llvm-commits
• [llvm] [cmake] Make CMAKE_BUILD_TYPE=Release the default (PR #174520)   Tobias Hieta via llvm-commits
• [llvm] [cmake] Make CMAKE_BUILD_TYPE=Release the default (PR #174520)   Tobias Hieta via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   Tom Eccles via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Add Initial Taskloop Clause Support (PR #174623)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Fix sanitizer error in buildTaskLikeBodyGenCallback (PR #174983)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Fix sanitizer error in buildTaskLikeBodyGenCallback (PR #174983)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Fix sanitizer error in buildTaskLikeBodyGenCallback (PR #174983)   Tom Eccles via llvm-commits
• [flang] [llvm] [mlir] [OpenMP] Fix truncation/extension bug when calling __kmpc_push_num_teams (PR #173067)   Tom Eccles via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Add Initial Taskloop Clause Support (PR #174623)   Tom Eccles via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Don't allocate task context structure if not needed (PR #174588)   Tom Eccles via llvm-commits
• [llvm] workflows/release-sources: Disable building sub-project tarballs by default (PR #173441)   Tom Stellard via llvm-commits
• [llvm] workflows/release-sources: Disable building sub-project tarballs by default (PR #173441)   Tom Stellard via llvm-commits
• [llvm] worklows/release-tasks: Remove the release-lit workflow (PR #174644)   Tom Stellard via llvm-commits
• [llvm] worklows/release-tasks: Remove the release-lit workflow (PR #174644)   Tom Stellard via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   Tom Stellard via llvm-commits
• [llvm] worklows/release-tasks: Remove the release-lit workflow (PR #174644)   Tom Stellard via llvm-commits
• [llvm] [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (PR #174845)   Tom Stellard via llvm-commits
• [llvm] [llvm][utils] Make git-llvm-push set the skip-precommit-approval label (PR #174833)   Tom Stellard via llvm-commits
• [llvm] [AArch64] Add ZCM/ZCZ lowering statistics (PR #172863)   Tomer Shafir via llvm-commits
• [llvm] [AArch64][NFC] Fix label checks on ZCM tests (PR #173482)   Tomer Shafir via llvm-commits
• [llvm] [AArch64][RegAlloc] Reserve LR reservation reserve W30 subreg (PR #173725)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Update reserve-regs-for-regalloc desc (PR #173799)   Tomer Shafir via llvm-commits
• [llvm] [AArch64] Update reserve-regs-for-regalloc desc (PR #173799)   Tomer Shafir via llvm-commits
• [llvm] [AArch64][NFC] Fix label checks on ZCM tests (PR #173482)   Tomer Shafir via llvm-commits
• [llvm] [AArch64][NFC] Fix label checks on ZCM tests (PR #173482)   Tomer Shafir via llvm-commits
• [llvm] [AArch64][llvm-mca] Add old Cyclone instruction tables for reference (PR #172652)   Tomer Shafir via llvm-commits
• [llvm] [AArch64][llvm-mca] Add old Cyclone instruction tables for reference (PR #172652)   Tomer Shafir via llvm-commits
• [llvm] [AArch64][llvm-mca] Add old Cyclone instruction tables for reference (PR #172652)   Tomer Shafir via llvm-commits
• [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias for z/OS (PR #169362)   Tony Tao via llvm-commits
• [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias for z/OS (PR #169362)   Tony Tao via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   Tony Tao via llvm-commits
• [llvm] [NFC][SystemZ] Update insert() API of the AssociatedDataAreaTable class (PR #174593)   Tony Tao via llvm-commits
• [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias for z/OS (PR #169362)   Tony Tao via llvm-commits
• [llvm] [NFC][SystemZ] Update insert() API of the AssociatedDataAreaTable class (PR #174593)   Tony Tao via llvm-commits
• [llvm] [NFC][SystemZ] Update insert() API of the AssociatedDataAreaTable class (PR #174593)   Tony Tao via llvm-commits
• [llvm] [NFC][SystemZ] Update insert() API of the AssociatedDataAreaTable class (PR #174593)   Tony Tao via llvm-commits
• [llvm] [SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (PR #152684)   Trevor Gross via llvm-commits
• [llvm] [SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (PR #152684)   Trevor Gross via llvm-commits
• [llvm] [SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (PR #152684)   Trevor Gross via llvm-commits
• [llvm] [SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (PR #152684)   Trevor Gross via llvm-commits
• [llvm] [SelectionDAG,GISel] Add `f16` soft promotion for `lrint`, `lround`, `llrint`, and `llround` (PR #152684)   Trevor Gross via llvm-commits
• [llvm] [WebAssembly] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152833)   Trevor Gross via llvm-commits
• [llvm] [WebAssembly] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152833)   Trevor Gross via llvm-commits
• [llvm] [WebAssembly] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152833)   Trevor Gross via llvm-commits
• [llvm] [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152632)   Trevor Gross via llvm-commits
• [llvm] [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152632)   Trevor Gross via llvm-commits
• [llvm] [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152632)   Trevor Gross via llvm-commits
• [llvm] [Lanai] Use `softPromoteHalfType` (PR #175137)   Trevor Gross via llvm-commits
• [llvm] [CSKY] Use `softPromoteHalfType` (PR #175138)   Trevor Gross via llvm-commits
• [llvm] [MSP430] Use `softPromoteHalfType` (PR #175139)   Trevor Gross via llvm-commits
• [llvm] [M68k] Use `softPromoteHalfType` (PR #175140)   Trevor Gross via llvm-commits
• [llvm] [VE] Use `softPromoteHalfType` (PR #175141)   Trevor Gross via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Trevor Gross via llvm-commits
• [llvm] [Lanai] Use `softPromoteHalfType` (PR #175137)   Trevor Gross via llvm-commits
• [llvm] [CSKY] Use `softPromoteHalfType` (PR #175138)   Trevor Gross via llvm-commits
• [llvm] [MSP430] Use `softPromoteHalfType` (PR #175139)   Trevor Gross via llvm-commits
• [llvm] [M68k] Use `softPromoteHalfType` (PR #175140)   Trevor Gross via llvm-commits
• [llvm] [M68k] Use `softPromoteHalfType` (PR #175140)   Trevor Gross via llvm-commits
• [llvm] [VE] Use `softPromoteHalfType` (PR #175141)   Trevor Gross via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Trevor Gross via llvm-commits
• [llvm] [Lanai] Use `softPromoteHalfType` (PR #175137)   Trevor Gross via llvm-commits
• [llvm] [Lanai] Use `softPromoteHalfType` (PR #175137)   Trevor Gross via llvm-commits
• [llvm] [CSKY] Use `softPromoteHalfType` (PR #175138)   Trevor Gross via llvm-commits
• [llvm] [MSP430] Use `softPromoteHalfType` (PR #175139)   Trevor Gross via llvm-commits
• [llvm] [M68k] Use `softPromoteHalfType` (PR #175140)   Trevor Gross via llvm-commits
• [llvm] [VE] Use `softPromoteHalfType` (PR #175141)   Trevor Gross via llvm-commits
• [llvm] [Lanai] Use `softPromoteHalfType` (PR #175137)   Trevor Gross via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Trevor Gross via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Trevor Gross via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   Trevor Gross via llvm-commits
• [lld] lld: Add initial support for GNU LTO format (PR #157175)   Tulio Magno Quites Machado Filho via llvm-commits
• [lld] lld: Add initial support for GNU LTO format (PR #157175)   Tulio Magno Quites Machado Filho via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   Ulrich Weigand via llvm-commits
• [llvm] [NFC][SystemZ] Update insert() API of the AssociatedDataAreaTable class (PR #174593)   Ulrich Weigand via llvm-commits
• [llvm] [AArch64] Optimize ANDS(CSET, CSET) to CCMP. (PR #174919)   Usha Gupta via llvm-commits
• [clang] [compiler-rt] [UBSAN] add null and alignment checks for aggregates (PR #164548)   VASU SHARMA via llvm-commits
• [clang] [compiler-rt] [UBSAN] add null and alignment checks for aggregates (PR #164548)   VASU SHARMA via llvm-commits
• [llvm] [AArch64] Sink fneg instruction to unlock fmls combine (PR #172000)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine][AArch64] Lower NEON shift intrinsics when possible (PR #172465)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine][AArch64] Lower NEON shift intrinsics when possible (PR #172465)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [AArch64] Sink fneg instruction to unlock fmls combine (PR #172000)   Valeriy Savchenko via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [InstCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [DAG] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Valeriy Savchenko via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   Valery Dmitriev via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Vedant Paranjape via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Vedant Paranjape via llvm-commits
• [llvm] [RFC][llvm] Enable BUILD_SHARED_LIBS with MinGW (PR #174266)   Vedran Miletić via llvm-commits
• [compiler-rt] [compiler-rt] Add supported Arm arches for the baremetal profile lib (PR #172984)   Victor Campos via llvm-commits
• [llvm] [AMDGPU] Removing unwanted delta in llc-pipeline-npm.ll. (PR #174535)   Vikram Hegde via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   Vishruth Thimmaiah via llvm-commits
• [compiler-rt] 4cba804 - [unrelated][upstream-separately] XFAIL multc3_test.c fixunstfdi_test.c on AIX 64-bit   Wael Yehia via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   Wael Yehia via llvm-commits
• [compiler-rt] [llvm] Reland check-builtins target for LLVM_ENABLE_RUNTIMES (PR #171941)   Wael Yehia via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [compiler-rt] [PPC] Disable some ORC-powerpc64le-linux tests. (PR #175100)   Wael Yehia via llvm-commits
• [compiler-rt] [PPC] Disable some ORC-powerpc64le-linux tests. (PR #175100)   Wael Yehia via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   Wei Wang via llvm-commits
• [clang] [llvm] [SampleProf] Handle coro wrapper function name canonicalization (PR #174881)   Wei Wang via llvm-commits
• [clang] [llvm] [SampleProf] Handle coro wrapper function name canonicalization (PR #174881)   Wei Wang via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   Wei Wang via llvm-commits
• [clang] [llvm] [SampleProf] Handle coro wrapper function name canonicalization (PR #174881)   Wei Wang via llvm-commits
• [llvm] [ORC][MCJIT] add RuntimeLibraryInfoWrapper pass to PM (PR #174682)   Wenju He via llvm-commits
• [llvm] [ORC][MCJIT] add RuntimeLibraryInfoWrapper pass to PM (PR #174682)   Wenju He via llvm-commits
• [llvm] [ORC][MCJIT] add RuntimeLibraryInfoWrapper pass to PM (PR #174682)   Wenju He via llvm-commits
• [llvm] [ORC][MCJIT] add RuntimeLibraryInfoWrapper pass to PM (PR #174682)   Wenju He via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Wenju He via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Wenju He via llvm-commits
• [llvm] [CodeGen] add RuntimeLibraryInfoWrapper pass to addPassesToEmitMC (PR #174682)   Wenju He via llvm-commits
• [llvm] [BAZEL] Move FuncTransformsPassIncGen to CAPIIR header dep (PR #174982)   Will Froom via llvm-commits
• [llvm] [BAZEL] Move FuncTransformsPassIncGen to CAPIIR header dep (PR #174982)   Will Froom via llvm-commits
• [llvm] [BAZEL] Move FuncTransformsPassIncGen to CAPIIR header dep (PR #174982)   Will Froom via llvm-commits
• [compiler-rt] [compiler-rt] Add supported Arm arches for the baremetal profile lib (PR #172984)   William Huynh via llvm-commits
• [llvm] [STLExtras] Introduce bind_{first, last}, [not_]equal_to (PR #175056)   Yanzuo Liu via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] AMDGPU: share LDS budget logic and add experimental LDS buffering pass (PR #166388)   Yaxun Liu via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Yaxun Liu via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Yaxun Liu via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   Yaxun Liu via llvm-commits
• [llvm] InstCombine: Handle fmul in SimplifyDemandedFPClass (PR #173872)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Restrain folding switch condition operation into case to one-use (PR #174714)   Yingwei Zheng via llvm-commits
• [llvm] [VectorCombine] Fold vector.reduce.OP(F(X)) == 0 -> OP(X) == 0 (PR #173069)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Refactor computeKnownFPClass select handling (PR #174957)   Yingwei Zheng via llvm-commits
• [llvm] ValueTracking: Refactor computeKnownFPClass select handling (PR #174957)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fixup known fp class for select and compare (PR #174958)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fixup known fp class for select and compare (PR #174958)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Fixup known fp class for select and compare (PR #174958)   Yingwei Zheng via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Yingying Wang via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Yingying Wang via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Yingying Wang via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Yingying Wang via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Yingying Wang via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Yingying Wang via llvm-commits
• [llvm] [LoopInterchange] Support inner-loop simple reductions via UndoSimpleReduction (PR #172970)   Yingying Wang via llvm-commits
• [llvm] [OptBisect] Add support for selecting ranges of passes and refactor DebugCounter to use a shared Range API. (PR #152393)   Yonah Goldberg via llvm-commits
• [llvm] [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (PR #152393)   Yonah Goldberg via llvm-commits
• [llvm] [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (PR #152393)   Yonah Goldberg via llvm-commits
• [llvm] [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (PR #152393)   Yonah Goldberg via llvm-commits
• [llvm] [SROA] Canonicalize homogeneous structs into fixed vectors (PR #165159)   Yonah Goldberg via llvm-commits
• [llvm] [BOLT][AArch64] Add call relaxation pass (PR #173952)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Add option instrumentation-max-size for bump allocator (PR #174716)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   YongKang Zhu via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   YongKang Zhu via llvm-commits
• [llvm] [BOLT][AArch64] Avoid UB due to shift of negative value. (PR #174994)   YongKang Zhu via llvm-commits
• [llvm] MIPS: expandDivRem add a NOP after BNE (PR #174908)   YunQiang Su via llvm-commits
• [clang] [flang] [llvm] Pull 166810 (PR #174646)   Zahira Ammarguellat via llvm-commits
• [clang] [flang] [llvm] [CLANG][OpenMP] Add support for OpenMP6.0 transparent clause. (PR #174646)   Zahira Ammarguellat via llvm-commits
• [llvm] [AMD] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [compiler-rt] [compiler-rt] fix crt target dependency. (PR #174475)   Zequan Wu via llvm-commits
• [compiler-rt] [compiler-rt] fix crt target dependency. (PR #174475)   Zequan Wu via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   liao jun via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   liao jun via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   liao jun via llvm-commits
• [llvm] [Flang-rt][build] fixes building warnings under gcc: (PR #173955)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wmaybe-uninitialized' from g++ compiler (PR #174917)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   liao jun via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   liao jun via llvm-commits
• [clang] [libcxxabi] [lldb] [llvm] [mlir] [NFC] Typo fixes. (PR #174333)   via llvm-commits
• [clang] [libcxxabi] [lldb] [llvm] [mlir] [NFC] Exactly one kind typo fixes, change defintions to definitions. (PR #174333)   via llvm-commits
• [llvm] aa13ebc - [llvm][RISCV] Support fma codegen for zvfbfa (#172949)   via llvm-commits
• [llvm] Try to simplify select v32i4 case by legalizing v16i4 (PR #173328)   via llvm-commits
• [llvm] e65317a - [ValueTracking] Support ptrtoaddr in computeKnownBits() (#173358)   via llvm-commits
• [llvm] [PowerPC] Optimize vector compares not equal to non-zero elements (PR #174361)   via llvm-commits
• [llvm] 30a1ffb - [ValueTracking] Support ptrtoaddr in inequality implication (#173362)   via llvm-commits
• [llvm] Try to simplify select v32i4 case by legalizing v16i4 (PR #173328)   via llvm-commits
• [llvm] Try to simplify select v32i4 case by legalizing v16i4 (PR #173328)   via llvm-commits
• [llvm] [Mips] Add MipsPat `add $gp, (select $cond, tglobaladdr, tglobaladdr)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support to sm100 family (PR #174371)   via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support to sm100 family (PR #174371)   via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   via llvm-commits
• [llvm] [AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation (PR #156079)   via llvm-commits
• [llvm] [AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation (PR #156079)   via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   via llvm-commits
• [llvm] [RISCV] Set CostPerUse to 1 for registers that contain v0 (PR #174372)   via llvm-commits
• [llvm] 47fc1dd - [ConstantInt] Disable implicit truncation in ConstantInt::get() (#171456)   via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support to sm100 family (PR #174371)   via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support in sm100 family (PR #174371)   via llvm-commits
• [llvm] d4d48f6 - [llvm-mca][AArch64] Refactor Neoverse SVE tests to split out common inputs (NFC) (#173023)   via llvm-commits
• [llvm] [SDAG] Use reference type in loop (NFC) (PR #174379)   via llvm-commits
• [llvm] InstCombine: Add baseline tests for fmul SimplifyDemandedFPClass handling (PR #173871)   via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   via llvm-commits
• [llvm] [SplitKit] Skip the empty subrange during extendPHIKillRanges (PR #174381)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] fe3b4f0 - [SDAG] Use reference type in loop (NFC) (#174379)   via llvm-commits
• [llvm] [X86] Add test showing failure to make use of existing concatenated operands for profitable fadd concatenation (PR #174383)   via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   via llvm-commits
• [llvm] 191b9cd - [X86] Add test showing failure to make use of existing concatenated operands for profitable fadd concatenation (#174383)   via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   via llvm-commits
• [llvm] [ISel] Implement operand widening for VECTOR_FIND_LAST_ACTIVE. (PR #174389)   via llvm-commits
• [llvm] [X86] combineSelect - replace manual constant pow2 checks and ctlz constant fold with standard DAG methods (PR #174395)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - check for an existing operands concatenation (PR #174397)   via llvm-commits
• [llvm] [VPlan] Add BranchOnTwoConds, use for early exit plans. (PR #172750)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [MachinePipeliner] Remove cheap check in dependency analysis (PR #174390)   via llvm-commits
• [llvm] 0dd0359 - Revert "[AMDGPU] Fix excessive stack usage in SIInsertWaitcnts::run (#134835)" (#174215)   via llvm-commits
• [llvm] c36690c - [X86] combineSelect - replace manual constant pow2 checks and ctlz constant fold with standard DAG methods (#174395)   via llvm-commits
• [llvm] [mlir] [NVPTX] Add support for barrier.cta.red.* instructions (PR #172541)   via llvm-commits
• [llvm] 12e2ede - [X86] combineConcatVectorOps - check for an existing operands concatenation (#174397)   via llvm-commits
• [lld] dec1762 - [ThinLTO][COFF] Pass loop and slp vectorize options to LTO backend (#173041)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - concat fma chains which share concatenated operands (PR #174401)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   via llvm-commits
• [llvm] 7aa6dcf - [X86] combineConcatVectorOps - concat fma chains which share concatenated operands (#174401)   via llvm-commits
• [llvm] b3c3e5f - [AMDGPU] Simplify and document waitcnt handling on call and return (#172453)   via llvm-commits
• [llvm] 0494abb - [AMDGPU] Make WaitcntBrackets::simplifyWaitcnt const again (#173390)   via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   via llvm-commits
• [llvm] [BOLT] Enable merge branch profile with memory profile (PR #174405)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] 7a37545 - [OpenMP] Fix member type name in LooprangeT, NFC (#174241)   via llvm-commits
• [llvm] [X86] Add tests showing failure to concat comparisons due to the delayed expansion of intrinsics (PR #174408)   via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   via llvm-commits
• [llvm] [BOLT][AArch64] Add rseq test (PR #174413)   via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   via llvm-commits
• [llvm] [llvm-mca][AArch64] Refactor Neoverse SVE tests to split out common inputs (NFC) (PR #173023)   via llvm-commits
• [llvm] InstCombine: Reorder exp's known-nan source handling (PR #174417)   via llvm-commits
• [llvm] 3534b77 - [X86] Add tests showing failure to concat comparisons due to the delayed expansion of intrinsics (#174408)   via llvm-commits
• [llvm] 7e2b79b - [AMDGPU] Generate more efficient code to avoid shift64 hazard (#171871)   via llvm-commits
• [llvm] [AMDGPU] Generate more efficient code to avoid shift64 hazard (PR #171871)   via llvm-commits
• [llvm] 71507f0 - Add merge-calling-conv.ll to profcheck-xfail.txt (#174418)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - add missing X86ISD::CMPM handling (PR #174420)   via llvm-commits
• [llvm] [MCA] Fix llvm-mca to skip input reading when -mcpu=help is specified (PR #174421)   via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   via llvm-commits
• [llvm] [AArch64] Use +0.0 for accumulator for FMUL -> BFMLAL lowering in more cases (PR #174423)   via llvm-commits
• [llvm] c588035 - InstCombine: Reorder exp's known-nan source handling (#174417)   via llvm-commits
• [llvm] [VPlan] Use getSigned() for index in VectorEndPointer recipe (PR #174426)   via llvm-commits
• [llvm] Honor alignment for HVX masked loads/stores (incl. loops) (PR #174419)   via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   via llvm-commits
• [llvm] d1aca4b - Reland check-builtins target for LLVM_ENABLE_RUNTIMES (#171941)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (PR #174243)   via llvm-commits
• [llvm] 9d8889b - [X86] combineConcatVectorOps - add missing X86ISD::CMPM handling (#174420)   via llvm-commits
• [llvm] 86b0acd - [InstrProf] Mark __llvm_profile_runtime_user cold (#174174)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (PR #174243)   via llvm-commits
• [llvm] [IR] Propagate fast-math flags through autoupgraded target intrinsics (PR #174432)   via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   via llvm-commits
• [llvm] [AArch64] Make ISD::CTLS Legal for i32 and i64. (PR #174367)   via llvm-commits
• [llvm] [NFC][AMDGPU] Declare variables initialized with getDebugLoc (PR #174434)   via llvm-commits
• [llvm] [NFC][AMDGPU] Declare variables initialized with getDebugLoc (PR #174434)   via llvm-commits
• [llvm] [NFC][AMDGPU] Declare variables initialized with getDebugLoc (PR #174434)   via llvm-commits
• [llvm] [SCEV] Handle all PtrtoIntExpr construction in CastSinkingRewriter (NFC) (PR #174435)   via llvm-commits
• [llvm] [polly] [SCEV] Sink SCEVPtrToAddr to leaf SCEVUnknowns. (PR #174437)   via llvm-commits
• [llvm] [polly] [SCEV] Sink SCEVPtrToAddr to leaf SCEVUnknowns. (PR #174437)   via llvm-commits
• [llvm] [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (PR #174438)   via llvm-commits
• [llvm] [AMDGPU] Add flag to enable expensive trip counts for runtime unroll. (PR #171735)   via llvm-commits
• [llvm] [AMDGPU] Add flag to enable expensive trip counts for runtime unroll. (PR #171735)   via llvm-commits
• [llvm] [AMDGPU] Add flag to enable expensive trip counts for runtime unroll. (PR #171735)   via llvm-commits
• [llvm] [polly] [SCEV] Sink SCEVPtrToAddr to leaf SCEVUnknowns. (PR #174437)   via llvm-commits
• [llvm] [polly] [SCEV] Sink SCEVPtrToAddr to leaf SCEVUnknowns. (PR #174437)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   via llvm-commits
• [llvm] [polly] [SCEV] Add initial support for ptrtoaddr. (PR #158032)   via llvm-commits
• [llvm] 089919e - Revert "Add merge-calling-conv.ll to profcheck-xfail.txt" (#174422)   via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   via llvm-commits
• [llvm] [Hexagon] Add lowering for llvm.vector.splice.va (PR #174261)   via llvm-commits
• [llvm] [NFC][AMDGPU] Declare variables initialized with getDebugLoc as const ref (PR #174434)   via llvm-commits
• [llvm] [IVDesc] Fix off-by-one error in FindFirstIV ranges (PR #174441)   via llvm-commits
• [llvm] [SLP] Report the correct operand to getArithmeticInstrCost() when duplicated scalars (PR #174442)   via llvm-commits
• [llvm] [SLP] Report the correct operand to getArithmeticInstrCost() when duplicated scalars (PR #174442)   via llvm-commits
• [llvm] [VPlan] Reuse allowed-users logic in narrowToSingleScalars (PR #174444)   via llvm-commits
• [llvm] [VPlan] Reuse allowed-users logic in narrowToSingleScalars (PR #174444)   via llvm-commits
• [llvm] [X86][NewPM] Port x86-fast-tile-config to NewPM (PR #174446)   via llvm-commits
• [lld] Resolve undefined prefetch targets to zero to effectively prefetch the next instruction. (PR #174448)   via llvm-commits
• [llvm] [IR] Do not assert and verify that phi nodes do not have a token type (PR #174449)   via llvm-commits
• [llvm] 3dd5378 - [RedirectingFileSystem] Don't update error result value (#172900)   via llvm-commits
• [llvm] c9ca86a - [X86][NewPM] Port x86-fast-tile-config to NewPM (#174446)   via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   via llvm-commits
• [llvm] dffd72d - [IR] Do not assert and verify that phi nodes do not have a token type (#174449)   via llvm-commits
• [llvm] 5b8baf5 - [DWP] Fix writeStringsAndOffsets declaration (#173298)   via llvm-commits
• [llvm] [DWP] Fix writeStringsAndOffsets declaration (PR #173298)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   via llvm-commits
• [llvm] ValueTracking: Check if fmul operand could be undef (PR #174458)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   via llvm-commits
• [llvm] [lit] Make not still fail if the called process returns a signal (PR #174298)   via llvm-commits
• [llvm] Added --report=debugger option to llvm-debuginfo-analyzer (PR #159853)   via llvm-commits
• [llvm] [CodeGen] [EarlyIfConversion] Prioritize conversion of hard to predict branches (PR #174457)   via llvm-commits
• [llvm] 7a174c9 - [OpenMP][clang] Register Vtables on device for indirect calls (#159856)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   via llvm-commits
• [llvm] ValueTracking: Check if fdiv operand could be undef (PR #174453)   via llvm-commits
• [llvm] [UEFI] Match codeview behavior to Windows triple. (PR #174460)   via llvm-commits
• [llvm] ValueTracking: Check if fmul operand could be undef (PR #174458)   via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   via llvm-commits
• [llvm] 49381c3 - [NFC][AMDGPU] Declare variables initialized with getDebugLoc as const ref (#174434)   via llvm-commits
• [llvm] [NFC][AMDGPU] Declare variables initialized with getDebugLoc as const ref (PR #174434)   via llvm-commits
• [llvm] 8ed35e6 - [AArch64] Make ISD::CTLS Legal for i32 and i64. (#174367)   via llvm-commits
• [llvm] 8f5b067 - Honor alignment for HVX masked loads/stores (incl. loops) (#174419)   via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   via llvm-commits
• [llvm] 1e93227 - Add documentation for MemProf. (#172238)   via llvm-commits
• [llvm] Add documentation for MemProf. (PR #172238)   via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support in sm100 family (PR #174371)   via llvm-commits
• [llvm] [NVPTX] Expand f32 redux-sync support in sm100 family (PR #174371)   via llvm-commits
• [llvm] [NFC][Hexagon] Fix unused variable warning (PR #174466)   via llvm-commits
• [llvm] Add lowering for llvm.vector.splice.va (PR #174261)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] 7562183 - [NFC][Hexagon] Fix unused variable warning (#174466)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] Add lowering for llvm.vector.splice.va (PR #174261)   via llvm-commits
• [llvm] Add lowering for llvm.vector.splice.va (PR #174261)   via llvm-commits
• [llvm] cee65d3 - [TableGen] Fix what looks like a mistake in RegClassByHwMode.td test. NFC (#174252)   via llvm-commits
• [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias for z/OS (PR #169362)   via llvm-commits
• [clang] [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias for z/OS (PR #169362)   via llvm-commits
• [llvm] c371721 - [llvm] Propagate the VFS to `SampleProfileLoaderPass` (#173121)   via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   via llvm-commits
• [llvm] 7f9a00e - [OptBisect][ADT] Add support for running ranges of passes and introduce IntegerInclusiveInterval ADT (#152393)   via llvm-commits
• [llvm] ValueTracking: Check if fmul operand could be undef (PR #174458)   via llvm-commits
• [llvm] [SystemZ] Change default backend to ASCII (PR #174470)   via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   via llvm-commits
• [llvm] [SelectionDAG][WIP] Move HwMode expansion from tablegen to SelectionISel. (PR #174471)   via llvm-commits
• [llvm] [CAS] Add OnDiskCASLogger to help logging/debugging CAS (PR #174462)   via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [llvm] 9e5e267 - [ISel] Introduce llvm.clmul intrinsic (#168731)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   via llvm-commits
• [llvm] [CodeGen] Check BlockAddress users before marking block as taken (PR #174480)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] [AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (PR #167372)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] 8516e7e - [RISCV][MCA] Consolidate inputs for different SchedModel tests (#173926)   via llvm-commits
• [clang] [lld] [llvm] [lld] Add support for sdata8 for FDE CIE (PR #174508)   via llvm-commits
• [clang] [lld] [llvm] [lld] Add support for sdata8 for FDE CIE (PR #174508)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] [AMDGPU] Add DS loop waitcnt optimization for GFX12+ (PR #172728)   via llvm-commits
• [llvm] [Mips] Add MipsPat `add $gp, (select $cond, tglobaladdr, tglobaladdr)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   via llvm-commits
• [llvm] [Mips] Add MipsPat `(MipsGPRel tglobaladdr:$in)` to parse MipsISD::GPRel TargetGlobalAddress (PR #165531)   via llvm-commits
• [compiler-rt] [NFCI] [Darwin] Add APPLE_TARGET_IS_HOST lit option to compiler-rt (PR #174522)   via llvm-commits
• [llvm] 2945e44 - [C-API] Allow SectionMemoryManager's ReserveAlloc flag to be enabled (#174307)   via llvm-commits
• [llvm] [RISCV] Add contraints for SpacemiT X60 AI VDot Insts (PR #174364)   via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] Implement NoCallerSavedRegs attribute (PR #174320)   via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] Implement NoCallerSavedRegs attribute (PR #174320)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   via llvm-commits
• [llvm] [RISCV] Add support for Xqcibi branch on immediate in RISCVRedundantCopyElimination (PR #174358)   via llvm-commits
• [llvm] [dsymutil] Add new argument allow_invalid_macho (PR #173503)   via llvm-commits
• [llvm] [RIPPLE][HEXAGON-BACKEND] Fix insert DBG_VALUE after terminator (PR #173401)   via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   via llvm-commits
• [llvm] [AMDGPU] Removing unwanted delta in llc-pipeline-npm.ll. (PR #174535)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] [RISCV] Update Andes45 vector integer arithmetic scheduling info (PR #174538)   via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   via llvm-commits
• [llvm] [AMD] using divergent/uniform information in ISel of zext (PR #174539)   via llvm-commits
• [llvm] [AMD] using divergent/uniform information in ISel of zext (PR #174539)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] [RISCV] Don't generate QC.SWMI pair if the start reg is X0 (PR #174532)   via llvm-commits
• [llvm] [RISCV] Add SimplifyDemandedBits and hasAllNBitUsers support for CLSW. (PR #174542)   via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   via llvm-commits
• [llvm] X86: Add prefetch insertion based on Propeller profile (PR #166324)   via llvm-commits
• [llvm] 707d18c - [VPlan] Use getSigned() for index in VectorEndPointer recipe (#174426)   via llvm-commits
• [llvm] 4af552d - InstCombine: Add baseline tests for fmul SimplifyDemandedFPClass handling (#173871)   via llvm-commits
• [llvm] [SupportLSP] Add DidSaveTextDocumentParams (PR #172637)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [llvm] [X86] combineOr - convert `OR(X,KSHIFTL(Y,Elts/2)) -> CONCAT_VECTORS(X,Y)` fold to SDPatternMatch. NFC. (PR #174554)   via llvm-commits
• [llvm] bac83c0 - [Clang][AArch64]Remove _single from vg2x1 and vg4x1 svmla (#166799)   via llvm-commits
• [llvm] [AMDGPU] Inline two helpers in SIInsertWaitcnts. NFC. (PR #174557)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   via llvm-commits
• [llvm] [VPlan] Fix major error in mul-to-shl simpl (PR #174558)   via llvm-commits
• [llvm] [VPlan] Fix major error in mul-to-shl simpl (PR #174558)   via llvm-commits
• [llvm] 004c420 - [X86] combineOr - convert `OR(X,KSHIFTL(Y,Elts/2)) -> CONCAT_VECTORS(X,Y)` fold to SDPatternMatch. NFC. (#174554)   via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   via llvm-commits
• [llvm] [VPlan] Fix commutative-matcher error in mul-to-shl simpl (PR #174558)   via llvm-commits
• [llvm] Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (PR #174559)   via llvm-commits
• [llvm] Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (PR #174559)   via llvm-commits
• [llvm] Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (PR #174559)   via llvm-commits
• [llvm] 5a456c1 - Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (#174559)   via llvm-commits
• [llvm] ef86355 - [AArch64] Add intrinsics for 9.6 crypto instructions (#165545)   via llvm-commits
• [clang] [llvm] [AArch64] Add intrinsics for 9.6 crypto instructions (PR #165545)   via llvm-commits
• [llvm] [AMDGPU] Inline two helpers in SIInsertWaitcnts. NFC. (PR #174557)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   via llvm-commits
• [llvm] unittests: Convert some IR in unit tests to opaque pointers (PR #174562)   via llvm-commits
• [llvm] SPIRV: Convert tests to opaque pointers (PR #174563)   via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   via llvm-commits
• [llvm] llvm: Convert some assorted lit tests to opaque pointers (PR #174564)   via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   via llvm-commits
• [llvm] [VPlan] Remove VPWidenSelectRecipe, use VPWidenRecipe instead (NFCI). (PR #174234)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] b8f5cbb - AMDGPU: clang-format AMDGPULowerKernelAttributes (#174567)   via llvm-commits
• [llvm] [LV] Consider UserIC when limiting VF. (PR #174573)   via llvm-commits
• [llvm] 1caf270 - [X86] Allow EVEX compression for mask registers (#171980)   via llvm-commits
• [llvm] 047aaa5 - unittests: Convert some IR in unit tests to opaque pointers (#174562)   via llvm-commits
• [llvm] 6f01dea - [X86] combineOr - attempt to concat `OR(X,KSHIFTL(Y,Elts/2))` sub-16-element masks (#174570)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add register bank legalize rules for amdgcn_icmp, amdgcn_fcmp and amdgcn_ballot. (PR #172017)   via llvm-commits
• [llvm] [Dexter] Replace DAP "initialized" timeout with a warning (PR #174198)   via llvm-commits
• [llvm] 1db53f1 - SPIRV: Convert tests to opaque pointers (#174563)   via llvm-commits
• [llvm] [ISel] Handle TypeWidenVector in expandVectorFindLastActive. (PR #174384)   via llvm-commits
• [llvm] a3569fa - [AArch64] Add command-line flag to disable MOPS for memory intrinsics (#172722)   via llvm-commits
• [llvm] 3a9718b - [ConstantHoisting] Remove redundant cleanup (NFC) (#173823)   via llvm-commits
• [llvm] [ConstantHoisting] Remove redundant cleanup (NFC) (PR #173823)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for new fpcvt codegen (PR #173272)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] [VPlan] Restore all-operands-inv WidenGEP logic (PR #174416)   via llvm-commits
• [llvm] bdc7681 - [VPlan] Restore all-operands-inv WidenGEP logic (#174416)   via llvm-commits
• [polly] af3a0e6 - [Polly] Allow changing array dims when importing JScop (#174582)   via llvm-commits
• [llvm] [SPIRV] Handle poison values in lifetime intrinsics (PR #174578)   via llvm-commits
• [llvm] 73c4421 - [SPIRV] Handle poison values in lifetime intrinsics (#174578)   via llvm-commits
• [llvm] [AMD] using divergent/uniform information in ISel of zext (PR #174539)   via llvm-commits
• [llvm] Revert "AMDGPU: Do not infer implicit inputs for !nocallback intrinsics" (PR #174224)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [llvm] [SPIRV] Support additional comparison predicates for i1 types (PR #174585)   via llvm-commits
• [llvm] [NFC][SystemZ] Update insert() API of the AssociatedDataAreaTable class (PR #174593)   via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Translation support for taskloop construct (PR #174386)   via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   via llvm-commits
• [llvm] [PowerPC] Optimize not equal compares against zero vectors (PR #150422)   via llvm-commits
• [llvm] Revert "AMDGPU: Do not infer implicit inputs for !nocallback intrinsics" (PR #174224)   via llvm-commits
• [llvm] dff081c - Revert "AMDGPU: Do not infer implicit inputs for !nocallback intrinsics" (#174224)   via llvm-commits
• [llvm] Revert "AMDGPU: Do not infer implicit inputs for !nocallback intrinsics" (PR #174224)   via llvm-commits
• [llvm] Revert "AMDGPU: Do not infer implicit inputs for !nocallback intrinsics" (PR #174224)   via llvm-commits
• [llvm] Llvm ir2vec lib refactor incr (PR #174597)   via llvm-commits
• [llvm] [RISCV][llvm] Support bitwise operation for XLEN fixed vectors (PR #174598)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] [PowerPC] Optimize not equal compares against zero vectors (PR #150422)   via llvm-commits
• [llvm] [PowerPC] Optimize not equal compares against zero vectors (PR #150422)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   via llvm-commits
• [llvm] [PowerPC] Optimize vector compares not equal to non-zero elements (PR #174361)   via llvm-commits
• [llvm] [BOLT] Fix isCallCoveredByBTI and insertBTI assertions (PR #174600)   via llvm-commits
• [llvm] c958a7c - [X86] use `VPMADDWD` for widening adjacent addition (#174149)   via llvm-commits
• [llvm] Llvm ir2vec lib refactor incr (PR #174597)   via llvm-commits
• [llvm] [SPIRV] Additional fixes for const init via `UtoPtr` (PR #172584)   via llvm-commits
• [clang-tools-extra] [llvm] Rename clang::tidy::matchers::matchesAnyListedName() to matchesAnyListedRegexName (PR #174414)   via llvm-commits
• [clang-tools-extra] [llvm] Rename clang::tidy::matchers::matchesAnyListedName() to matchesAnyListedRegexName (PR #174414)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [llvm] [NFC][IR2Vec][MIR2Vec] llvm-ir2vec refactor - move Tool class implementations into a separate utils file (PR #174133)   via llvm-commits
• [clang] [llvm] [OpenMP][clang] Register Vtables on device for indirect calls (PR #159856)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add register bank legalize rules for amdgcn_icmp, amdgcn_fcmp and amdgcn_ballot. (PR #172017)   via llvm-commits
• [llvm] [RISCV] Do not iterate over the second instruction when we dont pair Xqcilsm instructions in RISCVLoadStoreOptimizer (PR #174612)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add register bank legalize rules for amdgcn_icmp, amdgcn_fcmp and amdgcn_ballot. (PR #172017)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add register bank legalize rules for amdgcn_icmp, amdgcn_fcmp and amdgcn_ballot. (PR #172017)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add register bank legalize rules for amdgcn_icmp, amdgcn_fcmp and amdgcn_ballot. (PR #172017)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] Fix insert DBG_VALUE after terminator Failure for Hexagon (PR #173401)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (PR #174243)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] 448f5fe - [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (#174243)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] [RISCV] Improve load/store pairing for Xqcilsm instructions in RISCVLoadStoreOptimizer (PR #174612)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] 3f5d91b - [Flang][OpenMP] Implement device clause lowering for target directive (#173509)   via llvm-commits
• [flang] [llvm] [mlir] [Flang][OpenMP] Implement device clause lowering for target directive (PR #173509)   via llvm-commits
• [compiler-rt] 305c413 - [NFCI] [Darwin] Add APPLE_TARGET_IS_HOST lit option to compiler-rt (#174522)   via llvm-commits
• [llvm] 99e8aa5 - [TSan] Fix TSan instrumenting pointers from non-default address spaces (#174518)   via llvm-commits
• [llvm] [AMDGPU] Add support for GFX12 expert scheduling mode 2 (PR #170319)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [llvm] [SPIRV] Support non-constant indices for vector insert/extract (PR #172514)   via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   via llvm-commits
• [llvm] [SCEV] Handle URem pattern in getRangeRef. (PR #174456)   via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   via llvm-commits
• [llvm] [AMDGPU] Propagate debug locations to compiler-generated instructions (PR #168573)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   via llvm-commits
• [llvm] a165f8c - [llvm] Bypass sandbox in `sys::fs::createTemporaryFile()` (#174491)   via llvm-commits
• [llvm] [X86] Don't check global nsz flag in x86ISel (PR #174627)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] 4b31ad9 - [UEFI] Codeview do not crash when no llvm.dbg.cu (#174460)   via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   via llvm-commits
• [llvm] [NFCI][CodeGen] Add more value types (PR #174533)   via llvm-commits
• [llvm] [RISCV][llvm] Support logical comparison codegen for P extension (PR #174626)   via llvm-commits
• [llvm] [DTLTO] Fix handling of multi-module bitcode inputs (PR #174624)   via llvm-commits
• [llvm] Allow MIN/MAX signedness flip when operands are known-negative (PR #174469)   via llvm-commits
• [llvm] [AArch64] Only fold into ands directly if AND is one-use (PR #167371)   via llvm-commits
• [llvm] [AArch64] Only fold into ands directly if AND is one-use (PR #167371)   via llvm-commits
• [clang] [llvm] Fixed stack size estimates in the function for the -fstack-usage option (PR #173181)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   via llvm-commits
• [llvm] 142a405 - [NFCI][CodeGen] Add more value types (#174533)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] [ValueTracking] Support horizontal vector add in computeKnownBits (PR #174410)   via llvm-commits
• [llvm] [DTLTO] Fix handling of multi-module bitcode inputs (PR #174624)   via llvm-commits
• [llvm] [RISCV] Add computeKnownBits for CLSW. (PR #174636)   via llvm-commits
• [llvm] [X86] Use 64-bit EH encodings for medium code model (PR #174637)   via llvm-commits
• [llvm] [X86] Use 64-bit EH encodings for medium code model (PR #174637)   via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   via llvm-commits
• [lld] [ELF] Add VersionNode lexer state for better version script parsing (PR #174530)   via llvm-commits
• [llvm] [BOLT][NFC] Remove JTIndexReg. (PR #174639)   via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   via llvm-commits
• [llvm] c262893 - Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (#174614)   via llvm-commits
• [compiler-rt] [compiler-rt] Support default-True lit config options (follow up to #174522) (PR #174642)   via llvm-commits
• [llvm] [RISCV] Add computeKnownBits for CLSW. (PR #174636)   via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   via llvm-commits
• [clang] [llvm] [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (PR #174638)   via llvm-commits
• [llvm] 71219bd - [AArch64] Add ZCM/ZCZ lowering statistics (#172863)   via llvm-commits
• [llvm] 68141cb - [AArch64][RegAlloc] Reserve LR reservation reserve W30 subreg (#173725)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [libc] [llvm] [libc][math] Implement C23 half precision pow function (PR #159906)   via llvm-commits
• [llvm] Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (PR #174581)   via llvm-commits
• [llvm] d12e993 - Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581)   via llvm-commits
• [llvm] worklows/release-tasks: Remove the release-lit workflow (PR #174644)   via llvm-commits
• [llvm] [BOLT] Remove unnecessary dependency. NFC (PR #174645)   via llvm-commits
• [llvm] 701040d - [LLVM] Successor count added to InstCount (#171670)   via llvm-commits
• [llvm] [AArch64] Only fold into ands directly if AND is one-use (PR #167371)   via llvm-commits
• [llvm] 371fad2 - [UniformityAnalysis] Remove an incorrect assertion in uniformity analysis (#174117)   via llvm-commits
• [llvm] ccca3b8 - [AMDGPU] Rework the clamp support for WMMA instructions (#174310)   via llvm-commits
• [compiler-rt] 0aea22f - [compiler-rt] Support default-True lit config options (follow up to #174522) (#174642)   via llvm-commits
• [clang] [flang] [llvm] Pull 166810 (PR #174646)   via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   via llvm-commits
• [lld] [llvm] [X86][llvm][CodeGen] Use 64-bit EH encodings for medium code model (PR #174637)   via llvm-commits
• [llvm] [VPlan] Mark variable unused in release build [[maybe_unused]] (PR #174648)   via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   via llvm-commits
• [llvm] [LowerMemIntrinsics] Propagate value profile to branch weights (PR #174490)   via llvm-commits
• [llvm] c2d060c - [VPlan] Mark variable unused in release build [[maybe_unused]] (#174648)   via llvm-commits
• [clang] [flang] [llvm] Pull 166810 (PR #174646)   via llvm-commits
• [clang] [flang] [llvm] Pull 166810 (PR #174646)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [llvm] [OpenMP] Remove special handling of implicit clauses in decomposition (PR #174654)   via llvm-commits
• [clang] [llvm] [OpenMP] Preserve the original address when `use_device_ptr/addr` lookup fails. (PR #174659)   via llvm-commits
• [llvm] [AArch64][PPC][X86] Add test coverage for #128377 (PR #174661)   via llvm-commits
• [llvm] [AArch64][PPC][X86] Add test coverage for #128377 (PR #174661)   via llvm-commits
• [llvm] [AArch64][PPC][X86] Add test coverage for #128377 (PR #174661)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (PR #174662)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (PR #174662)   via llvm-commits
• [clang] [llvm] [mlir] [AMDGPU] Rework the clamp support for WMMA instructions (PR #174310)   via llvm-commits
• [llvm] [VPlan] Lower BranchOnTwoConds to chain of 2 simple branches. (PR #174016)   via llvm-commits
• [clang] [llvm] [openmp] [OpenMP][clang] Indirect and Virtual function call mapping from host to device (PR #159857)   via llvm-commits
• [llvm] 423b2da - [AArch64][PPC][X86] Add test coverage for #128377 (#174661)   via llvm-commits
• [clang] [llvm] [mlir] Revert "[AMDGPU] Rework the clamp support for WMMA instructions" (PR #174674)   via llvm-commits
• [clang] [llvm] [mlir] Revert "[AMDGPU] Rework the clamp support for WMMA instructions" (PR #174674)   via llvm-commits
• [clang] [llvm] [mlir] Revert "[AMDGPU] Rework the clamp support for WMMA instructions" (PR #174674)   via llvm-commits
• [llvm] [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (PR #174669)   via llvm-commits
• [llvm] [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (PR #174669)   via llvm-commits
• [llvm] Try to simplify select v32i4 case by legalizing v16i4 (PR #173328)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] 551d553 - [RISCV] Add SimplifyDemandedBits and hasAllNBitUsers support for CLSW. (#174542)   via llvm-commits
• [llvm] [RISC-V][Mach-O] Implement and select the RISCVMachOTargetObjectFile. (PR #174677)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] 4435d43 - [RISCV] Add computeKnownBits for CLSW. (#174636)   via llvm-commits
• [llvm] [LV] Conservatively predicate SDiv/SRem (PR #170818)   via llvm-commits
• [llvm] [LV] Conservatively predicate SDiv/SRem (PR #170818)   via llvm-commits
• [llvm] [RISCV] Fix typo from 6e86037. NFC (PR #174679)   via llvm-commits
• [llvm] [lli] fix lli crash when run variable arguments function as a interpret (PR #173719)   via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   via llvm-commits
• [llvm] [AMDGPU] Handle `s_setreg_imm32_b32` targeting `MODE` register (PR #174681)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] [ORC][MCJIT] add RuntimeLibraryInfoWrapper pass to PM (PR #174682)   via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   via llvm-commits
• [llvm] [IR] Allow non-constant offsets in @llvm.vector.splice.{left,right} (PR #174693)   via llvm-commits
• [llvm] [RISCV] Simplify testcases in xqcibi-redundant-copy-elim.ll. NFC. (PR #174695)   via llvm-commits
• [llvm] afe8257 - [X86][APX] Emit SetZUCC instead of legacy setcc when ZU is enabled (#173965)   via llvm-commits
• [llvm] [X86][GISEL] Enable PostLegalize Combiner (PR #174696)   via llvm-commits
• [llvm] 7d6dc25 - [RISCV][llvm-readobj,llvm-objdump] Use getRISCVVendorRelocationTypeName for RISCV vendor relocations (#172811)   via llvm-commits
• [llvm] 5ab8368 - [RISC-V][Mach-O] Implement and select the RISCVMachOTargetObjectFile. (#174677)   via llvm-commits
• [llvm] [NFC][PowerPC] fix IR to be splat and not zeroinitializer (PR #174699)   via llvm-commits
• [llvm] 5a63367 - Reapply "[AMDGPU] Rework the clamp support for WMMA instructions" (#174674) (#174697)   via llvm-commits
• [llvm] [NFC][PowerPC] fix IR to be splat and not zeroinitializer (PR #174699)   via llvm-commits
• [llvm] [NFC][PowerPC] Optimize vector compares for not equal to non zero vectors (PR #171635)   via llvm-commits
• [llvm] [NFC][PowerPC] fix IR to be splat and not zeroinitializer (PR #174699)   via llvm-commits
• [lld] 16be2c0 - [ELF] Add VersionNode lexer state for better version script parsing   via llvm-commits
• [llvm] [X86] Optimized ADD + ADC to ADC (PR #173543)   via llvm-commits
• [clang] [llvm] Implicit copy cleanup (PR #174702)   via llvm-commits
• [clang] [llvm] Implicit copy cleanup (PR #174702)   via llvm-commits
• [clang] [llvm] [WIP][NFC] Implicit copy cleanup (PR #174702)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] [RISCV] Add support for XAndesPerf branch on immediate in RISCVRedundantCopyElimination (PR #174706)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] 3fbe927 - [LV][EVL] Add test case for issue #173260. nfc (#173262)   via llvm-commits
• [llvm] [DAGCombiner] Fold min/max vscale, C -> C (PR #174708)   via llvm-commits
• [llvm] 55eaa6c - [InstCombine][AArch64] Lower NEON shift intrinsics when possible (#172465)   via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   via llvm-commits
• [llvm] [CI] Add more glob patterns for `mlir:python` label (PR #174711)   via llvm-commits
• [llvm] [GitHub] Add more glob patterns for `mlir:python` label (PR #174711)   via llvm-commits
• [llvm] [lli] fix lli crash when run variable arguments function as a interpret (PR #173719)   via llvm-commits
• [llvm] [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (PR #174713)   via llvm-commits
• [llvm] [lli] fix lli crash when run variable arguments function as a interpret (PR #173719)   via llvm-commits
• [polly] c55c2ab - [Buildbot][Polly] Move polly-x86_64-linux-test-suite build instructions into main repository (#166809)   via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   via llvm-commits
• [llvm] [DAG] foldAddToAvg - add patterns to form avgceil(A, B) from ((A >> 1) + (B >> 1)) + ((A | B) & 1) (PR #174719)   via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   via llvm-commits
• [clang] [llvm] [NFC] Implicit container copy cleanup (PR #174702)   via llvm-commits
• [llvm] [LangRef] Normalize IEEE 754 spelling (PR #174721)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   via llvm-commits
• [llvm] 72f18a0 - [VectorCombine] Fold scalar selects from bitcast into vector select (#173990)   via llvm-commits
• [llvm] Revert "[llvm-exegesis] Add AArch64 operand initializers, SetRegTo" (PR #174729)   via llvm-commits
• [llvm] 87d6c27 - [llvm-objdump][NFC] Use EnumEntry from Support (#174155)   via llvm-commits
• [llvm] [llvm-objdump] Default to --mattr=+special for AVR (PR #174731)   via llvm-commits
• [llvm] [ORC][JITLink] Fix generated perf jitdump file's invalid header Flags (PR #174732)   via llvm-commits
• [llvm] [DA] Disable the BanerjeeMIV dependence test (PR #174733)   via llvm-commits
• [llvm] [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (PR #174734)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   via llvm-commits
• [llvm] [AArch64] Remove dead tuimm5sN tablegen Operands. NFC (PR #174735)   via llvm-commits
• [llvm] f7dcdd9 - [Delinearization] Remove `isKnownLessThan` (#171821)   via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] Handle trunc to i1 in matchRightShift (PR #174737)   via llvm-commits
• [llvm] f68774f - Revert "[llvm-exegesis] Add AArch64 operand initializers, SetRegTo" (#174729)   via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   via llvm-commits
• [llvm] [AA][MemCpyOpt] Introduce CapturesBeforeAnalysis and ChainedCaptureAnalysis (NFCI) (PR #174739)   via llvm-commits
• [llvm] [AA][MemCpyOpt] Introduce CapturesBeforeAnalysis and ChainedCaptureAnalysis (NFCI) (PR #174739)   via llvm-commits
• [llvm] [AArch64] Fix using NEON copies in streaming-mode-enable regions. (PR #174738)   via llvm-commits
• [llvm] [MCA] Update NZCV flag-setting instructions' throughput (PR #174740)   via llvm-commits
• [llvm] [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (PR #172851)   via llvm-commits
• [llvm] [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (PR #172851)   via llvm-commits
• [llvm] [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (PR #172851)   via llvm-commits
• [llvm] [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (PR #172851)   via llvm-commits
• [llvm] [AArch64] Add lowering for NEON saturating shift intrinsics (PR #171485)   via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   via llvm-commits
• [llvm] [X86] optimize saturating (masked) pack (PR #169995)   via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   via llvm-commits
• [llvm] [AArch64] Use GISel for optnone functions (PR #174746)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] [GitHub] Add more glob patterns for `mlir:python` label (PR #174711)   via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] Revert "[VectorCombine] Fold scalar selects from bitcast into vector select" (PR #174758)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   via llvm-commits
• [llvm] [CodeGen][EarlyIfConversion] Fix loop invariant operands check (PR #174765)   via llvm-commits
• [llvm] SelectionDAG: Do not propagate divergence through glue (PR #174766)   via llvm-commits
• [llvm] [llvm-jitlink] Fix perf support error message (PR #174767)   via llvm-commits
• [llvm] c8941df - Revert "[AA] Improve precision for monotonic atomic load/store operations" (#173135)   via llvm-commits
• [llvm] [ConstantInt] Disable implicit truncation in ConstantInt::get() (PR #171456)   via llvm-commits
• [llvm] 542d2a5 - [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (#170356)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64] Add support for FCVTXNT, FCVTLT, {B}FCVTNT int… (PR #170356)   via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   via llvm-commits
• [llvm] ValueTracking: Check if x is undef for fma(x, x, y) analysis (PR #174763)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] [PowerPC] Remove NoInfsFPMath uses (PR #163029)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   via llvm-commits
• [llvm] [AArch64][llvm] Add codegen for simd fpcvt intrinsics (PR #173272)   via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   via llvm-commits
• [llvm] [PowerPC] Optimize not equal compares against zero vectors (PR #150422)   via llvm-commits
• [llvm] 47a0d0e - SelectionDAG: Do not propagate divergence through glue (#174766)   via llvm-commits
• [llvm] [NFCI][AMDGPU] Update Mode register mask for gfx1250 (PR #174771)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] [AMDGPU] Fix FinalizeISel skipping blocks after insertSimulatedTrap (PR #174774)   via llvm-commits
• [llvm] [NFC] [AArch64] Add missing test to #161840 (PR #174775)   via llvm-commits
• [llvm] [NFC] [AArch64] Add missing test to #161840 (PR #174775)   via llvm-commits
• [llvm] [NFC] [AArch64] Add missing test to #161840 (PR #174775)   via llvm-commits
• [llvm] [OpenMP][OMPIRBuilder] Attach `Attribute::OptimizeNone` to user-defined (and default) mappers (PR #174776)   via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   via llvm-commits
• [compiler-rt] Make mmap-munmap interceptor fail earlier (PR #171295)   via llvm-commits
• [compiler-rt] Make mmap-munmap interceptor fail earlier (PR #171295)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] 184e3c1 - [X86] packss.ll/packus.ll - add AVX512 test coverage (#174777)   via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   via llvm-commits
• [llvm] 168de3c - [AArch64][llvm] Add codegen for simd fpcvt intrinsics (#173272)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [clang] [llvm] [AArch64] Add support for range prefetch intrinsic (PR #170490)   via llvm-commits
• [clang] [llvm] [AArch64] Add support for range prefetch intrinsic (PR #170490)   via llvm-commits
• [clang] [llvm] [AArch64] Add support for range prefetch intrinsic (PR #170490)   via llvm-commits
• [clang] [llvm] [AArch64] Add support for range prefetch intrinsic (PR #170490)   via llvm-commits
• [clang] [flang] [llvm] [openmp] [OpenMP] Remove LLVM_ENABLE_PROJECTS=openmp build mode (PR #152189)   via llvm-commits
• [llvm] [AMDGPU] Remove some redundant SubtargetPredicate settings. NFC. (PR #174788)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] 2495856 - [NFC] [AArch64] Add missing test to #161840 (#174775)   via llvm-commits
• [llvm] [NFC] [AArch64] Add missing test to #161840 (PR #174775)   via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   via llvm-commits
• [llvm] [ISel/RISCV] Migrate llvm.riscv.clmul to llvm.clmul (PR #174749)   via llvm-commits
• [lld] 28d2772 - [lld][COFF] Add /linkreprofullpathrsp flag (#165449)   via llvm-commits
• [llvm] 1355111 - [AMDGPU] Remove some redundant SubtargetPredicate settings. NFC. (#174788)   via llvm-commits
• [llvm] [RISCV][llvm] Support mul codegen for P extension (PR #174793)   via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   via llvm-commits
• [llvm] [AMDGPU] Add optimization for llvm.amdgcn.wave.shuffle in uniform cases (PR #174795)   via llvm-commits
• [llvm] [RISCV][llvm] Support div/rem codegen for P extension (PR #174801)   via llvm-commits
• [llvm] 75ec177 - [SPIRV] Add legalization pass for zero-size arrays (#172367)   via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   via llvm-commits
• [llvm] [WebAssembly] Disable explicit-locals in the libcalls.ll test. NFC (PR #174811)   via llvm-commits
• [llvm] [RuntimeLibcalls] Rework LibcallImplCallingConvs to reduce stack usage (PR #174689)   via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   via llvm-commits
• [llvm] [llvm] Bypass sandbox for `getMainExecutable()` (PR #174816)   via llvm-commits
• [llvm] InstCombine: Add baseline minimumnum/maximumnum SimplifyDemandedFPClass tests (#173976) (PR #174817)   via llvm-commits
• [llvm] 65b0de4 - [HLSL] Add WaveActiveBallot builtins and lower to DXIL / SPIR-V (#174638)   via llvm-commits
• [llvm] b6019f7 - InstCombine: Handle fmul by -0 case in SimplifyDemandedFPClass (#174023)   via llvm-commits
• [llvm] [WebAssembly] Disable explicit-locals in the libcalls.ll test. NFC (PR #174811)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] d64ecd1 - [RISCV] Use ZeroOrNegativeOneBooleanContent for RVV to match P extension. (#174713)   via llvm-commits
• [llvm] [offload][lit] XFAIL all failing tests on the Level Zero plugin (PR #174804)   via llvm-commits
• [lld] Revert "[lld][COFF] Add /linkreprofullpathrsp flag" (PR #174831)   via llvm-commits
• [lld] Revert "[lld][COFF] Add /linkreprofullpathrsp flag" (PR #174831)   via llvm-commits
• [lld] Revert "[lld][COFF] Add /linkreprofullpathrsp flag" (PR #174831)   via llvm-commits
• [clang] [libcxxabi] [lldb] [llvm] [mlir] [NFC] Exactly one kind typo fixes, change defintions to definitions. (PR #174333)   via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   via llvm-commits
• [llvm] 8c6d002 - [AMDGPU] Reimplement VOP3 CMPX encoding fixup using PostEncoderMethod. NFCI. (#174799)   via llvm-commits
• [llvm] [PowerPC] cost modeling for length type VP intrinsic load/store (PR #168938)   via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   via llvm-commits
• [clang] [llvm] [PowerPC] Add AMO load signed builtins (PR #168747)   via llvm-commits
• [lld] 671c5a0 - Revert "[lld][COFF] Add /linkreprofullpathrsp flag" (#174831)   via llvm-commits
• [llvm] AMDGPU: Teach lowering that sqrt never returns subnormal (PR #174838)   via llvm-commits
• [llvm] [utils][git] Skip subscribers for PRs labeled as skip-precommit-approval (PR #174819)   via llvm-commits
• [llvm] [DirectX] Specify NegZero as signed (PR #174840)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] [IRCE] Prove predicates with and without loop-guarded SCEVs (PR #174843)   via llvm-commits
• [llvm] [IRCE] Prove predicates with and without loop-guarded SCEVs (PR #174843)   via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   via llvm-commits
• [llvm] [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (PR #174845)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (PR #174845)   via llvm-commits
• [llvm] Reland "[AMDGPU] Add new llvm.amdgcn.wave.shuffle intrinsic (#167372)" (PR #174614)   via llvm-commits
• [llvm] [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (PR #174845)   via llvm-commits
• [llvm] 1671bb6 - [SystemZ] Change default backend to ASCII (#174470)   via llvm-commits
• [llvm] e01d6f4 - InstCombine: Consider not-inf/nan context when simplifying fmul (#174024)   via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   via llvm-commits
• [llvm] [NVPTX] Validate user-specified PTX version against SM version (PR #174834)   via llvm-commits
• [llvm] InstCombine: Add fpext SimplifyDemandedFPClass baseline tests (PR #174848)   via llvm-commits
• [llvm] [InstCombine] Add support for Instruction combining of hyperbolic functions (PR #173730)   via llvm-commits
• [llvm] 0b13ae6 - [llvm] Bypass sandbox for `getMainExecutable()` (#174816)   via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   via llvm-commits
• [llvm] Enable using threads on z/OS (PR #171847)   via llvm-commits
• [llvm] InstCombine: Handle minimumnum/maximumnum in SimplifyDemandedFPClass (PR #173977)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] c444020 - [LLVM][NVPTX] Mark ldmatrix/stmatrix intrinsics convergent (#174669)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (PR #174662)   via llvm-commits
• [llvm] bc8fcba - [NVPTX][AutoUpgrade] Use integer min/max intrinsics instead of icmp, select (#173097)   via llvm-commits
• [llvm] 31b93d6 - [VPlan] Add specialized VPValue subclasses for different types (NFC) (#172758)   via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   via llvm-commits
• [llvm] [Coroutines] fix coroutines + std::unique_ptr with async exceptions validation errors (PR #149691)   via llvm-commits
• [llvm] [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (PR #174845)   via llvm-commits
• [llvm] 7bbaf2e - [AMDGPU] Improve llvm.amdgcn.wave.shuffle handling for pre-GFX8 (#174845)   via llvm-commits
• [flang] [llvm] [mlir] [MLIR] Add missing dialects to C API (PR #82190)   via llvm-commits
• [llvm] [AMDGPU] Add DS loop waitcnt optimization for GFX12+ (PR #172728)   via llvm-commits
• [llvm] [AMDGPU] Add DS loop waitcnt optimization for GFX12+ (PR #172728)   via llvm-commits
• [llvm] [AMDGPU] Add DS loop waitcnt optimization for GFX12+ (PR #172728)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (PR #174662)   via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   via llvm-commits
• [llvm] InstCombine: Prepare to handle multiple uses in SimplifyDemandedFPClass (PR #174863)   via llvm-commits
• [clang] [llvm] [clang] Allow enabling sandbox for direct `-cc1` invocations (PR #174653)   via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   via llvm-commits
• [clang] [llvm] [SPIR-V] Add builtin/intrinsic for subgroup ballot (PR #174862)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_UMULH, G_SMULH (PR #174555)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_UMULH, G_SMULH (PR #174555)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_UMULH, G_SMULH (PR #174555)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [VPlan] Replace UnrollPart for VPScalarIVSteps with start index op (NFC) (PR #170906)   via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   via llvm-commits
• [llvm] Revert "[X86] Allow EVEX compression for mask registers" (PR #174872)   via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   via llvm-commits
• [llvm] [HWASan] [MTE] use precise lifetimes even if they don't cover all exits (PR #174875)   via llvm-commits
• [llvm] 4912004 - Revert "[X86] Allow EVEX compression for mask registers" (#174872)   via llvm-commits
• [llvm] [DA] batch delinearization for fixed-size arrays (PR #170519)   via llvm-commits
• [llvm] [RISCV] Prevent P extension from creating unaligned scalar load/store insructions. (PR #174878)   via llvm-commits
• [llvm] [CGP] Sink and duplicate call for tail position when duplicating return (PR #172882)   via llvm-commits
• [llvm] [CGP] Sink and duplicate call for tail position when duplicating return (PR #172882)   via llvm-commits
• [llvm] [bazel] Port 0d23e3 (PR #174879)   via llvm-commits
• [llvm] [DA] batch delinearization for fixed-size arrays (PR #170519)   via llvm-commits
• [llvm] [DA] batch delinearization for fixed-size arrays (PR #170519)   via llvm-commits
• [llvm] 2789464 - [RISCV] Improve cost modeling of RISCVTTIImpl::getConstantPoolLoadCost() (#174438)   via llvm-commits
• [llvm] c99db71 - [WebAssembly] Disable explicit-locals in the libcalls.ll test. NFC (#174811)   via llvm-commits
• [llvm] [WebAssembly] Fold constant `i8x16.swizzle` and `i8x16.relaxed.swizzle` to `shufflevector` (PR #169110)   via llvm-commits
• [llvm] 9519d52 - [SPIRV] Handle aggregate arguments to `spv_store` (#172348)   via llvm-commits
• [llvm] de3e9b0 - [RISCV] Fold (fma (splat (fneg X)), Y, Z) -> (fma (fneg (splat X)), Y, Z) (#173808)   via llvm-commits
• [llvm] [LLVM] Add flatten function attribute to LLVM IR and implement recursive inlining in AlwaysInliner (PR #174899)   via llvm-commits
• [llvm] [AMDGPU] Fix a potential use-after-erase in `AMDGPUPromoteAlloca` pass (PR #174529)   via llvm-commits
• [llvm] [WebAssembly] Skip WASM-specific InstCombine tests properly (PR #174900)   via llvm-commits
• [llvm] [WebAssembly] Skip WASM-specific InstCombine tests properly (PR #174900)   via llvm-commits
• [llvm] [HLSL] Fix WaveBallot dxil op function name (PR #174901)   via llvm-commits
• [llvm] [SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [llvm] f813633 - [SPARC][IAS] Implement Solaris Natural Instruction extension (#170794)   via llvm-commits
• [llvm] [SPARC][IAS] Implement Solaris Natural Instruction extension (PR #170794)   via llvm-commits
• [llvm] [PowerPC] Optimize not equal compares against zero vectors (PR #150422)   via llvm-commits
• [llvm] 7565bbe - [WebAssembly] Skip WASM-specific InstCombine tests properly (#174900)   via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   via llvm-commits
• [llvm] [SDAG] fix miss opt: shl nuw + zext adds unnecessary masking (PR #172046)   via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   via llvm-commits
• [llvm] [AMDGPU][MC] Instructions not to be supported in GFX940 (PR #109225)   via llvm-commits
• [llvm] [AArch64] Optimize ANDS(CSET, CSET) to CCMP. (PR #174919)   via llvm-commits
• [llvm] 9ab9c1a - [RISCV] Generate Xqcilsm multi-word load/store instructions for three or more words (#174789)   via llvm-commits
• [llvm] [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (PR #174920)   via llvm-commits
• [llvm] 1fe27df - [RISCV][llvm] Support mul codegen for P extension (#174793)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] 16447cc - [NFC][SPIRV] Small changes for SPIRVPushConstantAccess (#174734)   via llvm-commits
• [llvm] 213e251 - [RISCV][llvm] Support div/rem codegen for P extension (#174801)   via llvm-commits
• [llvm] [VPlan] Split out optimizeEVLMasks. NFC (PR #174925)   via llvm-commits
• [llvm] fdc393f - MIPS: expandDivRem add a NOP after BNE (#174908)   via llvm-commits
• [llvm] [PseudoProbe] Add switch to control illegal guid warnings (PR #174927)   via llvm-commits
• [llvm] Attributor: Set up full SimplifyQuery for nofpclass (PR #174928)   via llvm-commits
• [llvm] ValueTracking: Use fcmp parent function to query denormal mode (PR #174929)   via llvm-commits
• [llvm] [VPlan] Strip iterator-invalidation guard in findHeaderMask (NFC) (PR #174930)   via llvm-commits
• [llvm] 6e751b0 - [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (#169661)   via llvm-commits
• [clang] [llvm] [Clang][LLVM][AArch64]Add support for svrint{32|64}{z|x} intrinsics (PR #169661)   via llvm-commits
• [llvm] [Offload] Fix line numbers after #174804 (PR #174932)   via llvm-commits
• [llvm] [DAG] computeKnownBits - add CTLS handling (PR #174824)   via llvm-commits
• [flang] [llvm] [flang] Enhance show_descriptor intrinsic to avoid extra copies and extra descriptor creation (PR #173461)   via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   via llvm-commits
• [llvm] ebae688 - [Flang][VecLib] Ensure TargetMachine->VecLib is set for flang invocations. (#174209)   via llvm-commits
• [llvm] a8f51a3 - ValueTracking: Use fcmp parent function to query denormal mode (#174929)   via llvm-commits
• [llvm] [BOLT][BTI] Disallow instrumenting BTI binaries (PR #174936)   via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   via llvm-commits
• [llvm] [LV] Change VPVectorPointerRecipe to emit byte GEP instead of typed GEP (PR #174934)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [bolt][RISCV] : Adjust the operand order of AMOADD to maintain consis… (PR #171580)   via llvm-commits
• [llvm] [BOLT][RISCV] : Adjust the operand order of AMOADD to maintain consis… (PR #171580)   via llvm-commits
• [llvm] [UniformityAnalysis] Jump over reducible cycles when locating join blocks (PR #174938)   via llvm-commits
• [llvm] [VPlan] Refine some types to VPIRValue (NFC) (PR #174939)   via llvm-commits
• [llvm] [X86] Fixed flags issue for onlyZeroFlagUsed (PR #174940)   via llvm-commits
• [llvm] [DWARF] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (PR #174941)   via llvm-commits
• [llvm] [AArch64] Add scal_to_vec patterns for rounding nodes (PR #173004)   via llvm-commits
• [llvm] 15564a8 - [Mips] Add MipsPat `(MipsGPRel tglobaladdr:$in)` to select MipsISD::GPRel TargetGlobalAddress (#165531)   via llvm-commits
• [compiler-rt] 3b68fd5 - [compiler-rt] Add supported Arm arches for the baremetal profile lib (#172984)   via llvm-commits
• [llvm] [AArch64] Add lowering for NEON saturating shift intrinsics (PR #171485)   via llvm-commits
• [llvm] [AArch64] Add test coverage for roundeven + float-to-int conversions (PR #173515)   via llvm-commits
• [llvm] [AArch64] Add test coverage for roundeven + float-to-int conversions (PR #173515)   via llvm-commits
• [llvm] [AArch64] Add test coverage for roundeven + float-to-int conversions (PR #173515)   via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   via llvm-commits
• [llvm] [AArch64] Add tests for vector rounding + float-to-int conversions (PR #173516)   via llvm-commits
• [llvm] [VPlan] Handle early exit loops with predicated successors (PR #172454)   via llvm-commits
• [llvm] [VPlan] Handle early exit loops with predicated successors (PR #172454)   via llvm-commits
• [llvm] [AArch64] Add tests for vector rounding + float-to-int conversions (PR #173516)   via llvm-commits
• [llvm] 3665de7 - [AArch64] Add lowering for NEON rounding multiple (accumulate) intrinsics (#172851)   via llvm-commits
• [llvm] a470e70 - AMDGPU: Teach lowering that sqrt never returns subnormal (#174838)   via llvm-commits
• [llvm] [CMake] Fix message type mistake (PR #174947)   via llvm-commits
• [llvm] [CMake] Fix message type mistake (PR #174947)   via llvm-commits
• [llvm] 1af1cc2 - [mlir][OpenMP] Translation support for taskloop construct (#174386)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] 90b8a48 - [SPIRV] Support additional comparison predicates for i1 types (#174585)   via llvm-commits
• [clang] [llvm] AMDGPU: Add builtin/intrinsic global_(load|store)_b128 (PR #172090)   via llvm-commits
• [llvm] 769dbe3 - [X86] combineConcatVectorOps - IsConcatFree - detect splats first, then check for repeated load. NFC. (#174950)   via llvm-commits
• [llvm] 8a2642c - [AArch64][llvm-mca] Add old Cyclone instruction tables for reference (#172652)   via llvm-commits
• [llvm] ValueTracking: Refactor computeKnownFPClass select handling (PR #174957)   via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   via llvm-commits
• [llvm] [BOLT] Add Arm's large-bolt-tests in docker-tests (PR #174961)   via llvm-commits
• [lld] [LLD] [MinGW] Add the --fat-lto-objects flag (PR #174962)   via llvm-commits
• [llvm] [Offload][CI] Enable offload runtime (PR #174955)   via llvm-commits
• [llvm] [X86] Add test showing failure to concat fma nodes due to the constant being hidden (PR #174969)   via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   via llvm-commits
• [lld] [lld][COFF] Add /linkreprofullpathrsp flag (PR #174971)   via llvm-commits
• [clang] [llvm] [LangRef] Clarify specification for float min/max operations (PR #172012)   via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (PR #152632)   via llvm-commits
• [llvm] [X86] Lower `minimum`/`maximum`/`minimumnum`/`maximumnum` using bitwise operations (PR #170069)   via llvm-commits
• [llvm] [llvm-c] Expose perf support for LLJIT in Orc C-API bindings (PR #174973)   via llvm-commits
• [llvm] [VPlan] Allow tail folding with uncountable early exits (PR #174974)   via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   via llvm-commits
• [llvm] [StandardInsturmentations] Add helper class to StandardInstrumentations (PR #153171)   via llvm-commits
• [llvm] 476ad9f - [X86] Add test showing failure to concat fma nodes due to the constant being hidden (#174969)   via llvm-commits
• [llvm] [VPlan] Allow tail folding with uncountable early exits (PR #174974)   via llvm-commits
• [llvm] [VPlan] Allow tail folding with uncountable early exits (PR #174974)   via llvm-commits
• [llvm] [VPlan] Fold VPDef into VPRecipeBase (NFC). (PR #174282)   via llvm-commits
• [llvm] [VPlan] Fold VPDef into VPRecipeBase (NFC). (PR #174282)   via llvm-commits
• [llvm] [VPlan] Fold VPDef into VPRecipeBase (NFC). (PR #174282)   via llvm-commits
• [llvm] [VPlan] Fold VPDef into VPRecipeBase (NFC). (PR #174282)   via llvm-commits
• [llvm] [VPlan] Add specialized VPValue subclasses for different types (NFC) (PR #172758)   via llvm-commits
• [llvm] [InstCombinePHI] Enable gep arg fold transform with constant indices (PR #174981)   via llvm-commits
• [llvm] 4903c62 - [WebAssembly] Change `half` to use soft promotion rather than `PromoteFloat` (#152833)   via llvm-commits
• [llvm] f76417d - [IRCE] Prove predicates with and without loop-guarded SCEVs (#174843)   via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Fix sanitizer error in buildTaskLikeBodyGenCallback (PR #174983)   via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Fix sanitizer error in buildTaskLikeBodyGenCallback (PR #174983)   via llvm-commits
• [llvm] [mlir] [mlir][OpenMP] Fix sanitizer error in buildTaskLikeBodyGenCallback (PR #174983)   via llvm-commits
• [llvm] 5f590ed - [SystemZ][z/OS] Improve use of formatv (#174503)   via llvm-commits
• [llvm] db26ce5 - [PowerPC] Change `half` to use soft promotion rather than `PromoteFloat` (#152632)   via llvm-commits
• [llvm] [InstCombinePHI] Enable gep arg fold transform with constant indices (PR #174981)   via llvm-commits
• [llvm] [InstCombinePHI] Enable gep arg fold transform with constant indices (PR #174981)   via llvm-commits
• [compiler-rt] 012097d - [compiler-rt][AArch64] Exit early from __arm_za_disable. (#174942)   via llvm-commits
• [llvm] [X86] combineConcatVectorOps - IsConcatFree - detect splats that comes from a common load/broadcastload (PR #174986)   via llvm-commits
• [llvm] 9973e38 - [SDPatternMatch] Add m_FAbs matcher (#174975)   via llvm-commits
• [llvm] [SDPatternMatch] Add m_FAbs matcher (PR #174975)   via llvm-commits
• [llvm] [CommandLine] Use DenseMap instead of StringMap (NFC) (PR #174988)   via llvm-commits
• [llvm] [CommandLine] Use DenseMap instead of StringMap (NFC) (PR #174988)   via llvm-commits
• [llvm] [BOLT] Avoid UB due to misaligned access. (PR #174990)   via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   via llvm-commits
• [llvm] [RISCV] Fix ReplaceNodeResults of Intrinsic::experimental_cttz_elts for RV32 (PR #174992)   via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   via llvm-commits
• [llvm] [Offload][CI] Convert openmp-offload-amdgpu staging bots to ScriptedBuilder (PR #174991)   via llvm-commits
• [llvm] [mlir] [MLIR] convert OpAsmDialectInterface using ODS (PR #171488)   via llvm-commits
• [llvm] f5c39a6 - [SPIRV] Additional fixes for const init via `UtoPtr` (#172584)   via llvm-commits
• [llvm] [BOLT][AArch64] Avoid UB due to shift of negative value. (PR #174994)   via llvm-commits
• [llvm] [AMDGPU] Simplify class VINTERPe. NFC. (PR #175006)   via llvm-commits
• [llvm] [SLP] Use ConstantInt::getSigned for stride argument to strided load/store intrinsics (PR #175007)   via llvm-commits
• [llvm] [SLP] Use ConstantInt::getSigned for stride argument to strided load/store intrinsics (PR #175007)   via llvm-commits
• [llvm] e89bec7 - [SelectionDAG] Expand CLMUL in PromoteIntRes_CLMUL if the operation isn't legal/custom for the promoted type. (#174911)   via llvm-commits
• [llvm] 80296b6 - ValueTracking: Refactor computeKnownFPClass select handling (#174957)   via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   via llvm-commits
• [llvm] [X86][InstCombine] Generalize SSE/AVX fp MAX/MIN intrinsics to maxnum/minnum (PR #174806)   via llvm-commits
• [llvm] ec66d18 - InstCombine: Fixup known fp class for select and compare (#174958)   via llvm-commits
• [llvm] c035dfb - [AMDGPU] Simplify class VINTERPe. NFC. (#175006)   via llvm-commits
• [llvm] [RISCV] Bail out of combineNarrowableShiftedLoad for types other than scalar int (PR #175011)   via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   via llvm-commits
• [llvm] e39ddab - [llvm-c] Add LLVMParseIRInContext2 (#174085)   via llvm-commits
• [llvm] 418eee7 - [RISCV] Bail out of combineNarrowableShiftedLoad for types other than scalar int (#175011)   via llvm-commits
• [llvm] 325869c - [PowerPC] Add AMO load signed builtins (#168747)   via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (PR #174905)   via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   via llvm-commits
• [llvm] f4a7f70 - [NVPTX] Use correct `mul.wide` operand type when matching on `shl` in `combineMulWide` (#168986)   via llvm-commits
• [llvm] 4e3699b - [RISCV] Mark More Relocs as Relaxable (#151422)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add register bank legalize rules for amdgcn_icmp, amdgcn_fcmp (PR #172017)   via llvm-commits
• [llvm] ecd2b68 - [CMake] Don't explicitly set folder for InstrumentationTests (#170041)   via llvm-commits
• [llvm] 057c7a7 - [PowerPC] Add type checking for DMF insert (#172078)   via llvm-commits
• [llvm] [PowerPC] Add type checking for DMF insert (PR #172078)   via llvm-commits
• [llvm] [RISCV] Add rules for Zca+Zcb+Zcmp+Zcmpt implying Zce. (PR #175041)   via llvm-commits
• [llvm] f8b68c7 - [SPIR-V] Add builtin/intrinsic for subgroup ballot (#174862)   via llvm-commits
• [llvm] 4f7da2f - [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (#173734)   via llvm-commits
• [llvm] [AArch64] Add intra-block CSINC optimization to AArch64ConditionOptimizer (PR #173734)   via llvm-commits
• [compiler-rt] 65945ec - [compiler-rt] [Darwin] Add darwin-remote feature for remote darwin test targets (#174905)   via llvm-commits
• [llvm] ff617bc - [HLSL] Fix WaveBallot dxil op function name (#174901)   via llvm-commits
• [clang] [llvm] [Clang] Add `__builtin_stack_address` (PR #148281)   via llvm-commits
• [lld] lld: Add initial support for GNU LTO format (PR #157175)   via llvm-commits
• [lld] lld: Add initial support for GNU LTO format (PR #157175)   via llvm-commits
• [llvm] [AMDGPU][Scheduler] Scoring system for rematerializations (PR #175050)   via llvm-commits
• [clang] [flang] [lld] [llvm] [mlir] [RFC] Use pre-compiled headers to speed up LLVM build (~1.5-2x) (PR #173868)   via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize features for gfx125x (PR #175054)   via llvm-commits
• [llvm] 700d1f0 - [TableGen] Support RegClassByHwMode in CompressPat   via llvm-commits
• [llvm] [STLExtras] Introduce BinaryPredicateFunctor, [not_]equal_to (PR #175056)   via llvm-commits
• [llvm] [XTensa] Fix implicit trunc assertion in LowerImmediate (PR #175059)   via llvm-commits
• [llvm] [SelectionDAG] Unify ISD::LOAD handling in ComputeNumSignBits. NFC (PR #175060)   via llvm-commits
• [llvm] [Xtensa] Regenerate test/CodeGen/Xtensa/mul.ll to fix test (PR #175062)   via llvm-commits
• [llvm] 289a329 - [EarlyIfConversion] Fix loop invariant operands check (#174765)   via llvm-commits
• [llvm] c379a88 - [NFC][AMDGPU] Reorganize features for gfx125x (#175054)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [llvm] [RISCV] Introduce a new syntax for processor-specific tuning feature strings (Take 2) (PR #175063)   via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   via llvm-commits
• [clang] [llvm] [SPIR-V] Add clang builtin for group-wide barrier (PR #175064)   via llvm-commits
• [llvm] 708663c - Precommit test for PR #171012 (#171013)   via llvm-commits
• [llvm] [RISCV] Introduce a new syntax for processor-specific tuning feature strings (Take 2) (PR #175063)   via llvm-commits
• [llvm] [RISCV] Introduce a new syntax for processor-specific tuning feature strings (Take 2) (PR #175063)   via llvm-commits
• [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   via llvm-commits
• [llvm] [SPIRV] Improve vector legalization and type deduction (PR #175067)   via llvm-commits
• [llvm] 4327bb4 - DeveloperPolicy: Add note about legacy bitcode performance (#174720)   via llvm-commits
• [llvm] [SPIRV] Improve vector legalization and type deduction (PR #175067)   via llvm-commits
• [llvm] [GISel][RISCV] Add G_CTLS Opcode and combines, lower to cls(w) (PR #175069)   via llvm-commits
• [flang] [llvm] [llvm][flang] Silence warning, resume -Werror builds of flang (PR #175053)   via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   via llvm-commits
• [llvm] [LoopFusion] Non-loop block must be the immediate successor of exit (PR #175034)   via llvm-commits
• [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   via llvm-commits
• [llvm] [RISCV] Mark Xqccmp as not experimental (PR #175066)   via llvm-commits
• [llvm] [BPF] Implement `canLowerReturn` for big returns (PR #174478)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FLDEXP (PR #175072)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FLDEXP (PR #175072)   via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   via llvm-commits
• [llvm] [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block. (PR #166227)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_FLDEXP (PR #175072)   via llvm-commits
• [llvm] a209ff8 - [InstCombine] Limit canonicalization of extractelement(cast) to constant index or same basic block (#166227)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor expm1f16 implementation to header-only in src/__support/math folder. (PR #162132)   via llvm-commits
• [llvm] 51c37f4 - [CodeGen] Strip Coroutine suffixes when generating pseudo probe (#173834)   via llvm-commits
• [llvm] [CodeGen] Strip Coroutine suffixes when generating pseudo probe (PR #173834)   via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   via llvm-commits
• [llvm] [GISel][RISCV] Add G_CTLS Opcode and combines, lower to cls(w) (PR #175069)   via llvm-commits
• [llvm] [GISel][RISCV] Add G_CTLS Opcode and combines, lower to cls(w) (PR #175069)   via llvm-commits
• [llvm] 86b95b0 - [SampleProf] Handle coro wrapper function name canonicalization (#174881)   via llvm-commits
• [llvm] b86ac2a - [SPIR-V] Add clang builtin for group-wide barrier (#175064)   via llvm-commits
• [llvm] f7b20ec - [AMDGPU][GlobalISel] Add RegBankLegalize support for G_UMULH, G_SMULH (#174555)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize support for G_UMULH, G_SMULH (PR #174555)   via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   via llvm-commits
• [llvm] 5cf9208 - [AMDGPU] Optimize block count calculations to the new ABI (#174112)   via llvm-commits
• [llvm] 5ab966a - [LoopFusion] Non-loop block must be the immediate successor of exit (#175034)   via llvm-commits
• [llvm] [OFFLOAD] Make L0 provide more information about device to be consistent with other plugins (PR #172946)   via llvm-commits
• [llvm] 6c5535b - [SelectionDAG] Unify ISD::LOAD handling in ComputeNumSignBits. NFC (#175060)   via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   via llvm-commits
• [llvm] e4b97eb - [MachineVerifier](NFC)(TestOnly) Canonicalise top-level MachineVerifier tests (#172527)   via llvm-commits
• [llvm] [AMDGPU] VGPR instruction placement should be aware of exec mask prol… (PR #175080)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [llvm] a1c2882 - [ORC] Add JITDylibDefunct Error. (#174923)   via llvm-commits
• [compiler-rt] [compiler-rt] [Darwin] VerifyMemoryMapping should ignore zero-size sections (PR #175083)   via llvm-commits
• [llvm] 03ad3d2 - [CodeGen] Consider imm offsets when sorting framerefs (#171012)   via llvm-commits
• [llvm] [OFFLOAD] Add memory data locking API for libomptarget migration (PR #173138)   via llvm-commits
• [llvm] [offload][lit] Enable llvm-omp-device-info.c on Intel GPUs (PR #175084)   via llvm-commits
• [llvm] [VPlan] Absorb VPDef into VPRecipeBase (NFC) (PR #175085)   via llvm-commits
• [llvm] [ReachingDefAnalysis][NFC] Use named constants. (PR #175075)   via llvm-commits
• [llvm] [BOLT][RISCV] : Adjust the operand order of AMOADD to maintain consis… (PR #171580)   via llvm-commits
• [llvm] [WebAssembly] Add wasm64 testing to varargs.ll [NFC] (PR #175102)   via llvm-commits
• [llvm] [BoundsChecking] Clamp trap ID if it would overflow (PR #175103)   via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   via llvm-commits
• [llvm] [JumpThreading] Refractor redirectValuesFromPredecessorsToPhi: avoid unnecessary map resizing in gatherIncomingValuesToPhi (PR #173596)   via llvm-commits
• [clang] [llvm] [SPIR-V] Enable variadic function lowering for the SPIR-V target (PR #175076)   via llvm-commits
• [llvm] 2daf321 - [InstCombine] Add support for Instruction combining of hyperbolic functions (#173730)   via llvm-commits
• [llvm] [AMDGPU] Invert scc uses to delete s_cmp_eq* (PR #167382)   via llvm-commits
• [llvm] 6902f33 - [RISCV] Add support for Zibi experimental extension in RISCVRedundantCopyElimination (#174920)   via llvm-commits
• [llvm] 8853caf - [Xtensa] Fix implicit trunc assertion in LowerImmediate   via llvm-commits
• [llvm] 1a53a28 - [Xtensa] Regenerate test/CodeGen/Xtensa/mul.ll to fix test   via llvm-commits
• [llvm] [TableGen] Change emitted comments for OPC_Scope to be more like OPC_SwitchType/Opcode. NFC (PR #175124)   via llvm-commits
• [llvm] 9395381 - Revert "[AArch64] Fold scalar-to-vector shuffles into DUP/FMOV" (#175123)   via llvm-commits
• [llvm] [SLP] Create SLP trees starting from constant stride stores (PR #175126)   via llvm-commits
• [llvm] [TableGen] Add a helper function for emitting an MVT in the isel table. NFC (PR #175127)   via llvm-commits
• [llvm] [TableGen] Print MVT name in the isel table when it doesn't require a VBR. (PR #175128)   via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   via llvm-commits
• [llvm] [DebugInfo] Add a new DI flag to record if the name of a template function/type has been simplified (1/3). (PR #175130)   via llvm-commits
• [llvm] [DebugInfo] Add a new DI flag to record if the name of a template function/type has been simplified (1/3). (PR #175130)   via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   via llvm-commits
• [llvm] 66d41f8 - Reapply "[llvm-exegesis] Add AArch64 operand initializers, SetRegTo" (#174729) (#174944)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Prevent `omp.map.info` ops with user-defined mappers from being marked as parial maps (PR #175133)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Prevent `omp.map.info` ops with user-defined mappers from being marked as parial maps (PR #175133)   via llvm-commits
• [lld] a2e8394 - [LLD] [MinGW] Add the --fat-lto-objects flag (#174962)   via llvm-commits
• [llvm] [AMDGPU] Add wave reduce intrinsics for double types - 1 (PR #170811)   via llvm-commits
• [llvm] bd87ab1 - [AArch64] Optimize ANDS(CSET, CSET) to CCMP. (#174919)   via llvm-commits
• [llvm] [ORC] Handle unset FinalizeFuture in ELFDebugObjectPlugin::awaitTargetMem (PR #175143)   via llvm-commits
• [llvm] 4684e50 - [Instcombine] Ensure simplifyValueKnownNonZero adds instrs in dominance order (#173703)   via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] PreserveAll attribute (PR #175145)   via llvm-commits
• [clang] [llvm] [clang][llvm][PPC] PreserveAll attribute (PR #175145)   via llvm-commits
• [llvm] c39f8b4 - [Instcombine] Fix infinite loop in visitSelectInst (#173704)   via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   via llvm-commits
• [llvm] [XCore] Use `softPromoteHalfType` (PR #175142)   via llvm-commits
• [llvm] [MSP430] Use `softPromoteHalfType` (PR #175139)   via llvm-commits
• [llvm] [M68k] Use `softPromoteHalfType` (PR #175140)   via llvm-commits
• [flang] [llvm] [flang][OpenMP] Prevent `omp.map.info` ops with user-defined mappers from being marked as parial maps (PR #175133)   via llvm-commits
• [llvm] b540103 - [DAG]Add ISD::SPLAT_VECTOR to TargetLowering::getNegatedExpression (#173967)   via llvm-commits
• [llvm] a218940 - [Lanai] Use `softPromoteHalfType` (#175137)   via llvm-commits
• [llvm] 8857534 - [MSP430] Use `softPromoteHalfType` (#175139)   via llvm-commits
• [llvm] 2a254d4 - [M68k] Use `softPromoteHalfType` (#175140)   via llvm-commits
• [llvm] a06bf00 - [VE] Use `softPromoteHalfType` (#175141)   via llvm-commits
• [llvm] 054ee2f - [CSKY] Use `softPromoteHalfType` (#175138)   via llvm-commits
• [llvm] [AArch64] Add lowering for NEON saturating shift intrinsics (PR #171485)   via llvm-commits
• [llvm] [BOLT] Fix label in epilogue-determination.s test (PR #174960)   via llvm-commits
• [llvm] 1be04b7 - [XCore] Use `softPromoteHalfType` (#175142)   via llvm-commits
• [llvm] b7c17ab - [MLIR][OpenMP] Add Initial Taskloop Clause Support (#174623)   via llvm-commits
• [llvm] [llvm-jitlink] Replace IR backtrace symbolication testcase with asm. (PR #175117)   via llvm-commits
• [lld] e91447f - Fix lld crash using --fix-cortex-a53-843419 (#170495)   via llvm-commits
• [lld] Fix lld crash using --fix-cortex-a53-843419 (PR #170495)   via llvm-commits
• [llvm] [TableGen] Remove deprecated !getop and !setop (PR #175155)   via llvm-commits
• [llvm] [X86] Rename commute-clmul.ll -> commute-pclmul.ll (PR #175157)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [compiler-rt] 781677e - [PPC] Disable some ORC-powerpc64le-linux tests. (#175100)   via llvm-commits
• [llvm] [AMDGPU] Introduce Next-Use Analysis for SSA-based Register Allocation (PR #156079)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] [Delinearization] Extract array dimensions from global declarations (PR #175158)   via llvm-commits
• [llvm] [Delinearization] Extract array dimensions from global declarations (PR #175158)   via llvm-commits
• [llvm] b28eeb2 - [CodeGen] Generalise Hexagon flags for memop inline thresholds (#172829)   via llvm-commits
• [llvm] 30c88f7 - [X86] Rename commute-clmul.ll -> commute-pclmul.ll (#175157)   via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   via llvm-commits
• [llvm] [Utils][update_mc_test_checks] Handle double quotes in asm source (PR #175161)   via llvm-commits
• [llvm] [Delinearization] Extract array dimensions from global declarations (PR #175158)   via llvm-commits
• [llvm] [Delinearization] Extract array dimensions from global declarations (PR #175158)   via llvm-commits
• [llvm] Try to simplify select v32i4 case by legalizing v16i4 (PR #173328)   via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] 687eb2c - [AllocToken] Fix attribute mismatch in AllocTokenPass (#174959)   via llvm-commits
• [llvm] [AllocToken] Fix attribute mismatch in AllocTokenPass (PR #174959)   via llvm-commits
• [llvm] [openmp] [OMPT][Offload][OpenMP] Fixes for OMPT data used by libomptarget (reapply #156020) (PR #175165)   via llvm-commits
• [llvm] [flang-rt][build] Disable build-time warning of '-Wshift-count-negative' from g++ compiler and remove unsupported floating-point data. (PR #174915)   via llvm-commits
• [llvm] [NaryReassociate] Teach NaryReassociate about UniformityAnalysis (PR #175167)   via llvm-commits
• [llvm] Add symbol version support to llvm-ifs (PR #163030)   via llvm-commits
• [llvm] 82353b5 - [CodeGen][NFC] Improve readability of getLocalLiveOutMIDef (#175074)   via llvm-commits
• [llvm] [ReachingDefAnalysis] Simpilify `getGlobalReachingDefs` (PR #175169)   via llvm-commits
• [llvm] [ReachingDefAnalysis] Simpilify `getGlobalReachingDefs` (PR #175169)   via llvm-commits
• [llvm] 7f5dbbc - [Utils][update_mc_test_checks] Handle double quotes in asm source (#175161)   via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (PR #174243)   zhijian lin via llvm-commits
• [llvm] [NFC][PowerPC] Pre-commit adding test case: use millicode for strcpy (PR #174243)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits
• [llvm] [PowerPC] using milicode call for strcpy instead of lib call (PR #174782)   zhijian lin via llvm-commits