[llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)

[Kerry McLaughlin via llvm-commits]

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@@ -359,16 +359,10 @@ define <2 x i64> @fcvtzs_2d(<2 x double> %A) nounwind {
 
 ; FIXME: Generate "fcvtzs d0, d0"?
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kmclaughlin-arm wrote:

Can these `FIXME`s be removed now?

https://github.com/llvm/llvm-project/pull/172837