[llvm] [SDAG] (setcc (add nsw a, b), zero, s??) -> (setcc a, b, s??) (PR #175459)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 11 18:35:45 PST 2026
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@@ -13893,6 +13893,13 @@ SDValue DAGCombiner::visitSETCC(SDNode *N) {
return Combined;
}
+ // (setcc (sub n?w a, b), zero, ?lt) -> (setcc a, b, ?lt)
----------------
topperc wrote:
Is this valid for all condition codes or just `lt`?
https://github.com/llvm/llvm-project/pull/175459
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