[llvm] [RISCV][llvm] Support frame index in zilsd optimizer (PR #174073)

[Craig Topper via llvm-commits]

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@@ -462,16 +477,22 @@ bool RISCVPreAllocZilsdOpt::rescheduleLoadStoreInstrs(MachineBasicBlock *MBB) {
         continue;
 
       bool IsLd = (MI.getOpcode() == RISCV::LW);
-      Register Base = MI.getOperand(1).getReg();
+      const MachineOperand &BaseOp = MI.getOperand(1);
+      unsigned BaseReg;
+      bool BaseIsReg = BaseOp.isReg();
+      if (BaseIsReg)
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topperc wrote:

```suggestion
      if (BaseOp.isReg())
```

https://github.com/llvm/llvm-project/pull/174073