[llvm] 0d6f651 - [X86] Add baseline clmul intrinsic test coverage (#175185)
via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 9 07:51:44 PST 2026
Author: Simon Pilgrim
Date: 2026-01-09T15:51:39Z
New Revision: 0d6f65160a9ec38a338c749148d91aced6df9437
URL: https://github.com/llvm/llvm-project/commit/0d6f65160a9ec38a338c749148d91aced6df9437
DIFF: https://github.com/llvm/llvm-project/commit/0d6f65160a9ec38a338c749148d91aced6df9437.diff
LOG: [X86] Add baseline clmul intrinsic test coverage (#175185)
Added:
llvm/test/CodeGen/X86/clmul-vector.ll
llvm/test/CodeGen/X86/clmul.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/clmul-vector.ll b/llvm/test/CodeGen/X86/clmul-vector.ll
new file mode 100644
index 0000000000000..e8a773f5631de
--- /dev/null
+++ b/llvm/test/CodeGen/X86/clmul-vector.ll
@@ -0,0 +1,6878 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=SSE,SSE2
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=SSE,SSE42
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX,AVX2
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX,AVX512
+
+define <16 x i8> @clmul_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
+; SSE2-LABEL: clmul_v16i8:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm4, %xmm5
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255]
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: packuswb %xmm5, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
+; SSE2-NEXT: pand %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm6
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm6
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm5
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: packuswb %xmm6, %xmm5
+; SSE2-NEXT: pxor %xmm4, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: movdqa %xmm6, %xmm4
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm6
+; SSE2-NEXT: packuswb %xmm4, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm4, %xmm7
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm7 = xmm7[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm7
+; SSE2-NEXT: pand %xmm3, %xmm7
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: packuswb %xmm7, %xmm4
+; SSE2-NEXT: pxor %xmm6, %xmm4
+; SSE2-NEXT: pxor %xmm5, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; SSE2-NEXT: pand %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm6
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm6
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm5
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: packuswb %xmm6, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: movdqa %xmm6, %xmm7
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm7 = xmm7[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm7
+; SSE2-NEXT: pand %xmm3, %xmm7
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm6
+; SSE2-NEXT: packuswb %xmm7, %xmm6
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; SSE2-NEXT: pand %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm7
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm7 = xmm7[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm7
+; SSE2-NEXT: pand %xmm3, %xmm7
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm5
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: packuswb %xmm7, %xmm5
+; SSE2-NEXT: pxor %xmm6, %xmm5
+; SSE2-NEXT: pxor %xmm4, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm4
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm2, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm1, %xmm0
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: packuswb %xmm4, %xmm0
+; SSE2-NEXT: pxor %xmm5, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmul_v16i8:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: movdqa %xmm0, %xmm4
+; SSE42-NEXT: pmullw %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
+; SSE42-NEXT: pand %xmm2, %xmm4
+; SSE42-NEXT: movdqa %xmm2, %xmm5
+; SSE42-NEXT: pandn %xmm3, %xmm5
+; SSE42-NEXT: movdqa %xmm0, %xmm3
+; SSE42-NEXT: pmaddubsw %xmm5, %xmm3
+; SSE42-NEXT: psllw $8, %xmm3
+; SSE42-NEXT: por %xmm4, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pmullw %xmm4, %xmm5
+; SSE42-NEXT: pand %xmm2, %xmm5
+; SSE42-NEXT: movdqa %xmm2, %xmm6
+; SSE42-NEXT: pandn %xmm4, %xmm6
+; SSE42-NEXT: movdqa %xmm0, %xmm4
+; SSE42-NEXT: pmaddubsw %xmm6, %xmm4
+; SSE42-NEXT: psllw $8, %xmm4
+; SSE42-NEXT: por %xmm5, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pmullw %xmm3, %xmm5
+; SSE42-NEXT: pand %xmm2, %xmm5
+; SSE42-NEXT: movdqa %xmm2, %xmm6
+; SSE42-NEXT: pandn %xmm3, %xmm6
+; SSE42-NEXT: movdqa %xmm0, %xmm7
+; SSE42-NEXT: pmaddubsw %xmm6, %xmm7
+; SSE42-NEXT: psllw $8, %xmm7
+; SSE42-NEXT: por %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pmullw %xmm3, %xmm5
+; SSE42-NEXT: pand %xmm2, %xmm5
+; SSE42-NEXT: movdqa %xmm2, %xmm6
+; SSE42-NEXT: pandn %xmm3, %xmm6
+; SSE42-NEXT: movdqa %xmm0, %xmm3
+; SSE42-NEXT: pmaddubsw %xmm6, %xmm3
+; SSE42-NEXT: psllw $8, %xmm3
+; SSE42-NEXT: por %xmm5, %xmm3
+; SSE42-NEXT: pxor %xmm7, %xmm3
+; SSE42-NEXT: pxor %xmm4, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pmullw %xmm4, %xmm5
+; SSE42-NEXT: pand %xmm2, %xmm5
+; SSE42-NEXT: movdqa %xmm2, %xmm6
+; SSE42-NEXT: pandn %xmm4, %xmm6
+; SSE42-NEXT: movdqa %xmm0, %xmm4
+; SSE42-NEXT: pmaddubsw %xmm6, %xmm4
+; SSE42-NEXT: psllw $8, %xmm4
+; SSE42-NEXT: por %xmm5, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]
+; SSE42-NEXT: pand %xmm1, %xmm5
+; SSE42-NEXT: movdqa %xmm0, %xmm6
+; SSE42-NEXT: pmullw %xmm5, %xmm6
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: movdqa %xmm2, %xmm7
+; SSE42-NEXT: pandn %xmm5, %xmm7
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pmaddubsw %xmm7, %xmm5
+; SSE42-NEXT: psllw $8, %xmm5
+; SSE42-NEXT: por %xmm6, %xmm5
+; SSE42-NEXT: pxor %xmm4, %xmm5
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: movdqa %xmm0, %xmm6
+; SSE42-NEXT: pmullw %xmm4, %xmm6
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: movdqa %xmm2, %xmm7
+; SSE42-NEXT: pandn %xmm4, %xmm7
+; SSE42-NEXT: movdqa %xmm0, %xmm4
+; SSE42-NEXT: pmaddubsw %xmm7, %xmm4
+; SSE42-NEXT: psllw $8, %xmm4
+; SSE42-NEXT: por %xmm6, %xmm4
+; SSE42-NEXT: pxor %xmm5, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE42-NEXT: movdqa %xmm0, %xmm3
+; SSE42-NEXT: pmullw %xmm1, %xmm3
+; SSE42-NEXT: pand %xmm2, %xmm3
+; SSE42-NEXT: pandn %xmm1, %xmm2
+; SSE42-NEXT: pmaddubsw %xmm2, %xmm0
+; SSE42-NEXT: psllw $8, %xmm0
+; SSE42-NEXT: por %xmm3, %xmm0
+; SSE42-NEXT: pxor %xmm4, %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmul_v16i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero
+; AVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255]
+; AVX2-NEXT: vpand %ymm2, %ymm3, %ymm3
+; AVX2-NEXT: vextracti128 $1, %ymm3, %xmm4
+; AVX2-NEXT: vpackuswb %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpand %ymm2, %ymm4, %ymm4
+; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm5
+; AVX2-NEXT: vpackuswb %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpand %ymm2, %ymm4, %ymm4
+; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm5
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm6
+; AVX2-NEXT: vpackuswb %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm5 = xmm6[0],zero,xmm6[1],zero,xmm6[2],zero,xmm6[3],zero,xmm6[4],zero,xmm6[5],zero,xmm6[6],zero,xmm6[7],zero,xmm6[8],zero,xmm6[9],zero,xmm6[10],zero,xmm6[11],zero,xmm6[12],zero,xmm6[13],zero,xmm6[14],zero,xmm6[15],zero
+; AVX2-NEXT: vpmullw %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpand %ymm2, %ymm5, %ymm5
+; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm6
+; AVX2-NEXT: vpackuswb %xmm6, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpand %ymm2, %ymm4, %ymm4
+; AVX2-NEXT: vextracti128 $1, %ymm4, %xmm5
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm6
+; AVX2-NEXT: vpackuswb %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm5 = xmm6[0],zero,xmm6[1],zero,xmm6[2],zero,xmm6[3],zero,xmm6[4],zero,xmm6[5],zero,xmm6[6],zero,xmm6[7],zero,xmm6[8],zero,xmm6[9],zero,xmm6[10],zero,xmm6[11],zero,xmm6[12],zero,xmm6[13],zero,xmm6[14],zero,xmm6[15],zero
+; AVX2-NEXT: vpmullw %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpand %ymm2, %ymm5, %ymm5
+; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm6
+; AVX2-NEXT: vpackuswb %xmm6, %xmm5, %xmm5
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm6
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm5 = xmm6[0],zero,xmm6[1],zero,xmm6[2],zero,xmm6[3],zero,xmm6[4],zero,xmm6[5],zero,xmm6[6],zero,xmm6[7],zero,xmm6[8],zero,xmm6[9],zero,xmm6[10],zero,xmm6[11],zero,xmm6[12],zero,xmm6[13],zero,xmm6[14],zero,xmm6[15],zero
+; AVX2-NEXT: vpmullw %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpand %ymm2, %ymm5, %ymm5
+; AVX2-NEXT: vextracti128 $1, %ymm5, %xmm6
+; AVX2-NEXT: vpackuswb %xmm6, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm3, %xmm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmul_v16i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm4 = xmm4[0],zero,xmm4[1],zero,xmm4[2],zero,xmm4[3],zero,xmm4[4],zero,xmm4[5],zero,xmm4[6],zero,xmm4[7],zero,xmm4[8],zero,xmm4[9],zero,xmm4[10],zero,xmm4[11],zero,xmm4[12],zero,xmm4[13],zero,xmm4[14],zero,xmm4[15],zero
+; AVX512-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm3 = xmm3[0],zero,xmm3[1],zero,xmm3[2],zero,xmm3[3],zero,xmm3[4],zero,xmm3[5],zero,xmm3[6],zero,xmm3[7],zero,xmm3[8],zero,xmm3[9],zero,xmm3[10],zero,xmm3[11],zero,xmm3[12],zero,xmm3[13],zero,xmm3[14],zero,xmm3[15],zero
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero,xmm2[4],zero,xmm2[5],zero,xmm2[6],zero,xmm2[7],zero,xmm2[8],zero,xmm2[9],zero,xmm2[10],zero,xmm2[11],zero,xmm2[12],zero,xmm2[13],zero,xmm2[14],zero,xmm2[15],zero
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm1
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX512-NEXT: vpmullw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpmovwb %ymm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %res = call <16 x i8> @llvm.clmul.v16i8(<16 x i8> %a, <16 x i8> %b)
+ ret <16 x i8> %res
+}
+
+define <8 x i16> @clmul_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
+; SSE-LABEL: clmul_v8i16:
+; SSE: # %bb.0:
+; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,2,2,2,2,2,2,2]
+; SSE-NEXT: pand %xmm1, %xmm2
+; SSE-NEXT: pmullw %xmm0, %xmm2
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1,1,1,1,1]
+; SSE-NEXT: pand %xmm1, %xmm3
+; SSE-NEXT: pmullw %xmm0, %xmm3
+; SSE-NEXT: pxor %xmm2, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm2 = [4,4,4,4,4,4,4,4]
+; SSE-NEXT: pand %xmm1, %xmm2
+; SSE-NEXT: pmullw %xmm0, %xmm2
+; SSE-NEXT: movdqa {{.*#+}} xmm4 = [8,8,8,8,8,8,8,8]
+; SSE-NEXT: pand %xmm1, %xmm4
+; SSE-NEXT: pmullw %xmm0, %xmm4
+; SSE-NEXT: pxor %xmm2, %xmm4
+; SSE-NEXT: pxor %xmm3, %xmm4
+; SSE-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16]
+; SSE-NEXT: pand %xmm1, %xmm2
+; SSE-NEXT: pmullw %xmm0, %xmm2
+; SSE-NEXT: movdqa {{.*#+}} xmm5 = [32,32,32,32,32,32,32,32]
+; SSE-NEXT: pand %xmm1, %xmm5
+; SSE-NEXT: pmullw %xmm0, %xmm5
+; SSE-NEXT: pxor %xmm2, %xmm5
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [64,64,64,64,64,64,64,64]
+; SSE-NEXT: pand %xmm1, %xmm3
+; SSE-NEXT: pmullw %xmm0, %xmm3
+; SSE-NEXT: pxor %xmm5, %xmm3
+; SSE-NEXT: pxor %xmm4, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,128,128,128,128,128]
+; SSE-NEXT: pand %xmm1, %xmm2
+; SSE-NEXT: pmullw %xmm0, %xmm2
+; SSE-NEXT: movdqa {{.*#+}} xmm4 = [256,256,256,256,256,256,256,256]
+; SSE-NEXT: pand %xmm1, %xmm4
+; SSE-NEXT: pmullw %xmm0, %xmm4
+; SSE-NEXT: pxor %xmm2, %xmm4
+; SSE-NEXT: movdqa {{.*#+}} xmm5 = [512,512,512,512,512,512,512,512]
+; SSE-NEXT: pand %xmm1, %xmm5
+; SSE-NEXT: pmullw %xmm0, %xmm5
+; SSE-NEXT: pxor %xmm4, %xmm5
+; SSE-NEXT: movdqa {{.*#+}} xmm2 = [1024,1024,1024,1024,1024,1024,1024,1024]
+; SSE-NEXT: pand %xmm1, %xmm2
+; SSE-NEXT: pmullw %xmm0, %xmm2
+; SSE-NEXT: pxor %xmm5, %xmm2
+; SSE-NEXT: pxor %xmm3, %xmm2
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [2048,2048,2048,2048,2048,2048,2048,2048]
+; SSE-NEXT: pand %xmm1, %xmm3
+; SSE-NEXT: pmullw %xmm0, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm4 = [4096,4096,4096,4096,4096,4096,4096,4096]
+; SSE-NEXT: pand %xmm1, %xmm4
+; SSE-NEXT: pmullw %xmm0, %xmm4
+; SSE-NEXT: pxor %xmm3, %xmm4
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [8192,8192,8192,8192,8192,8192,8192,8192]
+; SSE-NEXT: pand %xmm1, %xmm3
+; SSE-NEXT: pmullw %xmm0, %xmm3
+; SSE-NEXT: pxor %xmm4, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm4 = [16384,16384,16384,16384,16384,16384,16384,16384]
+; SSE-NEXT: pand %xmm1, %xmm4
+; SSE-NEXT: pmullw %xmm0, %xmm4
+; SSE-NEXT: pxor %xmm3, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: pmullw %xmm1, %xmm0
+; SSE-NEXT: pxor %xmm4, %xmm0
+; SSE-NEXT: pxor %xmm2, %xmm0
+; SSE-NEXT: retq
+;
+; AVX2-LABEL: clmul_v8i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2
+; AVX2-NEXT: vpmullw %xmm2, %xmm0, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpxor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpmullw %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpmullw %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpmullw %xmm5, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpmullw %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpmullw %xmm5, %xmm0, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpmullw %xmm5, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpmullw %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpmullw %xmm5, %xmm0, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpmullw %xmm5, %xmm0, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpmullw %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm3, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm2, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmul_v8i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullw %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpxor %xmm2, %xmm3, %xmm2
+; AVX512-NEXT: vpmullw %xmm4, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmullw %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 ^ xmm2 ^ xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullw %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm4 ^ xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullw %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmullw %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 ^ xmm3 ^ xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullw %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm4 ^ xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullw %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmullw %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 ^ xmm3 ^ xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullw %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullw %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm4 ^ xmm2
+; AVX512-NEXT: vpmullw %xmm5, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm1
+; AVX512-NEXT: vpmullw %xmm1, %xmm0, %xmm0
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ xmm3 ^ xmm2
+; AVX512-NEXT: retq
+ %res = call <8 x i16> @llvm.clmul.v8i16(<8 x i16> %a, <8 x i16> %b)
+ ret <8 x i16> %res
+}
+
+define <4 x i32> @clmul_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
+; SSE2-LABEL: clmul_v4i32:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [2,2,2,2]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: pmuludq %xmm3, %xmm2
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm2[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pmuludq %xmm3, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm5, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [4,4,4,4]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm3, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [8,8,8,8]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: pmuludq %xmm6, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1]
+; SSE2-NEXT: pxor %xmm5, %xmm3
+; SSE2-NEXT: pxor %xmm4, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [16,16,16,16]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [32,32,32,32]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm4, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [64,64,64,64]
+; SSE2-NEXT: pand %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pmuludq %xmm5, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
+; SSE2-NEXT: pxor %xmm6, %xmm4
+; SSE2-NEXT: pxor %xmm3, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [128,128,128,128]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm3, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [256,256,256,256]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm3, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [512,512,512,512]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm3, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm6, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [1024,1024,1024,1024]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: pmuludq %xmm6, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1]
+; SSE2-NEXT: pxor %xmm5, %xmm3
+; SSE2-NEXT: pxor %xmm4, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2048,2048,2048,2048]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4096,4096,4096,4096]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm4, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [8192,8192,8192,8192]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm6, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [16384,16384,16384,16384]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm4, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [32768,32768,32768,32768]
+; SSE2-NEXT: pand %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pmuludq %xmm5, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
+; SSE2-NEXT: pxor %xmm6, %xmm4
+; SSE2-NEXT: pxor %xmm3, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [65536,65536,65536,65536]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm3, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [131072,131072,131072,131072]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm3, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [262144,262144,262144,262144]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm3, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm6, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [524288,524288,524288,524288]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm3, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1048576,1048576,1048576,1048576]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm3, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm6, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [2097152,2097152,2097152,2097152]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: pmuludq %xmm6, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm6[0],xmm3[1],xmm6[1]
+; SSE2-NEXT: pxor %xmm5, %xmm3
+; SSE2-NEXT: pxor %xmm4, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4194304,4194304,4194304,4194304]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [8388608,8388608,8388608,8388608]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm4, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [16777216,16777216,16777216,16777216]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm6, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [33554432,33554432,33554432,33554432]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm4, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [67108864,67108864,67108864,67108864]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm6, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [134217728,134217728,134217728,134217728]
+; SSE2-NEXT: pand %xmm1, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm4, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [268435456,268435456,268435456,268435456]
+; SSE2-NEXT: pand %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pmuludq %xmm5, %xmm4
+; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1]
+; SSE2-NEXT: pxor %xmm6, %xmm4
+; SSE2-NEXT: pxor %xmm3, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [536870912,536870912,536870912,536870912]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm3, %xmm5
+; SSE2-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1073741824,1073741824,1073741824,1073741824]
+; SSE2-NEXT: pand %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pmuludq %xmm3, %xmm6
+; SSE2-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1]
+; SSE2-NEXT: pxor %xmm5, %xmm6
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: pmuludq %xmm1, %xmm0
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm2, %xmm1
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; SSE2-NEXT: pxor %xmm6, %xmm0
+; SSE2-NEXT: pxor %xmm4, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmul_v4i32:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [2,2,2,2]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [1,1,1,1]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: pxor %xmm2, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [4,4,4,4]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [8,8,8,8]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm2, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [16,16,16,16]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [32,32,32,32]
+; SSE42-NEXT: pand %xmm1, %xmm5
+; SSE42-NEXT: pmulld %xmm0, %xmm5
+; SSE42-NEXT: pxor %xmm2, %xmm5
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [64,64,64,64]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: pxor %xmm5, %xmm3
+; SSE42-NEXT: pxor %xmm4, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [128,128,128,128]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [256,256,256,256]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm2, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [512,512,512,512]
+; SSE42-NEXT: pand %xmm1, %xmm5
+; SSE42-NEXT: pmulld %xmm0, %xmm5
+; SSE42-NEXT: pxor %xmm4, %xmm5
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [1024,1024,1024,1024]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: pxor %xmm5, %xmm2
+; SSE42-NEXT: pxor %xmm3, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [2048,2048,2048,2048]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [4096,4096,4096,4096]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [8192,8192,8192,8192]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: pxor %xmm4, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [16384,16384,16384,16384]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [32768,32768,32768,32768]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: pxor %xmm4, %xmm3
+; SSE42-NEXT: pxor %xmm2, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [65536,65536,65536,65536]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [131072,131072,131072,131072]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm2, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [262144,262144,262144,262144]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: pxor %xmm4, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [524288,524288,524288,524288]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm2, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1048576,1048576,1048576,1048576]
+; SSE42-NEXT: pand %xmm1, %xmm5
+; SSE42-NEXT: pmulld %xmm0, %xmm5
+; SSE42-NEXT: pxor %xmm4, %xmm5
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [2097152,2097152,2097152,2097152]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: pxor %xmm5, %xmm2
+; SSE42-NEXT: pxor %xmm3, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [4194304,4194304,4194304,4194304]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [8388608,8388608,8388608,8388608]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [16777216,16777216,16777216,16777216]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: pxor %xmm4, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [33554432,33554432,33554432,33554432]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [67108864,67108864,67108864,67108864]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: pxor %xmm4, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [134217728,134217728,134217728,134217728]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm3, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [268435456,268435456,268435456,268435456]
+; SSE42-NEXT: pand %xmm1, %xmm3
+; SSE42-NEXT: pmulld %xmm0, %xmm3
+; SSE42-NEXT: pxor %xmm4, %xmm3
+; SSE42-NEXT: pxor %xmm2, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [536870912,536870912,536870912,536870912]
+; SSE42-NEXT: pand %xmm1, %xmm2
+; SSE42-NEXT: pmulld %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [1073741824,1073741824,1073741824,1073741824]
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: pmulld %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm2, %xmm4
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE42-NEXT: pmulld %xmm1, %xmm0
+; SSE42-NEXT: pxor %xmm4, %xmm0
+; SSE42-NEXT: pxor %xmm3, %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmul_v4i32:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm2 = [2,2,2,2]
+; AVX2-NEXT: vpand %xmm2, %xmm1, %xmm2
+; AVX2-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [1,1,1,1]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpxor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [4,4,4,4]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [8,8,8,8]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [16,16,16,16]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [32,32,32,32]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm5 = [64,64,64,64]
+; AVX2-NEXT: vpand %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [128,128,128,128]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [256,256,256,256]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [512,512,512,512]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm5 = [1024,1024,1024,1024]
+; AVX2-NEXT: vpand %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [2048,2048,2048,2048]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [4096,4096,4096,4096]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [8192,8192,8192,8192]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm5 = [16384,16384,16384,16384]
+; AVX2-NEXT: vpand %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [32768,32768,32768,32768]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [65536,65536,65536,65536]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [131072,131072,131072,131072]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm5 = [262144,262144,262144,262144]
+; AVX2-NEXT: vpand %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [524288,524288,524288,524288]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [1048576,1048576,1048576,1048576]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [2097152,2097152,2097152,2097152]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm3 = [4194304,4194304,4194304,4194304]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [8388608,8388608,8388608,8388608]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [16777216,16777216,16777216,16777216]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [33554432,33554432,33554432,33554432]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm5 = [67108864,67108864,67108864,67108864]
+; AVX2-NEXT: vpand %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [134217728,134217728,134217728,134217728]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [268435456,268435456,268435456,268435456]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [536870912,536870912,536870912,536870912]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm5 = [1073741824,1073741824,1073741824,1073741824]
+; AVX2-NEXT: vpand %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
+; AVX2-NEXT: vpand %xmm4, %xmm1, %xmm1
+; AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm3, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm2, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmul_v4i32:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpxor %xmm2, %xmm3, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm3 = xmm3 ^ xmm2 ^ xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm4 = xmm4 ^ xmm3 ^ xmm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm2 = xmm2 ^ xmm4 ^ xmm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm4 = xmm4 ^ xmm2 ^ xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm2 = xmm2 ^ xmm4 ^ xmm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm4 = xmm4 ^ xmm2 ^ xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm2 = xmm2 ^ xmm4 ^ xmm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm4 = xmm4 ^ xmm2 ^ xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm2 = xmm2 ^ xmm4 ^ xmm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm4 = xmm4 ^ xmm2 ^ xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm2 = xmm2 ^ xmm4 ^ xmm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm4 = xmm4 ^ xmm2 ^ xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm2
+; AVX512-NEXT: vpmulld %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm2 = xmm2 ^ xmm4 ^ xmm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm3
+; AVX512-NEXT: vpmulld %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm4
+; AVX512-NEXT: vpmulld %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm5
+; AVX512-NEXT: vpmulld %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm4 = xmm4 ^ xmm2 ^ xmm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %xmm1, %xmm1
+; AVX512-NEXT: vpmulld %xmm1, %xmm0, %xmm0
+; AVX512-NEXT: vpternlogd {{.*#+}} xmm0 = xmm0 ^ xmm4 ^ xmm5
+; AVX512-NEXT: retq
+ %res = call <4 x i32> @llvm.clmul.v4i32(<4 x i32> %a, <4 x i32> %b)
+ ret <4 x i32> %res
+}
+
+define <2 x i64> @clmul_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
+; SSE-LABEL: clmul_v2i64:
+; SSE: # %bb.0:
+; SSE-NEXT: movdqa %xmm1, %xmm7
+; SSE-NEXT: movdqa %xmm0, %xmm8
+; SSE-NEXT: movdqa %xmm1, %xmm2
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE-NEXT: movdqa %xmm0, %xmm1
+; SSE-NEXT: pmuludq %xmm2, %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm9
+; SSE-NEXT: psrlq $32, %xmm9
+; SSE-NEXT: pmuludq %xmm9, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: por %xmm1, %xmm2
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm1, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm4, %xmm1
+; SSE-NEXT: pxor %xmm2, %xmm1
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm2
+; SSE-NEXT: pmuludq %xmm4, %xmm2
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm2, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm2
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm2, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: por %xmm5, %xmm2
+; SSE-NEXT: pxor %xmm4, %xmm2
+; SSE-NEXT: pxor %xmm1, %xmm2
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm1, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm4, %xmm1
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm4, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm5, %xmm4
+; SSE-NEXT: pxor %xmm1, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm1, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm5, %xmm1
+; SSE-NEXT: pxor %xmm4, %xmm1
+; SSE-NEXT: pxor %xmm2, %xmm1
+; SSE-NEXT: movdqa %xmm7, %xmm2
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm2, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: por %xmm4, %xmm2
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm4, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm5, %xmm4
+; SSE-NEXT: pxor %xmm2, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm5
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE-NEXT: movdqa %xmm0, %xmm2
+; SSE-NEXT: pmuludq %xmm5, %xmm2
+; SSE-NEXT: pmuludq %xmm9, %xmm5
+; SSE-NEXT: psllq $32, %xmm5
+; SSE-NEXT: por %xmm2, %xmm5
+; SSE-NEXT: pxor %xmm4, %xmm5
+; SSE-NEXT: movdqa %xmm7, %xmm2
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm2, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: por %xmm4, %xmm2
+; SSE-NEXT: pxor %xmm5, %xmm2
+; SSE-NEXT: pxor %xmm1, %xmm2
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm1, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm4, %xmm1
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm4, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm5, %xmm4
+; SSE-NEXT: pxor %xmm1, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm1, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm5, %xmm1
+; SSE-NEXT: pxor %xmm4, %xmm1
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm4, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm5, %xmm4
+; SSE-NEXT: pxor %xmm1, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm1, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm5, %xmm1
+; SSE-NEXT: pxor %xmm4, %xmm1
+; SSE-NEXT: pxor %xmm2, %xmm1
+; SSE-NEXT: movdqa %xmm7, %xmm2
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm2, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: por %xmm4, %xmm2
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm4, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm5, %xmm4
+; SSE-NEXT: pxor %xmm2, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm2
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm2, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: por %xmm5, %xmm2
+; SSE-NEXT: pxor %xmm4, %xmm2
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm4, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm5, %xmm4
+; SSE-NEXT: pxor %xmm2, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm5
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE-NEXT: movdqa %xmm0, %xmm2
+; SSE-NEXT: pmuludq %xmm5, %xmm2
+; SSE-NEXT: pmuludq %xmm9, %xmm5
+; SSE-NEXT: psllq $32, %xmm5
+; SSE-NEXT: por %xmm2, %xmm5
+; SSE-NEXT: pxor %xmm4, %xmm5
+; SSE-NEXT: movdqa {{.*#+}} xmm15 = [2097152,2097152]
+; SSE-NEXT: movdqa %xmm7, %xmm2
+; SSE-NEXT: pand %xmm15, %xmm2
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm2, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: por %xmm4, %xmm2
+; SSE-NEXT: pxor %xmm5, %xmm2
+; SSE-NEXT: pxor %xmm1, %xmm2
+; SSE-NEXT: movdqa {{.*#+}} xmm14 = [4194304,4194304]
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand %xmm14, %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm4
+; SSE-NEXT: pmuludq %xmm1, %xmm4
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm4, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm13 = [8388608,8388608]
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand %xmm13, %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm4, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm5, %xmm4
+; SSE-NEXT: pxor %xmm1, %xmm4
+; SSE-NEXT: movdqa {{.*#+}} xmm12 = [16777216,16777216]
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand %xmm12, %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm5
+; SSE-NEXT: pmuludq %xmm1, %xmm5
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm5, %xmm1
+; SSE-NEXT: pxor %xmm4, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm5 = [33554432,33554432]
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand %xmm5, %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm6
+; SSE-NEXT: pmuludq %xmm4, %xmm6
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm6, %xmm4
+; SSE-NEXT: pxor %xmm1, %xmm4
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE-NEXT: movdqa %xmm0, %xmm6
+; SSE-NEXT: pmuludq %xmm1, %xmm6
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm6, %xmm1
+; SSE-NEXT: pxor %xmm4, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm11 = [134217728,134217728]
+; SSE-NEXT: movdqa %xmm7, %xmm4
+; SSE-NEXT: pand %xmm11, %xmm4
+; SSE-NEXT: movdqa %xmm0, %xmm6
+; SSE-NEXT: pmuludq %xmm4, %xmm6
+; SSE-NEXT: pmuludq %xmm9, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: por %xmm6, %xmm4
+; SSE-NEXT: pxor %xmm1, %xmm4
+; SSE-NEXT: movdqa {{.*#+}} xmm6 = [268435456,268435456]
+; SSE-NEXT: movdqa %xmm7, %xmm1
+; SSE-NEXT: pand %xmm6, %xmm1
+; SSE-NEXT: pmuludq %xmm1, %xmm0
+; SSE-NEXT: pmuludq %xmm9, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: por %xmm0, %xmm1
+; SSE-NEXT: pxor %xmm4, %xmm1
+; SSE-NEXT: pxor %xmm2, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm4 = [536870912,536870912]
+; SSE-NEXT: movdqa %xmm7, %xmm0
+; SSE-NEXT: pand %xmm4, %xmm0
+; SSE-NEXT: movdqa %xmm8, %xmm2
+; SSE-NEXT: pmuludq %xmm0, %xmm2
+; SSE-NEXT: pmuludq %xmm9, %xmm0
+; SSE-NEXT: psllq $32, %xmm0
+; SSE-NEXT: por %xmm2, %xmm0
+; SSE-NEXT: movdqa {{.*#+}} xmm2 = [1073741824,1073741824]
+; SSE-NEXT: movdqa %xmm7, %xmm3
+; SSE-NEXT: pand %xmm2, %xmm3
+; SSE-NEXT: movdqa %xmm8, %xmm10
+; SSE-NEXT: pmuludq %xmm3, %xmm10
+; SSE-NEXT: pmuludq %xmm9, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: por %xmm10, %xmm3
+; SSE-NEXT: pxor %xmm0, %xmm3
+; SSE-NEXT: movdqa %xmm7, %xmm0
+; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE-NEXT: movdqa %xmm8, %xmm10
+; SSE-NEXT: pmuludq %xmm0, %xmm10
+; SSE-NEXT: pmuludq %xmm9, %xmm0
+; SSE-NEXT: psllq $32, %xmm0
+; SSE-NEXT: por %xmm10, %xmm0
+; SSE-NEXT: pxor %xmm3, %xmm0
+; SSE-NEXT: psrlq $32, %xmm7
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1,1]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm0, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm0 = [2,2]
+; SSE-NEXT: pand %xmm7, %xmm0
+; SSE-NEXT: pmuludq %xmm8, %xmm0
+; SSE-NEXT: psllq $32, %xmm0
+; SSE-NEXT: pxor %xmm3, %xmm0
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [4,4]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm0, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm0 = [8,8]
+; SSE-NEXT: pand %xmm7, %xmm0
+; SSE-NEXT: pmuludq %xmm8, %xmm0
+; SSE-NEXT: psllq $32, %xmm0
+; SSE-NEXT: pxor %xmm3, %xmm0
+; SSE-NEXT: movdqa %xmm0, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm0 = [16,16]
+; SSE-NEXT: pand %xmm7, %xmm0
+; SSE-NEXT: pmuludq %xmm8, %xmm0
+; SSE-NEXT: psllq $32, %xmm0
+; SSE-NEXT: pxor %xmm3, %xmm0
+; SSE-NEXT: pxor %xmm1, %xmm0
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [32,32]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [64,64]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm1, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [128,128]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: pxor %xmm3, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [256,256]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm1, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [512,512]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: pxor %xmm3, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1024,1024]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm1, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [2048,2048]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: pxor %xmm3, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [4096,4096]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm1, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [8192,8192]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: pxor %xmm3, %xmm1
+; SSE-NEXT: movdqa %xmm1, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [16384,16384]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: pxor %xmm3, %xmm1
+; SSE-NEXT: pxor %xmm0, %xmm1
+; SSE-NEXT: movdqa %xmm1, %xmm0
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [32768,32768]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [65536,65536]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm1, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [131072,131072]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: pxor %xmm3, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [262144,262144]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm1, %xmm3
+; SSE-NEXT: movdqa {{.*#+}} xmm1 = [524288,524288]
+; SSE-NEXT: pand %xmm7, %xmm1
+; SSE-NEXT: pmuludq %xmm8, %xmm1
+; SSE-NEXT: psllq $32, %xmm1
+; SSE-NEXT: pxor %xmm3, %xmm1
+; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1048576,1048576]
+; SSE-NEXT: pand %xmm7, %xmm3
+; SSE-NEXT: pmuludq %xmm8, %xmm3
+; SSE-NEXT: psllq $32, %xmm3
+; SSE-NEXT: pxor %xmm1, %xmm3
+; SSE-NEXT: pand %xmm7, %xmm15
+; SSE-NEXT: pmuludq %xmm8, %xmm15
+; SSE-NEXT: psllq $32, %xmm15
+; SSE-NEXT: pxor %xmm3, %xmm15
+; SSE-NEXT: pand %xmm7, %xmm14
+; SSE-NEXT: pmuludq %xmm8, %xmm14
+; SSE-NEXT: psllq $32, %xmm14
+; SSE-NEXT: pxor %xmm15, %xmm14
+; SSE-NEXT: pand %xmm7, %xmm13
+; SSE-NEXT: pmuludq %xmm8, %xmm13
+; SSE-NEXT: psllq $32, %xmm13
+; SSE-NEXT: pxor %xmm14, %xmm13
+; SSE-NEXT: pand %xmm7, %xmm12
+; SSE-NEXT: pmuludq %xmm8, %xmm12
+; SSE-NEXT: psllq $32, %xmm12
+; SSE-NEXT: pxor %xmm13, %xmm12
+; SSE-NEXT: pand %xmm7, %xmm5
+; SSE-NEXT: pmuludq %xmm8, %xmm5
+; SSE-NEXT: psllq $32, %xmm5
+; SSE-NEXT: pxor %xmm12, %xmm5
+; SSE-NEXT: pxor %xmm0, %xmm5
+; SSE-NEXT: movdqa {{.*#+}} xmm0 = [67108864,67108864]
+; SSE-NEXT: pand %xmm7, %xmm0
+; SSE-NEXT: pmuludq %xmm8, %xmm0
+; SSE-NEXT: psllq $32, %xmm0
+; SSE-NEXT: pand %xmm7, %xmm11
+; SSE-NEXT: pmuludq %xmm8, %xmm11
+; SSE-NEXT: psllq $32, %xmm11
+; SSE-NEXT: pxor %xmm0, %xmm11
+; SSE-NEXT: pand %xmm7, %xmm6
+; SSE-NEXT: pmuludq %xmm8, %xmm6
+; SSE-NEXT: psllq $32, %xmm6
+; SSE-NEXT: pxor %xmm11, %xmm6
+; SSE-NEXT: pand %xmm7, %xmm4
+; SSE-NEXT: pmuludq %xmm8, %xmm4
+; SSE-NEXT: psllq $32, %xmm4
+; SSE-NEXT: pxor %xmm6, %xmm4
+; SSE-NEXT: pand %xmm7, %xmm2
+; SSE-NEXT: pmuludq %xmm8, %xmm2
+; SSE-NEXT: psllq $32, %xmm2
+; SSE-NEXT: pxor %xmm4, %xmm2
+; SSE-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,2147483648]
+; SSE-NEXT: pand %xmm7, %xmm0
+; SSE-NEXT: pmuludq %xmm0, %xmm8
+; SSE-NEXT: psllq $32, %xmm8
+; SSE-NEXT: pxor %xmm2, %xmm8
+; SSE-NEXT: pxor %xmm5, %xmm8
+; SSE-NEXT: movdqa %xmm8, %xmm0
+; SSE-NEXT: retq
+;
+; AVX2-LABEL: clmul_v2i64:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm0, %xmm3
+; AVX2-NEXT: vpsrlq $32, %xmm0, %xmm6
+; AVX2-NEXT: vpmuludq %xmm2, %xmm6, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm15 = [4194304,4194304]
+; AVX2-NEXT: vpand %xmm1, %xmm15, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm14 = [8388608,8388608]
+; AVX2-NEXT: vpand %xmm1, %xmm14, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm13 = [16777216,16777216]
+; AVX2-NEXT: vpand %xmm1, %xmm13, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm12 = [33554432,33554432]
+; AVX2-NEXT: vpand %xmm1, %xmm12, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm11 = [67108864,67108864]
+; AVX2-NEXT: vpand %xmm1, %xmm11, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm10 = [134217728,134217728]
+; AVX2-NEXT: vpand %xmm1, %xmm10, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm9 = [268435456,268435456]
+; AVX2-NEXT: vpand %xmm1, %xmm9, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm5
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm8 = [536870912,536870912]
+; AVX2-NEXT: vpand %xmm1, %xmm8, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm0, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm6, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm4
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm7 = [1073741824,1073741824]
+; AVX2-NEXT: vpand %xmm7, %xmm1, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm0, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm6, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm4, %xmm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm3 = [2147483648,2147483648]
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm6, %xmm6
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm6, %xmm6
+; AVX2-NEXT: vpor %xmm6, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpsrlq $32, %xmm1, %xmm1
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm5, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm6
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm0, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand %xmm1, %xmm15, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand %xmm1, %xmm14, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand %xmm1, %xmm13, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpand %xmm1, %xmm12, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm2, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm6, %xmm2
+; AVX2-NEXT: vpand %xmm1, %xmm11, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm0, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpand %xmm1, %xmm10, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand %xmm1, %xmm9, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand %xmm1, %xmm8, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand %xmm7, %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm0, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm4, %xmm4
+; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm1
+; AVX2-NEXT: vpmuludq %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm4, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm2, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmul_v2i64:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm7
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm6
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vmovdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm5
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm9
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm8
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm11
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm10
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm13
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm12
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm15
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm14
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm17
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm16
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm19
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm18
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm21
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm20
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm23
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm22
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm25
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm24
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm27
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm26
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm29
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm28
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm31
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm30
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm4
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpxor %xmm7, %xmm6, %xmm6
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm7
+; AVX512-NEXT: vpmullq %xmm7, %xmm0, %xmm7
+; AVX512-NEXT: vpternlogq $150, {{[-0-9]+}}(%r{{[sb]}}p), %xmm6, %xmm3 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm3 = xmm3 ^ xmm6 ^ mem
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm6
+; AVX512-NEXT: vpmullq %xmm6, %xmm0, %xmm6
+; AVX512-NEXT: vpternlogq $150, {{[-0-9]+}}(%r{{[sb]}}p), %xmm3, %xmm5 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm5 = xmm5 ^ xmm3 ^ mem
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullq %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm8 = xmm8 ^ xmm5 ^ xmm9
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm5
+; AVX512-NEXT: vpmullq %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm10 = xmm10 ^ xmm8 ^ xmm11
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm8
+; AVX512-NEXT: vpmullq %xmm8, %xmm0, %xmm8
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm12 = xmm12 ^ xmm10 ^ xmm13
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm9
+; AVX512-NEXT: vpmullq %xmm9, %xmm0, %xmm9
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm14 = xmm14 ^ xmm12 ^ xmm15
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm10
+; AVX512-NEXT: vpmullq %xmm10, %xmm0, %xmm10
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm16 = xmm16 ^ xmm14 ^ xmm17
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm11
+; AVX512-NEXT: vpmullq %xmm11, %xmm0, %xmm11
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm18 = xmm18 ^ xmm16 ^ xmm19
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm12
+; AVX512-NEXT: vpmullq %xmm12, %xmm0, %xmm12
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm20 = xmm20 ^ xmm18 ^ xmm21
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm13
+; AVX512-NEXT: vpmullq %xmm13, %xmm0, %xmm13
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm22 = xmm22 ^ xmm20 ^ xmm23
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm14
+; AVX512-NEXT: vpmullq %xmm14, %xmm0, %xmm14
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm24 = xmm24 ^ xmm22 ^ xmm25
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm15
+; AVX512-NEXT: vpmullq %xmm15, %xmm0, %xmm15
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm26 = xmm26 ^ xmm24 ^ xmm27
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm16
+; AVX512-NEXT: vpmullq %xmm16, %xmm0, %xmm16
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm28 = xmm28 ^ xmm26 ^ xmm29
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm17
+; AVX512-NEXT: vpmullq %xmm17, %xmm0, %xmm17
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm30 = xmm30 ^ xmm28 ^ xmm31
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm18
+; AVX512-NEXT: vpmullq %xmm18, %xmm0, %xmm18
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm2 = xmm2 ^ xmm30 ^ xmm4
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm4
+; AVX512-NEXT: vpmullq %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm6 = xmm6 ^ xmm2 ^ xmm7
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm5 = xmm5 ^ xmm6 ^ xmm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullq %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm9 = xmm9 ^ xmm5 ^ xmm8
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm5
+; AVX512-NEXT: vpmullq %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm11 = xmm11 ^ xmm9 ^ xmm10
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm6
+; AVX512-NEXT: vpmullq %xmm6, %xmm0, %xmm6
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm13 = xmm13 ^ xmm11 ^ xmm12
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm7
+; AVX512-NEXT: vpmullq %xmm7, %xmm0, %xmm7
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm15 = xmm15 ^ xmm13 ^ xmm14
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm8
+; AVX512-NEXT: vpmullq %xmm8, %xmm0, %xmm8
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm17 = xmm17 ^ xmm15 ^ xmm16
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm9
+; AVX512-NEXT: vpmullq %xmm9, %xmm0, %xmm9
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 ^ xmm17 ^ xmm18
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm10
+; AVX512-NEXT: vpmullq %xmm10, %xmm0, %xmm10
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm4 ^ xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm6 = xmm6 ^ xmm3 ^ xmm5
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullq %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm8 = xmm8 ^ xmm6 ^ xmm7
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm4
+; AVX512-NEXT: vpmullq %xmm4, %xmm0, %xmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm10 = xmm10 ^ xmm8 ^ xmm9
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm5
+; AVX512-NEXT: vpmullq %xmm5, %xmm0, %xmm5
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm10 ^ xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm5 = xmm5 ^ xmm3 ^ xmm4
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm3
+; AVX512-NEXT: vpmullq %xmm3, %xmm0, %xmm3
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm5 ^ xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm0, %xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm1
+; AVX512-NEXT: vpmullq %xmm1, %xmm0, %xmm0
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ xmm3 ^ xmm2
+; AVX512-NEXT: retq
+ %res = call <2 x i64> @llvm.clmul.v2i64(<2 x i64> %a, <2 x i64> %b)
+ ret <2 x i64> %res
+}
+
+define <16 x i8> @clmulr_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
+; SSE2-LABEL: clmulr_v16i8:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: psllw $4, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE2-NEXT: movdqa %xmm2, %xmm4
+; SSE2-NEXT: pandn %xmm3, %xmm4
+; SSE2-NEXT: psrlw $4, %xmm0
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: psrlw $2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [51,51,51,51,51,51,51,51,51,51,51,51,51,51,51,51]
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: psrlw $1, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85]
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddb %xmm0, %xmm0
+; SSE2-NEXT: por %xmm5, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: movdqa %xmm1, %xmm7
+; SSE2-NEXT: psllw $4, %xmm7
+; SSE2-NEXT: movdqa %xmm2, %xmm5
+; SSE2-NEXT: pandn %xmm7, %xmm5
+; SSE2-NEXT: psrlw $4, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: psllw $2, %xmm5
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $1, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: paddb %xmm5, %xmm5
+; SSE2-NEXT: por %xmm5, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm9, %xmm8
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm8 = xmm8[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [255,255,255,255,255,255,255,255]
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm9 = xmm9[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pand %xmm7, %xmm9
+; SSE2-NEXT: packuswb %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm8, %xmm10
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm10 = xmm10[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm8 = xmm8[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: packuswb %xmm10, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; SSE2-NEXT: pand %xmm5, %xmm10
+; SSE2-NEXT: movdqa %xmm10, %xmm11
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm11 = xmm11[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm11
+; SSE2-NEXT: pand %xmm7, %xmm11
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: packuswb %xmm11, %xmm10
+; SSE2-NEXT: pxor %xmm8, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: movdqa %xmm8, %xmm11
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm11 = xmm11[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm11
+; SSE2-NEXT: pand %xmm7, %xmm11
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm8 = xmm8[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: packuswb %xmm11, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; SSE2-NEXT: pand %xmm1, %xmm10
+; SSE2-NEXT: movdqa %xmm10, %xmm9
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm9 = xmm9[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm9
+; SSE2-NEXT: pand %xmm7, %xmm9
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: packuswb %xmm9, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]
+; SSE2-NEXT: pand %xmm5, %xmm9
+; SSE2-NEXT: movdqa %xmm9, %xmm11
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm11 = xmm11[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm11
+; SSE2-NEXT: pand %xmm7, %xmm11
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm9 = xmm9[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pand %xmm7, %xmm9
+; SSE2-NEXT: packuswb %xmm11, %xmm9
+; SSE2-NEXT: pxor %xmm10, %xmm9
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm10
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm10 = xmm10[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm1
+; SSE2-NEXT: pand %xmm7, %xmm1
+; SSE2-NEXT: packuswb %xmm10, %xmm1
+; SSE2-NEXT: pxor %xmm9, %xmm1
+; SSE2-NEXT: pxor %xmm8, %xmm1
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm8
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm8 = xmm8[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm5, %xmm0
+; SSE2-NEXT: pand %xmm7, %xmm0
+; SSE2-NEXT: packuswb %xmm8, %xmm0
+; SSE2-NEXT: pxor %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psllw $4, %xmm1
+; SSE2-NEXT: psrlw $4, %xmm0
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: pandn %xmm1, %xmm2
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $1, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddb %xmm0, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmulr_v16i8:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: pand %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: movdqa %xmm3, %xmm6
+; SSE42-NEXT: pshufb %xmm0, %xmm6
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pshufb %xmm2, %xmm5
+; SSE42-NEXT: por %xmm6, %xmm5
+; SSE42-NEXT: movdqa %xmm1, %xmm2
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa %xmm0, %xmm6
+; SSE42-NEXT: pshufb %xmm2, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmullw %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: movdqa %xmm2, %xmm9
+; SSE42-NEXT: pandn %xmm7, %xmm9
+; SSE42-NEXT: movdqa %xmm5, %xmm10
+; SSE42-NEXT: pmaddubsw %xmm9, %xmm10
+; SSE42-NEXT: psllw $8, %xmm10
+; SSE42-NEXT: por %xmm8, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmullw %xmm7, %xmm8
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: movdqa %xmm2, %xmm9
+; SSE42-NEXT: pandn %xmm7, %xmm9
+; SSE42-NEXT: movdqa %xmm5, %xmm7
+; SSE42-NEXT: pmaddubsw %xmm9, %xmm7
+; SSE42-NEXT: psllw $8, %xmm7
+; SSE42-NEXT: por %xmm8, %xmm7
+; SSE42-NEXT: pxor %xmm10, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm8, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm8, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm8
+; SSE42-NEXT: psllw $8, %xmm8
+; SSE42-NEXT: por %xmm9, %xmm8
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm6, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm6, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm6
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm6
+; SSE42-NEXT: psllw $8, %xmm6
+; SSE42-NEXT: por %xmm9, %xmm6
+; SSE42-NEXT: pxor %xmm8, %xmm6
+; SSE42-NEXT: pxor %xmm7, %xmm6
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: movdqa %xmm3, %xmm7
+; SSE42-NEXT: pshufb %xmm1, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; SSE42-NEXT: pand %xmm7, %xmm1
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmullw %xmm1, %xmm8
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: movdqa %xmm2, %xmm9
+; SSE42-NEXT: pandn %xmm1, %xmm9
+; SSE42-NEXT: movdqa %xmm5, %xmm1
+; SSE42-NEXT: pmaddubsw %xmm9, %xmm1
+; SSE42-NEXT: psllw $8, %xmm1
+; SSE42-NEXT: por %xmm8, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]
+; SSE42-NEXT: pand %xmm7, %xmm8
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm8, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm8, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm8
+; SSE42-NEXT: psllw $8, %xmm8
+; SSE42-NEXT: por %xmm9, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; SSE42-NEXT: pand %xmm7, %xmm1
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm1, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm1, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm1
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm1
+; SSE42-NEXT: psllw $8, %xmm1
+; SSE42-NEXT: por %xmm9, %xmm1
+; SSE42-NEXT: pxor %xmm8, %xmm1
+; SSE42-NEXT: pxor %xmm6, %xmm1
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE42-NEXT: movdqa %xmm5, %xmm6
+; SSE42-NEXT: pmullw %xmm7, %xmm6
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pandn %xmm7, %xmm2
+; SSE42-NEXT: pmaddubsw %xmm2, %xmm5
+; SSE42-NEXT: psllw $8, %xmm5
+; SSE42-NEXT: por %xmm6, %xmm5
+; SSE42-NEXT: pxor %xmm1, %xmm5
+; SSE42-NEXT: movdqa %xmm5, %xmm1
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: pshufb %xmm1, %xmm3
+; SSE42-NEXT: psrlw $4, %xmm5
+; SSE42-NEXT: pand %xmm4, %xmm5
+; SSE42-NEXT: pshufb %xmm5, %xmm0
+; SSE42-NEXT: por %xmm3, %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmulr_v16i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm3
+; AVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX2-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm2, %ymm0
+; AVX2-NEXT: vpsrlw $7, %ymm0, %ymm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulr_v16i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm1
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmullw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpsrlw $7, %ymm0, %ymm0
+; AVX512-NEXT: vpmovwb %ymm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %a.ext = zext <16 x i8> %a to <16 x i16>
+ %b.ext = zext <16 x i8> %b to <16 x i16>
+ %clmul = call <16 x i16> @llvm.clmul.v16i16(<16 x i16> %a.ext, <16 x i16> %b.ext)
+ %res.ext = lshr <16 x i16> %clmul, splat (i16 7)
+ %res = trunc <16 x i16> %res.ext to <16 x i8>
+ ret <16 x i8> %res
+}
+
+define <8 x i16> @clmulr_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
+; SSE2-LABEL: clmulr_v8i16:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrlw $8, %xmm2
+; SSE2-NEXT: psllw $8, %xmm0
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: psrlw $4, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [3855,3855,3855,3855,3855,3855,3855,3855]
+; SSE2-NEXT: pand %xmm2, %xmm3
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psllw $4, %xmm0
+; SSE2-NEXT: por %xmm3, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: psrlw $2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [13107,13107,13107,13107,13107,13107,13107,13107]
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: psrlw $1, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [21845,21845,21845,21845,21845,21845,21845,21845]
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddw %xmm0, %xmm0
+; SSE2-NEXT: por %xmm5, %xmm0
+; SSE2-NEXT: movdqa %xmm1, %xmm5
+; SSE2-NEXT: psrlw $8, %xmm5
+; SSE2-NEXT: psllw $8, %xmm1
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $4, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm5
+; SSE2-NEXT: psllw $4, %xmm5
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: psllw $2, %xmm5
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: paddw %xmm1, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [2,2,2,2,2,2,2,2]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: psrlw $1, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [1,1,1,1,1,1,1,1]
+; SSE2-NEXT: pand %xmm5, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [4,4,4,4,4,4,4,4]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pxor %xmm7, %xmm8
+; SSE2-NEXT: pxor %xmm6, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [8,8,8,8,8,8,8,8]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [16,16,16,16,16,16,16,16]
+; SSE2-NEXT: pand %xmm5, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: pxor %xmm6, %xmm7
+; SSE2-NEXT: pxor %xmm8, %xmm7
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [32,32,32,32,32,32,32,32]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [64,64,64,64,64,64,64,64]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pxor %xmm6, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [128,128,128,128,128,128,128,128]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: pxor %xmm8, %xmm6
+; SSE2-NEXT: pxor %xmm7, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [256,256,256,256,256,256,256,256]
+; SSE2-NEXT: pand %xmm5, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512,512,512,512,512]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pxor %xmm7, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [1024,1024,1024,1024,1024,1024,1024,1024]
+; SSE2-NEXT: pand %xmm5, %xmm9
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2048,2048,2048,2048,2048,2048,2048,2048]
+; SSE2-NEXT: pand %xmm1, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: pxor %xmm9, %xmm7
+; SSE2-NEXT: pxor %xmm6, %xmm7
+; SSE2-NEXT: psllw $8, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [4096,4096,4096,4096,4096,4096,4096,4096]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [8192,8192,8192,8192,8192,8192,8192,8192]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: pmullw %xmm0, %xmm5
+; SSE2-NEXT: pxor %xmm9, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: pmullw %xmm1, %xmm0
+; SSE2-NEXT: pxor %xmm5, %xmm0
+; SSE2-NEXT: pxor %xmm7, %xmm0
+; SSE2-NEXT: psrlw $8, %xmm0
+; SSE2-NEXT: por %xmm6, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $4, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psllw $4, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $1, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddw %xmm0, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmulr_v8i16:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
+; SSE42-NEXT: pshufb %xmm6, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: movdqa %xmm2, %xmm0
+; SSE42-NEXT: pand %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: movdqa %xmm3, %xmm7
+; SSE42-NEXT: pshufb %xmm0, %xmm7
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pshufb %xmm2, %xmm5
+; SSE42-NEXT: por %xmm7, %xmm5
+; SSE42-NEXT: pshufb %xmm6, %xmm1
+; SSE42-NEXT: movdqa %xmm1, %xmm6
+; SSE42-NEXT: psrlw $4, %xmm6
+; SSE42-NEXT: pand %xmm4, %xmm6
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: pshufb %xmm6, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [2,2,2,2,2,2,2,2]
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pmullw %xmm5, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [1,1,1,1,1,1,1,1]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm6, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [4,4,4,4,4,4,4,4]
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pmullw %xmm5, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [8,8,8,8,8,8,8,8]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm6, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: movdqa %xmm3, %xmm6
+; SSE42-NEXT: pshufb %xmm1, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
+; SSE42-NEXT: pand %xmm6, %xmm1
+; SSE42-NEXT: pmullw %xmm5, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [32,32,32,32,32,32,32,32]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [64,64,64,64,64,64,64,64]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmullw %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [128,128,128,128,128,128,128,128]
+; SSE42-NEXT: pand %xmm6, %xmm1
+; SSE42-NEXT: pmullw %xmm5, %xmm1
+; SSE42-NEXT: pxor %xmm9, %xmm1
+; SSE42-NEXT: pxor %xmm7, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [256,256,256,256,256,256,256,256]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512,512,512,512,512]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [1024,1024,1024,1024,1024,1024,1024,1024]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm2
+; SSE42-NEXT: pxor %xmm7, %xmm2
+; SSE42-NEXT: pxor %xmm1, %xmm2
+; SSE42-NEXT: psllw $8, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [4096,4096,4096,4096,4096,4096,4096,4096]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [8192,8192,8192,8192,8192,8192,8192,8192]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [16384,16384,16384,16384,16384,16384,16384,16384]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE42-NEXT: pmullw %xmm5, %xmm6
+; SSE42-NEXT: pxor %xmm7, %xmm6
+; SSE42-NEXT: pxor %xmm2, %xmm6
+; SSE42-NEXT: psrlw $8, %xmm6
+; SSE42-NEXT: por %xmm1, %xmm6
+; SSE42-NEXT: movdqa %xmm6, %xmm1
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: pshufb %xmm1, %xmm3
+; SSE42-NEXT: psrlw $4, %xmm6
+; SSE42-NEXT: pand %xmm4, %xmm6
+; SSE42-NEXT: pshufb %xmm6, %xmm0
+; SSE42-NEXT: por %xmm3, %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmulr_v8i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [2,2,2,2,2,2,2,2]
+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm2
+; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX2-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [4,4,4,4,4,4,4,4]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [32,32,32,32,32,32,32,32]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm5 = [64,64,64,64,64,64,64,64]
+; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm5
+; AVX2-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm5, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [128,128,128,128,128,128,128,128]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [256,256,256,256,256,256,256,256]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [512,512,512,512,512,512,512,512]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm5 = [1024,1024,1024,1024,1024,1024,1024,1024]
+; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm5
+; AVX2-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm5, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [2048,2048,2048,2048,2048,2048,2048,2048]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [4096,4096,4096,4096,4096,4096,4096,4096]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [8192,8192,8192,8192,8192,8192,8192,8192]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm5 = [16384,16384,16384,16384,16384,16384,16384,16384]
+; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm5
+; AVX2-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm5, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [32768,32768,32768,32768,32768,32768,32768,32768]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm1
+; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm3, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm2, %ymm0
+; AVX2-NEXT: vpsrld $15, %ymm0, %ymm0
+; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u]
+; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
+; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulr_v8i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm5
+; AVX512-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm2 = ymm2 ^ ymm4 ^ ymm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm5
+; AVX512-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm2 = ymm2 ^ ymm4 ^ ymm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm5
+; AVX512-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm2 = ymm2 ^ ymm4 ^ ymm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm1
+; AVX512-NEXT: vpmulld %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm0 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpsrld $15, %ymm0, %ymm0
+; AVX512-NEXT: vpmovdw %ymm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %a.ext = zext <8 x i16> %a to <8 x i32>
+ %b.ext = zext <8 x i16> %b to <8 x i32>
+ %clmul = call <8 x i32> @llvm.clmul.v8i32(<8 x i32> %a.ext, <8 x i32> %b.ext)
+ %res.ext = lshr <8 x i32> %clmul, splat (i32 15)
+ %res = trunc <8 x i32> %res.ext to <8 x i16>
+ ret <8 x i16> %res
+}
+
+define <4 x i32> @clmulr_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
+; SSE2-LABEL: clmulr_v4i32:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrld $24, %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: pslld $8, %xmm3
+; SSE2-NEXT: por %xmm2, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [16711935,16711935,16711935,16711935]
+; SSE2-NEXT: pand %xmm2, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pand %xmm2, %xmm4
+; SSE2-NEXT: psrld $8, %xmm4
+; SSE2-NEXT: pslld $24, %xmm0
+; SSE2-NEXT: por %xmm3, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: psrld $4, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [252645135,252645135,252645135,252645135]
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: pslld $4, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: psrld $2, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [858993459,858993459,858993459,858993459]
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: pslld $2, %xmm0
+; SSE2-NEXT: por %xmm5, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: psrld $1, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [1431655765,1431655765,1431655765,1431655765]
+; SSE2-NEXT: pand %xmm5, %xmm6
+; SSE2-NEXT: pand %xmm5, %xmm0
+; SSE2-NEXT: paddd %xmm0, %xmm0
+; SSE2-NEXT: por %xmm6, %xmm0
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: psrld $24, %xmm6
+; SSE2-NEXT: movdqa %xmm1, %xmm7
+; SSE2-NEXT: pslld $8, %xmm7
+; SSE2-NEXT: por %xmm6, %xmm7
+; SSE2-NEXT: pand %xmm2, %xmm7
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: pand %xmm2, %xmm6
+; SSE2-NEXT: psrld $8, %xmm6
+; SSE2-NEXT: pslld $24, %xmm1
+; SSE2-NEXT: por %xmm7, %xmm1
+; SSE2-NEXT: por %xmm6, %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: psrld $4, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pslld $4, %xmm1
+; SSE2-NEXT: por %xmm6, %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: psrld $2, %xmm6
+; SSE2-NEXT: pand %xmm4, %xmm6
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pslld $2, %xmm1
+; SSE2-NEXT: por %xmm6, %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: pand %xmm5, %xmm6
+; SSE2-NEXT: paddd %xmm6, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [2,2,2,2]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm9, %xmm7
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm0[1,1,3,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1]
+; SSE2-NEXT: psrld $1, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [1,1,1,1]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [4,4,4,4]
+; SSE2-NEXT: pand %xmm1, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm11, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm11[0],xmm9[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [8,8,8,8]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [16,16,16,16]
+; SSE2-NEXT: pand %xmm1, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm11, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm11[0],xmm8[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [32,32,32,32]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [64,64,64,64]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [128,128,128,128]
+; SSE2-NEXT: pand %xmm6, %xmm10
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm10, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1]
+; SSE2-NEXT: pxor %xmm11, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [256,256,256,256]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm8, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1024,1024,1024,1024]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [2048,2048,2048,2048]
+; SSE2-NEXT: pand %xmm6, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm11, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm11[0],xmm8[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [4096,4096,4096,4096]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [8192,8192,8192,8192]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [16384,16384,16384,16384]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [32768,32768,32768,32768]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [65536,65536,65536,65536]
+; SSE2-NEXT: pand %xmm1, %xmm10
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm10, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1]
+; SSE2-NEXT: pxor %xmm11, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [131072,131072,131072,131072]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [262144,262144,262144,262144]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm8, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [524288,524288,524288,524288]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1048576,1048576,1048576,1048576]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm8, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [2097152,2097152,2097152,2097152]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [4194304,4194304,4194304,4194304]
+; SSE2-NEXT: pand %xmm1, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm11, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm11[0],xmm8[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [8388608,8388608,8388608,8388608]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [16777216,16777216,16777216,16777216]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [33554432,33554432,33554432,33554432]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [67108864,67108864,67108864,67108864]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [134217728,134217728,134217728,134217728]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [268435456,268435456,268435456,268435456]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [536870912,536870912,536870912,536870912]
+; SSE2-NEXT: pand %xmm6, %xmm10
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm10, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1]
+; SSE2-NEXT: pxor %xmm11, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm1, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm1
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm1[0],xmm8[1],xmm1[1]
+; SSE2-NEXT: pmuludq %xmm6, %xmm0
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm1
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; SSE2-NEXT: pxor %xmm8, %xmm0
+; SSE2-NEXT: pxor %xmm9, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $24, %xmm1
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pslld $8, %xmm6
+; SSE2-NEXT: por %xmm1, %xmm6
+; SSE2-NEXT: pand %xmm2, %xmm6
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: pslld $24, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psrld $8, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: por %xmm6, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $4, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: pslld $4, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $2, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: pslld $2, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $1, %xmm1
+; SSE2-NEXT: pand %xmm5, %xmm1
+; SSE2-NEXT: pand %xmm5, %xmm0
+; SSE2-NEXT: paddd %xmm0, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmulr_v4i32:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
+; SSE42-NEXT: pshufb %xmm6, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: movdqa %xmm2, %xmm0
+; SSE42-NEXT: pand %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: movdqa %xmm3, %xmm7
+; SSE42-NEXT: pshufb %xmm0, %xmm7
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pshufb %xmm2, %xmm5
+; SSE42-NEXT: por %xmm7, %xmm5
+; SSE42-NEXT: pshufb %xmm6, %xmm1
+; SSE42-NEXT: movdqa %xmm1, %xmm2
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa %xmm0, %xmm6
+; SSE42-NEXT: pshufb %xmm2, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [2,2,2,2]
+; SSE42-NEXT: pand %xmm6, %xmm2
+; SSE42-NEXT: pmulld %xmm5, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [1,1,1,1]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm2, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [4,4,4,4]
+; SSE42-NEXT: pand %xmm6, %xmm2
+; SSE42-NEXT: pmulld %xmm5, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [8,8,8,8]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm2, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: movdqa %xmm3, %xmm2
+; SSE42-NEXT: pshufb %xmm1, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16]
+; SSE42-NEXT: pand %xmm2, %xmm1
+; SSE42-NEXT: pmulld %xmm5, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [32,32,32,32]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [64,64,64,64]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [128,128,128,128]
+; SSE42-NEXT: pand %xmm2, %xmm1
+; SSE42-NEXT: pmulld %xmm5, %xmm1
+; SSE42-NEXT: pxor %xmm9, %xmm1
+; SSE42-NEXT: pxor %xmm7, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [256,256,256,256]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [1024,1024,1024,1024]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [2048,2048,2048,2048]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [4096,4096,4096,4096]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [8192,8192,8192,8192]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm7, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [16384,16384,16384,16384]
+; SSE42-NEXT: pand %xmm2, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [32768,32768,32768,32768]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm10, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [65536,65536,65536,65536]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [131072,131072,131072,131072]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [262144,262144,262144,262144]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm9, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [524288,524288,524288,524288]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [1048576,1048576,1048576,1048576]
+; SSE42-NEXT: pand %xmm2, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [2097152,2097152,2097152,2097152]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm10, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [4194304,4194304,4194304,4194304]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [8388608,8388608,8388608,8388608]
+; SSE42-NEXT: pand %xmm2, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [16777216,16777216,16777216,16777216]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm10, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [33554432,33554432,33554432,33554432]
+; SSE42-NEXT: pand %xmm6, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [67108864,67108864,67108864,67108864]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm10, %xmm9
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE42-NEXT: pmulld %xmm5, %xmm6
+; SSE42-NEXT: pxor %xmm9, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [268435456,268435456,268435456,268435456]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm6, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [536870912,536870912,536870912,536870912]
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pmulld %xmm5, %xmm6
+; SSE42-NEXT: pxor %xmm9, %xmm6
+; SSE42-NEXT: pxor %xmm8, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [1073741824,1073741824,1073741824,1073741824]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE42-NEXT: pmulld %xmm5, %xmm2
+; SSE42-NEXT: pxor %xmm8, %xmm2
+; SSE42-NEXT: pxor %xmm6, %xmm2
+; SSE42-NEXT: movdqa %xmm2, %xmm5
+; SSE42-NEXT: pshufb {{.*#+}} xmm5 = zero,xmm5[2],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[10],zero,zero,zero,xmm5[14],zero,zero
+; SSE42-NEXT: pslld $24, %xmm1
+; SSE42-NEXT: por %xmm1, %xmm5
+; SSE42-NEXT: pslld $8, %xmm7
+; SSE42-NEXT: psrld $24, %xmm2
+; SSE42-NEXT: por %xmm7, %xmm2
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE42-NEXT: por %xmm5, %xmm2
+; SSE42-NEXT: movdqa %xmm2, %xmm1
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: pshufb %xmm1, %xmm3
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: pshufb %xmm2, %xmm0
+; SSE42-NEXT: por %xmm3, %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmulr_v4i32:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [2,2,2,2]
+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm2
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [1,1,1,1]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [4,4,4,4]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [8,8,8,8]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [16,16,16,16]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [32,32,32,32]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [64,64,64,64]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [128,128,128,128]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [256,256,256,256]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [512,512,512,512]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1024,1024,1024,1024]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [2048,2048,2048,2048]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [4096,4096,4096,4096]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [8192,8192,8192,8192]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [16384,16384,16384,16384]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [32768,32768,32768,32768]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [65536,65536,65536,65536]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [131072,131072,131072,131072]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [262144,262144,262144,262144]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [524288,524288,524288,524288]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1048576,1048576,1048576,1048576]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [2097152,2097152,2097152,2097152]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [4194304,4194304,4194304,4194304]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [8388608,8388608,8388608,8388608]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [16777216,16777216,16777216,16777216]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [33554432,33554432,33554432,33554432]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [67108864,67108864,67108864,67108864]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [134217728,134217728,134217728,134217728]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [268435456,268435456,268435456,268435456]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [536870912,536870912,536870912,536870912]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1073741824,1073741824,1073741824,1073741824]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [2147483648,2147483648,2147483648,2147483648]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm1
+; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm3, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm2, %ymm0
+; AVX2-NEXT: vpsrlq $31, %ymm0, %ymm0
+; AVX2-NEXT: vbroadcasti128 {{.*#+}} ymm1 = [0,2,4,6,0,2,4,6]
+; AVX2-NEXT: # ymm1 = mem[0,1,0,1]
+; AVX2-NEXT: vpermd %ymm0, %ymm1, %ymm0
+; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulr_v4i32:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX512-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpmuludq %ymm5, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpmuludq %ymm5, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm1
+; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpsrlq $31, %ymm0, %ymm0
+; AVX512-NEXT: vpmovqd %ymm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %a.ext = zext <4 x i32> %a to <4 x i64>
+ %b.ext = zext <4 x i32> %b to <4 x i64>
+ %clmul = call <4 x i64> @llvm.clmul.v4i64(<4 x i64> %a.ext, <4 x i64> %b.ext)
+ %res.ext = lshr <4 x i64> %clmul, splat (i64 31)
+ %res = trunc <4 x i64> %res.ext to <4 x i32>
+ ret <4 x i32> %res
+}
+
+define <16 x i8> @clmulh_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
+; SSE2-LABEL: clmulh_v16i8:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: psllw $4, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE2-NEXT: movdqa %xmm2, %xmm4
+; SSE2-NEXT: pandn %xmm3, %xmm4
+; SSE2-NEXT: psrlw $4, %xmm0
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: psrlw $2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [51,51,51,51,51,51,51,51,51,51,51,51,51,51,51,51]
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: psrlw $1, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [85,85,85,85,85,85,85,85,85,85,85,85,85,85,85,85]
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddb %xmm0, %xmm0
+; SSE2-NEXT: por %xmm5, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm6 = xmm6[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: movdqa %xmm1, %xmm7
+; SSE2-NEXT: psllw $4, %xmm7
+; SSE2-NEXT: movdqa %xmm2, %xmm5
+; SSE2-NEXT: pandn %xmm7, %xmm5
+; SSE2-NEXT: psrlw $4, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: psllw $2, %xmm5
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $1, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: paddb %xmm5, %xmm5
+; SSE2-NEXT: por %xmm5, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm9, %xmm8
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm8 = xmm8[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [255,255,255,255,255,255,255,255]
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm9 = xmm9[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pand %xmm7, %xmm9
+; SSE2-NEXT: packuswb %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm8, %xmm10
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm10 = xmm10[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm8 = xmm8[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: packuswb %xmm10, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; SSE2-NEXT: pand %xmm5, %xmm10
+; SSE2-NEXT: movdqa %xmm10, %xmm11
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm11 = xmm11[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm11
+; SSE2-NEXT: pand %xmm7, %xmm11
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: packuswb %xmm11, %xmm10
+; SSE2-NEXT: pxor %xmm8, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: movdqa %xmm8, %xmm11
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm11 = xmm11[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm11
+; SSE2-NEXT: pand %xmm7, %xmm11
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm8 = xmm8[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: packuswb %xmm11, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm9, %xmm10
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm10 = xmm10[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm9 = xmm9[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pand %xmm7, %xmm9
+; SSE2-NEXT: packuswb %xmm10, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]
+; SSE2-NEXT: pand %xmm5, %xmm10
+; SSE2-NEXT: movdqa %xmm10, %xmm11
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm11 = xmm11[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm11
+; SSE2-NEXT: pand %xmm7, %xmm11
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm10 = xmm10[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm10
+; SSE2-NEXT: pand %xmm7, %xmm10
+; SSE2-NEXT: packuswb %xmm11, %xmm10
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: pxor %xmm9, %xmm10
+; SSE2-NEXT: movdqa %xmm1, %xmm9
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm9 = xmm9[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm9
+; SSE2-NEXT: pand %xmm7, %xmm9
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm0, %xmm1
+; SSE2-NEXT: pand %xmm7, %xmm1
+; SSE2-NEXT: packuswb %xmm9, %xmm1
+; SSE2-NEXT: pxor %xmm10, %xmm1
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: pxor %xmm8, %xmm1
+; SSE2-NEXT: movdqa %xmm5, %xmm8
+; SSE2-NEXT: punpckhbw {{.*#+}} xmm8 = xmm8[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
+; SSE2-NEXT: pmullw %xmm6, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
+; SSE2-NEXT: pmullw %xmm5, %xmm0
+; SSE2-NEXT: pand %xmm7, %xmm0
+; SSE2-NEXT: packuswb %xmm8, %xmm0
+; SSE2-NEXT: pxor %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psllw $4, %xmm1
+; SSE2-NEXT: psrlw $4, %xmm0
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: pandn %xmm1, %xmm2
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $1, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddb %xmm0, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: psrlw $1, %xmm0
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmulh_v16i8:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: pand %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: movdqa %xmm3, %xmm6
+; SSE42-NEXT: pshufb %xmm0, %xmm6
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pshufb %xmm2, %xmm5
+; SSE42-NEXT: por %xmm6, %xmm5
+; SSE42-NEXT: movdqa %xmm1, %xmm2
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa %xmm0, %xmm6
+; SSE42-NEXT: pshufb %xmm2, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmullw %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: movdqa %xmm2, %xmm9
+; SSE42-NEXT: pandn %xmm7, %xmm9
+; SSE42-NEXT: movdqa %xmm5, %xmm10
+; SSE42-NEXT: pmaddubsw %xmm9, %xmm10
+; SSE42-NEXT: psllw $8, %xmm10
+; SSE42-NEXT: por %xmm8, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmullw %xmm7, %xmm8
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: movdqa %xmm2, %xmm9
+; SSE42-NEXT: pandn %xmm7, %xmm9
+; SSE42-NEXT: movdqa %xmm5, %xmm7
+; SSE42-NEXT: pmaddubsw %xmm9, %xmm7
+; SSE42-NEXT: psllw $8, %xmm7
+; SSE42-NEXT: por %xmm8, %xmm7
+; SSE42-NEXT: pxor %xmm10, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [4,4,4,4,4,4,4,4,4,4,4,4,4,4,4,4]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm8, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm8, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm8
+; SSE42-NEXT: psllw $8, %xmm8
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE42-NEXT: por %xmm9, %xmm8
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm6, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm6, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm6
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm6
+; SSE42-NEXT: psllw $8, %xmm6
+; SSE42-NEXT: por %xmm9, %xmm6
+; SSE42-NEXT: pxor %xmm8, %xmm6
+; SSE42-NEXT: pxor %xmm7, %xmm6
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: movdqa %xmm3, %xmm7
+; SSE42-NEXT: pshufb %xmm1, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
+; SSE42-NEXT: pand %xmm7, %xmm1
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmullw %xmm1, %xmm8
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: movdqa %xmm2, %xmm9
+; SSE42-NEXT: pandn %xmm1, %xmm9
+; SSE42-NEXT: movdqa %xmm5, %xmm1
+; SSE42-NEXT: pmaddubsw %xmm9, %xmm1
+; SSE42-NEXT: psllw $8, %xmm1
+; SSE42-NEXT: por %xmm8, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [32,32,32,32,32,32,32,32,32,32,32,32,32,32,32,32]
+; SSE42-NEXT: pand %xmm7, %xmm8
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm8, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm8, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm8
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm8
+; SSE42-NEXT: psllw $8, %xmm8
+; SSE42-NEXT: por %xmm9, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64]
+; SSE42-NEXT: pand %xmm7, %xmm1
+; SSE42-NEXT: movdqa %xmm5, %xmm9
+; SSE42-NEXT: pmullw %xmm1, %xmm9
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: movdqa %xmm2, %xmm10
+; SSE42-NEXT: pandn %xmm1, %xmm10
+; SSE42-NEXT: movdqa %xmm5, %xmm1
+; SSE42-NEXT: pmaddubsw %xmm10, %xmm1
+; SSE42-NEXT: psllw $8, %xmm1
+; SSE42-NEXT: por %xmm9, %xmm1
+; SSE42-NEXT: pxor %xmm8, %xmm1
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE42-NEXT: pxor %xmm6, %xmm1
+; SSE42-NEXT: movdqa %xmm5, %xmm6
+; SSE42-NEXT: pmullw %xmm7, %xmm6
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pandn %xmm7, %xmm2
+; SSE42-NEXT: pmaddubsw %xmm2, %xmm5
+; SSE42-NEXT: psllw $8, %xmm5
+; SSE42-NEXT: por %xmm6, %xmm5
+; SSE42-NEXT: pxor %xmm1, %xmm5
+; SSE42-NEXT: movdqa %xmm5, %xmm1
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: pshufb %xmm1, %xmm3
+; SSE42-NEXT: psrlw $4, %xmm5
+; SSE42-NEXT: pand %xmm4, %xmm5
+; SSE42-NEXT: pshufb %xmm5, %xmm0
+; SSE42-NEXT: por %xmm3, %xmm0
+; SSE42-NEXT: psrlw $1, %xmm0
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmulh_v16i8:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
+; AVX2-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm2
+; AVX2-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm3
+; AVX2-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm3
+; AVX2-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm3
+; AVX2-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm4
+; AVX2-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm1, %ymm1
+; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm2, %ymm0
+; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulh_v16i8:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero,xmm1[8],zero,xmm1[9],zero,xmm1[10],zero,xmm1[11],zero,xmm1[12],zero,xmm1[13],zero,xmm1[14],zero,xmm1[15],zero
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmullw %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmullw %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm1
+; AVX512-NEXT: vpmullw %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmullw %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpsrlw $8, %ymm0, %ymm0
+; AVX512-NEXT: vpmovwb %ymm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %a.ext = zext <16 x i8> %a to <16 x i16>
+ %b.ext = zext <16 x i8> %b to <16 x i16>
+ %clmul = call <16 x i16> @llvm.clmul.v16i16(<16 x i16> %a.ext, <16 x i16> %b.ext)
+ %res.ext = lshr <16 x i16> %clmul, splat (i16 8)
+ %res = trunc <16 x i16> %res.ext to <16 x i8>
+ ret <16 x i8> %res
+}
+
+define <8 x i16> @clmulh_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
+; SSE2-LABEL: clmulh_v8i16:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrlw $8, %xmm2
+; SSE2-NEXT: psllw $8, %xmm0
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: psrlw $4, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [3855,3855,3855,3855,3855,3855,3855,3855]
+; SSE2-NEXT: pand %xmm2, %xmm3
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psllw $4, %xmm0
+; SSE2-NEXT: por %xmm3, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: psrlw $2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [13107,13107,13107,13107,13107,13107,13107,13107]
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: psrlw $1, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [21845,21845,21845,21845,21845,21845,21845,21845]
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddw %xmm0, %xmm0
+; SSE2-NEXT: por %xmm5, %xmm0
+; SSE2-NEXT: movdqa %xmm1, %xmm5
+; SSE2-NEXT: psrlw $8, %xmm5
+; SSE2-NEXT: psllw $8, %xmm1
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $4, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm5
+; SSE2-NEXT: psllw $4, %xmm5
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm5
+; SSE2-NEXT: psllw $2, %xmm5
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: movdqa %xmm5, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: paddw %xmm1, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [2,2,2,2,2,2,2,2]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: psrlw $1, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [1,1,1,1,1,1,1,1]
+; SSE2-NEXT: pand %xmm5, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [4,4,4,4,4,4,4,4]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pxor %xmm7, %xmm8
+; SSE2-NEXT: pxor %xmm6, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [8,8,8,8,8,8,8,8]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [16,16,16,16,16,16,16,16]
+; SSE2-NEXT: pand %xmm5, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: pxor %xmm6, %xmm7
+; SSE2-NEXT: pxor %xmm8, %xmm7
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [32,32,32,32,32,32,32,32]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [64,64,64,64,64,64,64,64]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pxor %xmm6, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [128,128,128,128,128,128,128,128]
+; SSE2-NEXT: pand %xmm1, %xmm6
+; SSE2-NEXT: pmullw %xmm0, %xmm6
+; SSE2-NEXT: pxor %xmm8, %xmm6
+; SSE2-NEXT: pxor %xmm7, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [256,256,256,256,256,256,256,256]
+; SSE2-NEXT: pand %xmm5, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512,512,512,512,512]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: pxor %xmm7, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [1024,1024,1024,1024,1024,1024,1024,1024]
+; SSE2-NEXT: pand %xmm5, %xmm9
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2048,2048,2048,2048,2048,2048,2048,2048]
+; SSE2-NEXT: pand %xmm1, %xmm7
+; SSE2-NEXT: pmullw %xmm0, %xmm7
+; SSE2-NEXT: pxor %xmm9, %xmm7
+; SSE2-NEXT: pxor %xmm6, %xmm7
+; SSE2-NEXT: psllw $8, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [4096,4096,4096,4096,4096,4096,4096,4096]
+; SSE2-NEXT: pand %xmm5, %xmm8
+; SSE2-NEXT: pmullw %xmm0, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [8192,8192,8192,8192,8192,8192,8192,8192]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: pmullw %xmm0, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: pmullw %xmm0, %xmm5
+; SSE2-NEXT: pxor %xmm9, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: pmullw %xmm1, %xmm0
+; SSE2-NEXT: pxor %xmm5, %xmm0
+; SSE2-NEXT: pxor %xmm7, %xmm0
+; SSE2-NEXT: psrlw $8, %xmm0
+; SSE2-NEXT: por %xmm6, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $4, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psllw $4, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $2, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: psllw $2, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlw $1, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: paddw %xmm0, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: psrlw $1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmulh_v8i16:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [1,0,3,2,5,4,7,6,9,8,11,10,13,12,15,14]
+; SSE42-NEXT: pshufb %xmm6, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: movdqa %xmm2, %xmm0
+; SSE42-NEXT: pand %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: movdqa %xmm3, %xmm7
+; SSE42-NEXT: pshufb %xmm0, %xmm7
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pshufb %xmm2, %xmm5
+; SSE42-NEXT: por %xmm7, %xmm5
+; SSE42-NEXT: pshufb %xmm6, %xmm1
+; SSE42-NEXT: movdqa %xmm1, %xmm6
+; SSE42-NEXT: psrlw $4, %xmm6
+; SSE42-NEXT: pand %xmm4, %xmm6
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: pshufb %xmm6, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [2,2,2,2,2,2,2,2]
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pmullw %xmm5, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [1,1,1,1,1,1,1,1]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm6, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [4,4,4,4,4,4,4,4]
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pmullw %xmm5, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [8,8,8,8,8,8,8,8]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm6, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: movdqa %xmm3, %xmm6
+; SSE42-NEXT: pshufb %xmm1, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16]
+; SSE42-NEXT: pand %xmm6, %xmm1
+; SSE42-NEXT: pmullw %xmm5, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [32,32,32,32,32,32,32,32]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [64,64,64,64,64,64,64,64]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmullw %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [128,128,128,128,128,128,128,128]
+; SSE42-NEXT: pand %xmm6, %xmm1
+; SSE42-NEXT: pmullw %xmm5, %xmm1
+; SSE42-NEXT: pxor %xmm9, %xmm1
+; SSE42-NEXT: pxor %xmm7, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [256,256,256,256,256,256,256,256]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512,512,512,512,512]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [1024,1024,1024,1024,1024,1024,1024,1024]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE42-NEXT: pmullw %xmm5, %xmm2
+; SSE42-NEXT: pxor %xmm7, %xmm2
+; SSE42-NEXT: pxor %xmm1, %xmm2
+; SSE42-NEXT: psllw $8, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [4096,4096,4096,4096,4096,4096,4096,4096]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [8192,8192,8192,8192,8192,8192,8192,8192]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmullw %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [16384,16384,16384,16384,16384,16384,16384,16384]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmullw %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE42-NEXT: pmullw %xmm5, %xmm6
+; SSE42-NEXT: pxor %xmm7, %xmm6
+; SSE42-NEXT: pxor %xmm2, %xmm6
+; SSE42-NEXT: psrlw $8, %xmm6
+; SSE42-NEXT: por %xmm1, %xmm6
+; SSE42-NEXT: movdqa %xmm6, %xmm1
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: pshufb %xmm1, %xmm3
+; SSE42-NEXT: psrlw $4, %xmm6
+; SSE42-NEXT: pand %xmm4, %xmm6
+; SSE42-NEXT: pshufb %xmm6, %xmm0
+; SSE42-NEXT: por %xmm3, %xmm0
+; SSE42-NEXT: psrlw $1, %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmulh_v8i16:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [2,2,2,2,2,2,2,2]
+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm2
+; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX2-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [1,1,1,1,1,1,1,1]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [4,4,4,4,4,4,4,4]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [8,8,8,8,8,8,8,8]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [16,16,16,16,16,16,16,16]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm5 = [32,32,32,32,32,32,32,32]
+; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm5
+; AVX2-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpxor %ymm5, %ymm4, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [64,64,64,64,64,64,64,64]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [128,128,128,128,128,128,128,128]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [256,256,256,256,256,256,256,256]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm5 = [512,512,512,512,512,512,512,512]
+; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm5
+; AVX2-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm5, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [1024,1024,1024,1024,1024,1024,1024,1024]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm3 = [2048,2048,2048,2048,2048,2048,2048,2048]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [4096,4096,4096,4096,4096,4096,4096,4096]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm5 = [8192,8192,8192,8192,8192,8192,8192,8192]
+; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm5
+; AVX2-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm5, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [16384,16384,16384,16384,16384,16384,16384,16384]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm4 = [32768,32768,32768,32768,32768,32768,32768,32768]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm1
+; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm3, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm2, %ymm0
+; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0
+; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1
+; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulh_v8i16:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
+; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm5
+; AVX512-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm2 = ymm2 ^ ymm4 ^ ymm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm5
+; AVX512-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm2 = ymm2 ^ ymm4 ^ ymm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm4
+; AVX512-NEXT: vpmulld %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm5
+; AVX512-NEXT: vpmulld %ymm5, %ymm0, %ymm5
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm2
+; AVX512-NEXT: vpmulld %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm2 = ymm2 ^ ymm4 ^ ymm5
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm3
+; AVX512-NEXT: vpmulld %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandd {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to8}, %ymm1, %ymm1
+; AVX512-NEXT: vpmulld %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpternlogd {{.*#+}} ymm0 = ymm0 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpsrld $16, %ymm0, %ymm0
+; AVX512-NEXT: vpmovdw %ymm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %a.ext = zext <8 x i16> %a to <8 x i32>
+ %b.ext = zext <8 x i16> %b to <8 x i32>
+ %clmul = call <8 x i32> @llvm.clmul.v8i32(<8 x i32> %a.ext, <8 x i32> %b.ext)
+ %res.ext = lshr <8 x i32> %clmul, splat (i32 16)
+ %res = trunc <8x i32> %res.ext to <8 x i16>
+ ret <8 x i16> %res
+}
+
+define <4 x i32> @clmulh_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
+; SSE2-LABEL: clmulh_v4i32:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrld $24, %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: pslld $8, %xmm3
+; SSE2-NEXT: por %xmm2, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [16711935,16711935,16711935,16711935]
+; SSE2-NEXT: pand %xmm2, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pand %xmm2, %xmm4
+; SSE2-NEXT: psrld $8, %xmm4
+; SSE2-NEXT: pslld $24, %xmm0
+; SSE2-NEXT: por %xmm3, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: psrld $4, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [252645135,252645135,252645135,252645135]
+; SSE2-NEXT: pand %xmm3, %xmm4
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: pslld $4, %xmm0
+; SSE2-NEXT: por %xmm4, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: psrld $2, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [858993459,858993459,858993459,858993459]
+; SSE2-NEXT: pand %xmm4, %xmm5
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: pslld $2, %xmm0
+; SSE2-NEXT: por %xmm5, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: psrld $1, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [1431655765,1431655765,1431655765,1431655765]
+; SSE2-NEXT: pand %xmm5, %xmm6
+; SSE2-NEXT: pand %xmm5, %xmm0
+; SSE2-NEXT: paddd %xmm0, %xmm0
+; SSE2-NEXT: por %xmm6, %xmm0
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: psrld $24, %xmm6
+; SSE2-NEXT: movdqa %xmm1, %xmm7
+; SSE2-NEXT: pslld $8, %xmm7
+; SSE2-NEXT: por %xmm6, %xmm7
+; SSE2-NEXT: pand %xmm2, %xmm7
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: pand %xmm2, %xmm6
+; SSE2-NEXT: psrld $8, %xmm6
+; SSE2-NEXT: pslld $24, %xmm1
+; SSE2-NEXT: por %xmm7, %xmm1
+; SSE2-NEXT: por %xmm6, %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: psrld $4, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm6
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pslld $4, %xmm1
+; SSE2-NEXT: por %xmm6, %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: psrld $2, %xmm6
+; SSE2-NEXT: pand %xmm4, %xmm6
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pslld $2, %xmm1
+; SSE2-NEXT: por %xmm6, %xmm1
+; SSE2-NEXT: movdqa %xmm1, %xmm6
+; SSE2-NEXT: pand %xmm5, %xmm6
+; SSE2-NEXT: paddd %xmm6, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [2,2,2,2]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm9, %xmm7
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm7[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm7 = xmm0[1,1,3,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm9[0],xmm8[1],xmm9[1]
+; SSE2-NEXT: psrld $1, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [1,1,1,1]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [4,4,4,4]
+; SSE2-NEXT: pand %xmm1, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm11, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm11[0],xmm9[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [8,8,8,8]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [16,16,16,16]
+; SSE2-NEXT: pand %xmm1, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm11, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm11[0],xmm8[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [32,32,32,32]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [64,64,64,64]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [128,128,128,128]
+; SSE2-NEXT: pand %xmm6, %xmm10
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm10, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1]
+; SSE2-NEXT: pxor %xmm11, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [256,256,256,256]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm8, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1024,1024,1024,1024]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [2048,2048,2048,2048]
+; SSE2-NEXT: pand %xmm6, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm11, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm11[0],xmm8[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [4096,4096,4096,4096]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [8192,8192,8192,8192]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [16384,16384,16384,16384]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [32768,32768,32768,32768]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [65536,65536,65536,65536]
+; SSE2-NEXT: pand %xmm1, %xmm10
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm10, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1]
+; SSE2-NEXT: pxor %xmm11, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [131072,131072,131072,131072]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [262144,262144,262144,262144]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm8, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [524288,524288,524288,524288]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [1048576,1048576,1048576,1048576]
+; SSE2-NEXT: pand %xmm1, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm8, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm8[0],xmm11[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [2097152,2097152,2097152,2097152]
+; SSE2-NEXT: pand %xmm6, %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm8, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm8[0],xmm10[1],xmm8[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm11 = [4194304,4194304,4194304,4194304]
+; SSE2-NEXT: pand %xmm1, %xmm11
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm11, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm11[0],xmm8[1],xmm11[1]
+; SSE2-NEXT: pxor %xmm10, %xmm8
+; SSE2-NEXT: pxor %xmm9, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [8388608,8388608,8388608,8388608]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [16777216,16777216,16777216,16777216]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [33554432,33554432,33554432,33554432]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [67108864,67108864,67108864,67108864]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [134217728,134217728,134217728,134217728]
+; SSE2-NEXT: pand %xmm6, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm9, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm10 = xmm10[0],xmm9[0],xmm10[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm11, %xmm10
+; SSE2-NEXT: movdqa {{.*#+}} xmm9 = [268435456,268435456,268435456,268435456]
+; SSE2-NEXT: pand %xmm1, %xmm9
+; SSE2-NEXT: movdqa %xmm0, %xmm11
+; SSE2-NEXT: pmuludq %xmm9, %xmm11
+; SSE2-NEXT: pshufd {{.*#+}} xmm11 = xmm11[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm11 = xmm11[0],xmm9[0],xmm11[1],xmm9[1]
+; SSE2-NEXT: pxor %xmm10, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [536870912,536870912,536870912,536870912]
+; SSE2-NEXT: pand %xmm6, %xmm10
+; SSE2-NEXT: movdqa %xmm0, %xmm9
+; SSE2-NEXT: pmuludq %xmm10, %xmm9
+; SSE2-NEXT: pshufd {{.*#+}} xmm9 = xmm9[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pshufd {{.*#+}} xmm10 = xmm10[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm9 = xmm9[0],xmm10[0],xmm9[1],xmm10[1]
+; SSE2-NEXT: pxor %xmm11, %xmm9
+; SSE2-NEXT: pxor %xmm8, %xmm9
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: movdqa %xmm0, %xmm8
+; SSE2-NEXT: pmuludq %xmm1, %xmm8
+; SSE2-NEXT: pshufd {{.*#+}} xmm8 = xmm8[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm1
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm8 = xmm8[0],xmm1[0],xmm8[1],xmm1[1]
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE2-NEXT: pmuludq %xmm6, %xmm0
+; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm6[1,1,3,3]
+; SSE2-NEXT: pmuludq %xmm7, %xmm1
+; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
+; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
+; SSE2-NEXT: pxor %xmm8, %xmm0
+; SSE2-NEXT: pxor %xmm9, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $24, %xmm1
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: pslld $8, %xmm6
+; SSE2-NEXT: por %xmm1, %xmm6
+; SSE2-NEXT: pand %xmm2, %xmm6
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: pslld $24, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psrld $8, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: por %xmm6, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $4, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm1
+; SSE2-NEXT: pand %xmm3, %xmm0
+; SSE2-NEXT: pslld $4, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $2, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: pand %xmm4, %xmm0
+; SSE2-NEXT: pslld $2, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrld $1, %xmm1
+; SSE2-NEXT: pand %xmm5, %xmm1
+; SSE2-NEXT: pand %xmm5, %xmm0
+; SSE2-NEXT: paddd %xmm0, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: psrld $1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmulh_v4i32:
+; SSE42: # %bb.0:
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [3,2,1,0,7,6,5,4,11,10,9,8,15,14,13,12]
+; SSE42-NEXT: pshufb %xmm6, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: movdqa %xmm2, %xmm0
+; SSE42-NEXT: pand %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: movdqa %xmm3, %xmm7
+; SSE42-NEXT: pshufb %xmm0, %xmm7
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: movdqa %xmm0, %xmm5
+; SSE42-NEXT: pshufb %xmm2, %xmm5
+; SSE42-NEXT: por %xmm7, %xmm5
+; SSE42-NEXT: pshufb %xmm6, %xmm1
+; SSE42-NEXT: movdqa %xmm1, %xmm2
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: movdqa %xmm0, %xmm6
+; SSE42-NEXT: pshufb %xmm2, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [2,2,2,2]
+; SSE42-NEXT: pand %xmm6, %xmm2
+; SSE42-NEXT: pmulld %xmm5, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [1,1,1,1]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm2, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [4,4,4,4]
+; SSE42-NEXT: pand %xmm6, %xmm2
+; SSE42-NEXT: pmulld %xmm5, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [8,8,8,8]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm2, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: movdqa %xmm3, %xmm2
+; SSE42-NEXT: pshufb %xmm1, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16]
+; SSE42-NEXT: pand %xmm2, %xmm1
+; SSE42-NEXT: pmulld %xmm5, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [32,32,32,32]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [64,64,64,64]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [128,128,128,128]
+; SSE42-NEXT: pand %xmm2, %xmm1
+; SSE42-NEXT: pmulld %xmm5, %xmm1
+; SSE42-NEXT: pxor %xmm9, %xmm1
+; SSE42-NEXT: pxor %xmm7, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [256,256,256,256]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [512,512,512,512]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [1024,1024,1024,1024]
+; SSE42-NEXT: pand %xmm6, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [2048,2048,2048,2048]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: pxor %xmm1, %xmm8
+; SSE42-NEXT: pslld $24, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [4096,4096,4096,4096]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [8192,8192,8192,8192]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm7, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [16384,16384,16384,16384]
+; SSE42-NEXT: pand %xmm2, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [32768,32768,32768,32768]
+; SSE42-NEXT: pand %xmm2, %xmm7
+; SSE42-NEXT: pmulld %xmm5, %xmm7
+; SSE42-NEXT: pxor %xmm10, %xmm7
+; SSE42-NEXT: pxor %xmm8, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [65536,65536,65536,65536]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [131072,131072,131072,131072]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [262144,262144,262144,262144]
+; SSE42-NEXT: pand %xmm6, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm9, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [524288,524288,524288,524288]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm8, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [1048576,1048576,1048576,1048576]
+; SSE42-NEXT: pand %xmm2, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [2097152,2097152,2097152,2097152]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pxor %xmm10, %xmm8
+; SSE42-NEXT: pxor %xmm7, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [4194304,4194304,4194304,4194304]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [8388608,8388608,8388608,8388608]
+; SSE42-NEXT: pand %xmm2, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [16777216,16777216,16777216,16777216]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm10, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [33554432,33554432,33554432,33554432]
+; SSE42-NEXT: pand %xmm6, %xmm10
+; SSE42-NEXT: pmulld %xmm5, %xmm10
+; SSE42-NEXT: pxor %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [67108864,67108864,67108864,67108864]
+; SSE42-NEXT: pand %xmm6, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm10, %xmm9
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm6
+; SSE42-NEXT: pmulld %xmm5, %xmm6
+; SSE42-NEXT: pxor %xmm9, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm9 = [268435456,268435456,268435456,268435456]
+; SSE42-NEXT: pand %xmm2, %xmm9
+; SSE42-NEXT: pmulld %xmm5, %xmm9
+; SSE42-NEXT: pxor %xmm6, %xmm9
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [536870912,536870912,536870912,536870912]
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: pmulld %xmm5, %xmm6
+; SSE42-NEXT: pxor %xmm9, %xmm6
+; SSE42-NEXT: pxor %xmm8, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [1073741824,1073741824,1073741824,1073741824]
+; SSE42-NEXT: pand %xmm2, %xmm8
+; SSE42-NEXT: pmulld %xmm5, %xmm8
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE42-NEXT: pmulld %xmm5, %xmm2
+; SSE42-NEXT: pxor %xmm8, %xmm2
+; SSE42-NEXT: pxor %xmm6, %xmm2
+; SSE42-NEXT: movdqa %xmm2, %xmm5
+; SSE42-NEXT: pshufb {{.*#+}} xmm5 = zero,xmm5[2],zero,zero,zero,xmm5[6],zero,zero,zero,xmm5[10],zero,zero,zero,xmm5[14],zero,zero
+; SSE42-NEXT: por %xmm1, %xmm5
+; SSE42-NEXT: pslld $8, %xmm7
+; SSE42-NEXT: psrld $24, %xmm2
+; SSE42-NEXT: por %xmm7, %xmm2
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE42-NEXT: por %xmm5, %xmm2
+; SSE42-NEXT: movdqa %xmm2, %xmm1
+; SSE42-NEXT: pand %xmm4, %xmm1
+; SSE42-NEXT: pshufb %xmm1, %xmm3
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm4, %xmm2
+; SSE42-NEXT: pshufb %xmm2, %xmm0
+; SSE42-NEXT: por %xmm3, %xmm0
+; SSE42-NEXT: psrld $1, %xmm0
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmulh_v4i32:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [2,2,2,2]
+; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm2
+; AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [1,1,1,1]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [4,4,4,4]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [8,8,8,8]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [16,16,16,16]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [32,32,32,32]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [64,64,64,64]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [128,128,128,128]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [256,256,256,256]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [512,512,512,512]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1024,1024,1024,1024]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [2048,2048,2048,2048]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [4096,4096,4096,4096]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [8192,8192,8192,8192]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [16384,16384,16384,16384]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [32768,32768,32768,32768]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [65536,65536,65536,65536]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [131072,131072,131072,131072]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [262144,262144,262144,262144]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [524288,524288,524288,524288]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1048576,1048576,1048576,1048576]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [2097152,2097152,2097152,2097152]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [4194304,4194304,4194304,4194304]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [8388608,8388608,8388608,8388608]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [16777216,16777216,16777216,16777216]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [33554432,33554432,33554432,33554432]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [67108864,67108864,67108864,67108864]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [134217728,134217728,134217728,134217728]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [268435456,268435456,268435456,268435456]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm3 = [536870912,536870912,536870912,536870912]
+; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm3
+; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [1073741824,1073741824,1073741824,1073741824]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm4
+; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX2-NEXT: vpxor %ymm4, %ymm3, %ymm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm4 = [2147483648,2147483648,2147483648,2147483648]
+; AVX2-NEXT: vpand %ymm4, %ymm1, %ymm1
+; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm3, %ymm0
+; AVX2-NEXT: vpxor %ymm0, %ymm2, %ymm0
+; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [1,3,5,7]
+; AVX2-NEXT: vpermd %ymm0, %ymm1, %ymm0
+; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0
+; AVX2-NEXT: vzeroupper
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulh_v4i32:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
+; AVX512-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpxor %ymm2, %ymm3, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm2 ^ ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpmuludq %ymm5, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm5
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpmuludq %ymm5, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm4
+; AVX512-NEXT: vpmuludq %ymm4, %ymm0, %ymm4
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm4 = ymm4 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm3
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm3 = ymm3 ^ ymm4 ^ ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm2
+; AVX512-NEXT: vpmuludq %ymm2, %ymm0, %ymm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm1
+; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm0
+; AVX512-NEXT: vpternlogq {{.*#+}} ymm0 = ymm0 ^ ymm3 ^ ymm2
+; AVX512-NEXT: vpsrlq $32, %ymm0, %ymm0
+; AVX512-NEXT: vpmovqd %ymm0, %xmm0
+; AVX512-NEXT: vzeroupper
+; AVX512-NEXT: retq
+ %a.ext = zext <4 x i32> %a to <4 x i64>
+ %b.ext = zext <4 x i32> %b to <4 x i64>
+ %clmul = call <4 x i64> @llvm.clmul.v4i64(<4 x i64> %a.ext, <4 x i64> %b.ext)
+ %res.ext = lshr <4 x i64> %clmul, splat (i64 32)
+ %res = trunc <4 x i64> %res.ext to <4 x i32>
+ ret <4 x i32> %res
+}
+
+define <2 x i64> @clmulh_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
+; SSE2-LABEL: clmulh_v2i64:
+; SSE2: # %bb.0:
+; SSE2-NEXT: movdqa %xmm1, %xmm12
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: psrlq $24, %xmm6
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [16711680,16711680]
+; SSE2-NEXT: pand %xmm4, %xmm6
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrlq $8, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [4278190080,4278190080]
+; SSE2-NEXT: pand %xmm5, %xmm2
+; SSE2-NEXT: por %xmm6, %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: psrlq $40, %xmm7
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [65280,65280]
+; SSE2-NEXT: pand %xmm8, %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: psrlq $56, %xmm3
+; SSE2-NEXT: por %xmm7, %xmm3
+; SSE2-NEXT: por %xmm2, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pand %xmm5, %xmm7
+; SSE2-NEXT: psllq $8, %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: pand %xmm4, %xmm2
+; SSE2-NEXT: psllq $24, %xmm2
+; SSE2-NEXT: por %xmm7, %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pand %xmm8, %xmm7
+; SSE2-NEXT: psllq $40, %xmm7
+; SSE2-NEXT: psllq $56, %xmm0
+; SSE2-NEXT: por %xmm7, %xmm0
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: por %xmm3, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrlq $4, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [1085102592571150095,1085102592571150095]
+; SSE2-NEXT: pand %xmm6, %xmm2
+; SSE2-NEXT: pand %xmm6, %xmm0
+; SSE2-NEXT: psllq $4, %xmm0
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrlq $2, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [3689348814741910323,3689348814741910323]
+; SSE2-NEXT: pand %xmm7, %xmm2
+; SSE2-NEXT: pand %xmm7, %xmm0
+; SSE2-NEXT: psllq $2, %xmm0
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: psrlq $1, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm10 = [6148914691236517205,6148914691236517205]
+; SSE2-NEXT: pand %xmm10, %xmm3
+; SSE2-NEXT: pand %xmm10, %xmm0
+; SSE2-NEXT: paddq %xmm0, %xmm0
+; SSE2-NEXT: por %xmm3, %xmm0
+; SSE2-NEXT: movdqa %xmm1, %xmm3
+; SSE2-NEXT: psrlq $24, %xmm3
+; SSE2-NEXT: pand %xmm4, %xmm3
+; SSE2-NEXT: movdqa %xmm1, %xmm2
+; SSE2-NEXT: psrlq $8, %xmm2
+; SSE2-NEXT: pand %xmm5, %xmm2
+; SSE2-NEXT: por %xmm3, %xmm2
+; SSE2-NEXT: movdqa %xmm1, %xmm9
+; SSE2-NEXT: psrlq $40, %xmm9
+; SSE2-NEXT: pand %xmm8, %xmm9
+; SSE2-NEXT: movdqa %xmm1, %xmm3
+; SSE2-NEXT: psrlq $56, %xmm3
+; SSE2-NEXT: por %xmm9, %xmm3
+; SSE2-NEXT: por %xmm2, %xmm3
+; SSE2-NEXT: movdqa %xmm1, %xmm2
+; SSE2-NEXT: pand %xmm5, %xmm2
+; SSE2-NEXT: psllq $8, %xmm2
+; SSE2-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: pand %xmm4, %xmm1
+; SSE2-NEXT: psllq $24, %xmm1
+; SSE2-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: por %xmm2, %xmm1
+; SSE2-NEXT: movdqa %xmm12, %xmm2
+; SSE2-NEXT: pand %xmm8, %xmm2
+; SSE2-NEXT: movdqa %xmm8, %xmm13
+; SSE2-NEXT: psllq $40, %xmm2
+; SSE2-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: psllq $56, %xmm12
+; SSE2-NEXT: movdqa %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE2-NEXT: por %xmm2, %xmm12
+; SSE2-NEXT: por %xmm1, %xmm12
+; SSE2-NEXT: por %xmm3, %xmm12
+; SSE2-NEXT: movdqa %xmm12, %xmm11
+; SSE2-NEXT: psrlq $4, %xmm11
+; SSE2-NEXT: pand %xmm6, %xmm11
+; SSE2-NEXT: pand %xmm6, %xmm12
+; SSE2-NEXT: psllq $4, %xmm12
+; SSE2-NEXT: por %xmm12, %xmm11
+; SSE2-NEXT: movdqa %xmm11, %xmm8
+; SSE2-NEXT: psrlq $2, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm8
+; SSE2-NEXT: pand %xmm7, %xmm11
+; SSE2-NEXT: psllq $2, %xmm11
+; SSE2-NEXT: por %xmm11, %xmm8
+; SSE2-NEXT: movdqa %xmm8, %xmm9
+; SSE2-NEXT: pand %xmm10, %xmm9
+; SSE2-NEXT: paddq %xmm9, %xmm9
+; SSE2-NEXT: movdqa %xmm9, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm4
+; SSE2-NEXT: pmuludq %xmm2, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm6
+; SSE2-NEXT: psrlq $32, %xmm6
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm4, %xmm2
+; SSE2-NEXT: psrlq $1, %xmm8
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [1,1]
+; SSE2-NEXT: pand %xmm8, %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pmuludq %xmm6, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: por %xmm5, %xmm4
+; SSE2-NEXT: movdqa %xmm8, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm5, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: por %xmm7, %xmm5
+; SSE2-NEXT: pxor %xmm2, %xmm5
+; SSE2-NEXT: movdqa %xmm9, %xmm7
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: pmuludq %xmm7, %xmm2
+; SSE2-NEXT: pmuludq %xmm6, %xmm7
+; SSE2-NEXT: psllq $32, %xmm7
+; SSE2-NEXT: por %xmm2, %xmm7
+; SSE2-NEXT: pxor %xmm5, %xmm7
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm2, %xmm5
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm5, %xmm2
+; SSE2-NEXT: pxor %xmm7, %xmm2
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: movdqa %xmm9, %xmm4
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm4, %xmm5
+; SSE2-NEXT: pmuludq %xmm6, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: por %xmm5, %xmm4
+; SSE2-NEXT: movdqa %xmm8, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm5, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: por %xmm7, %xmm5
+; SSE2-NEXT: pxor %xmm4, %xmm5
+; SSE2-NEXT: movdqa %xmm9, %xmm4
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm4, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: por %xmm7, %xmm4
+; SSE2-NEXT: pxor %xmm5, %xmm4
+; SSE2-NEXT: pxor %xmm2, %xmm4
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm2, %xmm5
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm5, %xmm2
+; SSE2-NEXT: movdqa %xmm9, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm5, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: por %xmm7, %xmm5
+; SSE2-NEXT: pxor %xmm2, %xmm5
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm2, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm7, %xmm2
+; SSE2-NEXT: pxor %xmm5, %xmm2
+; SSE2-NEXT: movdqa %xmm9, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm5, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: por %xmm7, %xmm5
+; SSE2-NEXT: pxor %xmm2, %xmm5
+; SSE2-NEXT: movdqa %xmm8, %xmm7
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: pmuludq %xmm7, %xmm2
+; SSE2-NEXT: pmuludq %xmm6, %xmm7
+; SSE2-NEXT: psllq $32, %xmm7
+; SSE2-NEXT: por %xmm2, %xmm7
+; SSE2-NEXT: pxor %xmm5, %xmm7
+; SSE2-NEXT: movdqa %xmm9, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm2, %xmm5
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm5, %xmm2
+; SSE2-NEXT: pxor %xmm7, %xmm2
+; SSE2-NEXT: movdqa %xmm8, %xmm7
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm7, %xmm5
+; SSE2-NEXT: pmuludq %xmm6, %xmm7
+; SSE2-NEXT: psllq $32, %xmm7
+; SSE2-NEXT: por %xmm5, %xmm7
+; SSE2-NEXT: movdqa %xmm9, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm5, %xmm10
+; SSE2-NEXT: pmuludq %xmm6, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: por %xmm10, %xmm5
+; SSE2-NEXT: pxor %xmm7, %xmm5
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: pxor %xmm2, %xmm5
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm2, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm7, %xmm2
+; SSE2-NEXT: movdqa %xmm9, %xmm7
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pmuludq %xmm6, %xmm7
+; SSE2-NEXT: psllq $32, %xmm7
+; SSE2-NEXT: por %xmm10, %xmm7
+; SSE2-NEXT: pxor %xmm2, %xmm7
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm2, %xmm10
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm10, %xmm2
+; SSE2-NEXT: pxor %xmm7, %xmm2
+; SSE2-NEXT: movdqa %xmm9, %xmm7
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pmuludq %xmm6, %xmm7
+; SSE2-NEXT: psllq $32, %xmm7
+; SSE2-NEXT: por %xmm10, %xmm7
+; SSE2-NEXT: pxor %xmm2, %xmm7
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm2, %xmm10
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm10, %xmm2
+; SSE2-NEXT: pxor %xmm7, %xmm2
+; SSE2-NEXT: movdqa %xmm9, %xmm7
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm7, %xmm10
+; SSE2-NEXT: pmuludq %xmm6, %xmm7
+; SSE2-NEXT: psllq $32, %xmm7
+; SSE2-NEXT: por %xmm10, %xmm7
+; SSE2-NEXT: pxor %xmm2, %xmm7
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm10
+; SSE2-NEXT: pmuludq %xmm2, %xmm10
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm10, %xmm2
+; SSE2-NEXT: pxor %xmm7, %xmm2
+; SSE2-NEXT: movdqa %xmm9, %xmm10
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm10
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm10, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm10
+; SSE2-NEXT: psllq $32, %xmm10
+; SSE2-NEXT: por %xmm7, %xmm10
+; SSE2-NEXT: pxor %xmm2, %xmm10
+; SSE2-NEXT: movdqa %xmm4, %xmm2
+; SSE2-NEXT: psllq $56, %xmm2
+; SSE2-NEXT: pxor %xmm5, %xmm10
+; SSE2-NEXT: movdqa %xmm5, %xmm4
+; SSE2-NEXT: pand %xmm13, %xmm4
+; SSE2-NEXT: psllq $40, %xmm4
+; SSE2-NEXT: por %xmm2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm15 = [16777216,16777216]
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand %xmm15, %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm5
+; SSE2-NEXT: pmuludq %xmm2, %xmm5
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm5, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm14 = [33554432,33554432]
+; SSE2-NEXT: movdqa %xmm9, %xmm5
+; SSE2-NEXT: pand %xmm14, %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm5, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: por %xmm7, %xmm5
+; SSE2-NEXT: pxor %xmm2, %xmm5
+; SSE2-NEXT: movdqa {{.*#+}} xmm13 = [67108864,67108864]
+; SSE2-NEXT: movdqa %xmm8, %xmm2
+; SSE2-NEXT: pand %xmm13, %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm7
+; SSE2-NEXT: pmuludq %xmm2, %xmm7
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm7, %xmm2
+; SSE2-NEXT: pxor %xmm5, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [134217728,134217728]
+; SSE2-NEXT: movdqa %xmm9, %xmm5
+; SSE2-NEXT: pand %xmm7, %xmm5
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: pmuludq %xmm5, %xmm1
+; SSE2-NEXT: pmuludq %xmm6, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: por %xmm1, %xmm5
+; SSE2-NEXT: pxor %xmm2, %xmm5
+; SSE2-NEXT: movdqa %xmm8, %xmm1
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: pmuludq %xmm1, %xmm2
+; SSE2-NEXT: pmuludq %xmm6, %xmm1
+; SSE2-NEXT: psllq $32, %xmm1
+; SSE2-NEXT: por %xmm2, %xmm1
+; SSE2-NEXT: pxor %xmm5, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm5 = [536870912,536870912]
+; SSE2-NEXT: movdqa %xmm9, %xmm2
+; SSE2-NEXT: pand %xmm5, %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: pmuludq %xmm2, %xmm3
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm3, %xmm2
+; SSE2-NEXT: pxor %xmm1, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm8
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: pmuludq %xmm8, %xmm1
+; SSE2-NEXT: pmuludq %xmm6, %xmm8
+; SSE2-NEXT: psllq $32, %xmm8
+; SSE2-NEXT: por %xmm1, %xmm8
+; SSE2-NEXT: pxor %xmm2, %xmm8
+; SSE2-NEXT: movdqa %xmm9, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: pmuludq %xmm2, %xmm1
+; SSE2-NEXT: pmuludq %xmm6, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: por %xmm1, %xmm2
+; SSE2-NEXT: pxor %xmm8, %xmm2
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE2-NEXT: psrlq $39, %xmm1
+; SSE2-NEXT: pmuludq %xmm0, %xmm1
+; SSE2-NEXT: psllq $32, %xmm1
+; SSE2-NEXT: psrlq $32, %xmm9
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [2,2]
+; SSE2-NEXT: pand %xmm9, %xmm3
+; SSE2-NEXT: pmuludq %xmm0, %xmm3
+; SSE2-NEXT: psllq $32, %xmm3
+; SSE2-NEXT: pxor %xmm1, %xmm3
+; SSE2-NEXT: psrlq $33, %xmm11
+; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [4,4]
+; SSE2-NEXT: pand %xmm11, %xmm1
+; SSE2-NEXT: pmuludq %xmm0, %xmm1
+; SSE2-NEXT: psllq $32, %xmm1
+; SSE2-NEXT: pxor %xmm3, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [8,8]
+; SSE2-NEXT: pand %xmm9, %xmm3
+; SSE2-NEXT: pmuludq %xmm0, %xmm3
+; SSE2-NEXT: psllq $32, %xmm3
+; SSE2-NEXT: pxor %xmm1, %xmm3
+; SSE2-NEXT: psrlq $35, %xmm12
+; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [16,16]
+; SSE2-NEXT: pand %xmm12, %xmm1
+; SSE2-NEXT: pmuludq %xmm0, %xmm1
+; SSE2-NEXT: psllq $32, %xmm1
+; SSE2-NEXT: pxor %xmm3, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [32,32]
+; SSE2-NEXT: pand %xmm9, %xmm3
+; SSE2-NEXT: pmuludq %xmm0, %xmm3
+; SSE2-NEXT: psllq $32, %xmm3
+; SSE2-NEXT: pxor %xmm1, %xmm3
+; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [64,64]
+; SSE2-NEXT: pand %xmm11, %xmm1
+; SSE2-NEXT: pmuludq %xmm0, %xmm1
+; SSE2-NEXT: psllq $32, %xmm1
+; SSE2-NEXT: pxor %xmm3, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [128,128]
+; SSE2-NEXT: pand %xmm9, %xmm3
+; SSE2-NEXT: pmuludq %xmm0, %xmm3
+; SSE2-NEXT: psllq $32, %xmm3
+; SSE2-NEXT: pxor %xmm1, %xmm3
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE2-NEXT: psrlq $39, %xmm1
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE2-NEXT: pmuludq %xmm0, %xmm1
+; SSE2-NEXT: psllq $32, %xmm1
+; SSE2-NEXT: pxor %xmm3, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [512,512]
+; SSE2-NEXT: pand %xmm9, %xmm3
+; SSE2-NEXT: pmuludq %xmm0, %xmm3
+; SSE2-NEXT: psllq $32, %xmm3
+; SSE2-NEXT: pxor %xmm1, %xmm3
+; SSE2-NEXT: movdqa %xmm3, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [1024,1024]
+; SSE2-NEXT: pand %xmm11, %xmm3
+; SSE2-NEXT: pmuludq %xmm0, %xmm3
+; SSE2-NEXT: psllq $32, %xmm3
+; SSE2-NEXT: pxor %xmm1, %xmm3
+; SSE2-NEXT: pxor %xmm10, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm8 = [16711680,16711680]
+; SSE2-NEXT: pand %xmm8, %xmm10
+; SSE2-NEXT: psllq $24, %xmm10
+; SSE2-NEXT: pxor %xmm2, %xmm3
+; SSE2-NEXT: movdqa %xmm2, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm6 = [4278190080,4278190080]
+; SSE2-NEXT: pand %xmm6, %xmm1
+; SSE2-NEXT: psllq $8, %xmm1
+; SSE2-NEXT: por %xmm10, %xmm1
+; SSE2-NEXT: por %xmm4, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2048,2048]
+; SSE2-NEXT: pand %xmm9, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [4096,4096]
+; SSE2-NEXT: pand %xmm12, %xmm4
+; SSE2-NEXT: pmuludq %xmm0, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: pxor %xmm2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [8192,8192]
+; SSE2-NEXT: pand %xmm9, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [16384,16384]
+; SSE2-NEXT: pand %xmm11, %xmm4
+; SSE2-NEXT: pmuludq %xmm0, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: pxor %xmm2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768]
+; SSE2-NEXT: pand %xmm9, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: movdqa %xmm2, %xmm4
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE2-NEXT: psrlq $39, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [131072,131072]
+; SSE2-NEXT: pand %xmm9, %xmm4
+; SSE2-NEXT: pmuludq %xmm0, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: pxor %xmm2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [262144,262144]
+; SSE2-NEXT: pand %xmm11, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [524288,524288]
+; SSE2-NEXT: pand %xmm9, %xmm4
+; SSE2-NEXT: pmuludq %xmm0, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: pxor %xmm2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1048576,1048576]
+; SSE2-NEXT: pand %xmm12, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2097152,2097152]
+; SSE2-NEXT: pand %xmm9, %xmm4
+; SSE2-NEXT: pmuludq %xmm0, %xmm4
+; SSE2-NEXT: psllq $32, %xmm4
+; SSE2-NEXT: pxor %xmm2, %xmm4
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [4194304,4194304]
+; SSE2-NEXT: pand %xmm11, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: pxor %xmm4, %xmm2
+; SSE2-NEXT: pxor %xmm3, %xmm2
+; SSE2-NEXT: movdqa %xmm2, %xmm3
+; SSE2-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE2-NEXT: psrlq $39, %xmm2
+; SSE2-NEXT: pand %xmm2, %xmm15
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [8388608,8388608]
+; SSE2-NEXT: pand %xmm9, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm2
+; SSE2-NEXT: psllq $32, %xmm2
+; SSE2-NEXT: pmuludq %xmm0, %xmm15
+; SSE2-NEXT: psllq $32, %xmm15
+; SSE2-NEXT: pxor %xmm2, %xmm15
+; SSE2-NEXT: pand %xmm9, %xmm14
+; SSE2-NEXT: pmuludq %xmm0, %xmm14
+; SSE2-NEXT: psllq $32, %xmm14
+; SSE2-NEXT: pxor %xmm15, %xmm14
+; SSE2-NEXT: pand %xmm11, %xmm13
+; SSE2-NEXT: pmuludq %xmm0, %xmm13
+; SSE2-NEXT: psllq $32, %xmm13
+; SSE2-NEXT: pxor %xmm14, %xmm13
+; SSE2-NEXT: pand %xmm9, %xmm7
+; SSE2-NEXT: pmuludq %xmm0, %xmm7
+; SSE2-NEXT: psllq $32, %xmm7
+; SSE2-NEXT: pxor %xmm13, %xmm7
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12
+; SSE2-NEXT: pmuludq %xmm0, %xmm12
+; SSE2-NEXT: psllq $32, %xmm12
+; SSE2-NEXT: pxor %xmm7, %xmm12
+; SSE2-NEXT: pand %xmm9, %xmm5
+; SSE2-NEXT: pmuludq %xmm0, %xmm5
+; SSE2-NEXT: psllq $32, %xmm5
+; SSE2-NEXT: pxor %xmm12, %xmm5
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11
+; SSE2-NEXT: pmuludq %xmm0, %xmm11
+; SSE2-NEXT: psllq $32, %xmm11
+; SSE2-NEXT: pxor %xmm5, %xmm11
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm9
+; SSE2-NEXT: pmuludq %xmm9, %xmm0
+; SSE2-NEXT: psllq $32, %xmm0
+; SSE2-NEXT: pxor %xmm11, %xmm0
+; SSE2-NEXT: pxor %xmm3, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrlq $40, %xmm2
+; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE2-NEXT: movdqa %xmm0, %xmm3
+; SSE2-NEXT: psrlq $56, %xmm3
+; SSE2-NEXT: por %xmm2, %xmm3
+; SSE2-NEXT: movdqa %xmm0, %xmm2
+; SSE2-NEXT: psrlq $24, %xmm2
+; SSE2-NEXT: pand %xmm8, %xmm2
+; SSE2-NEXT: psrlq $8, %xmm0
+; SSE2-NEXT: pand %xmm6, %xmm0
+; SSE2-NEXT: por %xmm2, %xmm0
+; SSE2-NEXT: por %xmm3, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlq $4, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [1085102592571150095,1085102592571150095]
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psllq $4, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlq $2, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [3689348814741910323,3689348814741910323]
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: psllq $2, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: movdqa %xmm0, %xmm1
+; SSE2-NEXT: psrlq $1, %xmm1
+; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [6148914691236517205,6148914691236517205]
+; SSE2-NEXT: pand %xmm2, %xmm1
+; SSE2-NEXT: pand %xmm2, %xmm0
+; SSE2-NEXT: paddq %xmm0, %xmm0
+; SSE2-NEXT: por %xmm1, %xmm0
+; SSE2-NEXT: psrlq $1, %xmm0
+; SSE2-NEXT: retq
+;
+; SSE42-LABEL: clmulh_v2i64:
+; SSE42: # %bb.0:
+; SSE42-NEXT: subq $312, %rsp # imm = 0x138
+; SSE42-NEXT: movdqa %xmm0, %xmm2
+; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,u,u,u,u,15,14,13,12,u,u,u,u]
+; SSE42-NEXT: movdqa %xmm2, %xmm3
+; SSE42-NEXT: pshufb {{.*#+}} xmm3 = xmm3[u,u,u,u,3],zero,zero,zero,xmm3[u,u,u,u,11],zero,zero,zero
+; SSE42-NEXT: movdqa %xmm2, %xmm4
+; SSE42-NEXT: pshufb {{.*#+}} xmm4 = xmm4[u,u,u,u],zero,xmm4[2],zero,zero,xmm4[u,u,u,u],zero,xmm4[10],zero,zero
+; SSE42-NEXT: pshufb {{.*#+}} xmm2 = xmm2[u,u,u,u],zero,zero,xmm2[1,0,u,u,u,u],zero,zero,xmm2[9,8]
+; SSE42-NEXT: por %xmm3, %xmm4
+; SSE42-NEXT: por %xmm4, %xmm2
+; SSE42-NEXT: pblendw {{.*#+}} xmm2 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
+; SSE42-NEXT: movdqa {{.*#+}} xmm8 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: movdqa %xmm2, %xmm0
+; SSE42-NEXT: pand %xmm8, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm11 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: movdqa %xmm11, %xmm3
+; SSE42-NEXT: pshufb %xmm0, %xmm3
+; SSE42-NEXT: psrlw $4, %xmm2
+; SSE42-NEXT: pand %xmm8, %xmm2
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: movdqa %xmm0, %xmm9
+; SSE42-NEXT: movdqa %xmm0, %xmm4
+; SSE42-NEXT: pshufb %xmm2, %xmm9
+; SSE42-NEXT: pshufb {{.*#+}} xmm1 = xmm1[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
+; SSE42-NEXT: por %xmm3, %xmm9
+; SSE42-NEXT: movdqa %xmm1, %xmm0
+; SSE42-NEXT: psrlw $4, %xmm0
+; SSE42-NEXT: pand %xmm8, %xmm0
+; SSE42-NEXT: pshufb %xmm0, %xmm4
+; SSE42-NEXT: movdqa %xmm4, %xmm0
+; SSE42-NEXT: movdqa %xmm4, %xmm10
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm3
+; SSE42-NEXT: movdqa %xmm9, %xmm2
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: movdqa %xmm9, %xmm6
+; SSE42-NEXT: movdqa %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm0, %xmm4
+; SSE42-NEXT: psrlq $32, %xmm3
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm4, %xmm0
+; SSE42-NEXT: movdqa %xmm10, %xmm4
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE42-NEXT: pmuludq %xmm4, %xmm2
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm2, %xmm4
+; SSE42-NEXT: pxor %xmm0, %xmm4
+; SSE42-NEXT: movdqa %xmm10, %xmm2
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm2
+; SSE42-NEXT: pmuludq %xmm2, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm2
+; SSE42-NEXT: psllq $32, %xmm2
+; SSE42-NEXT: por %xmm5, %xmm2
+; SSE42-NEXT: movdqa %xmm10, %xmm0
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE42-NEXT: pmuludq %xmm0, %xmm6
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm6, %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pxor %xmm2, %xmm0
+; SSE42-NEXT: pxor %xmm4, %xmm0
+; SSE42-NEXT: pand %xmm8, %xmm1
+; SSE42-NEXT: pshufb %xmm1, %xmm11
+; SSE42-NEXT: movdqa %xmm11, %xmm1
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE42-NEXT: pmuludq %xmm1, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm5, %xmm1
+; SSE42-NEXT: movdqa %xmm11, %xmm4
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm4, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm5, %xmm4
+; SSE42-NEXT: pxor %xmm1, %xmm4
+; SSE42-NEXT: movdqa %xmm11, %xmm1
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm1, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm5, %xmm1
+; SSE42-NEXT: pxor %xmm4, %xmm1
+; SSE42-NEXT: pxor %xmm0, %xmm1
+; SSE42-NEXT: movdqa %xmm11, %xmm4
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm0
+; SSE42-NEXT: pmuludq %xmm4, %xmm0
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm0, %xmm4
+; SSE42-NEXT: pxor %xmm1, %xmm4
+; SSE42-NEXT: movdqa %xmm4, %xmm6
+; SSE42-NEXT: movdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [256,256]
+; SSE42-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm10, %xmm0
+; SSE42-NEXT: pand %xmm1, %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm1
+; SSE42-NEXT: pmuludq %xmm0, %xmm1
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm1, %xmm0
+; SSE42-NEXT: movdqa %xmm10, %xmm1
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm1, %xmm4
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm4, %xmm1
+; SSE42-NEXT: pxor %xmm0, %xmm1
+; SSE42-NEXT: movdqa %xmm10, %xmm0
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm0, %xmm4
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm4, %xmm0
+; SSE42-NEXT: pxor %xmm1, %xmm0
+; SSE42-NEXT: movdqa %xmm10, %xmm4
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm1
+; SSE42-NEXT: pmuludq %xmm4, %xmm1
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm1, %xmm4
+; SSE42-NEXT: pxor %xmm0, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [4096,4096]
+; SSE42-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm1
+; SSE42-NEXT: pand %xmm0, %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm0
+; SSE42-NEXT: pmuludq %xmm1, %xmm0
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm0, %xmm1
+; SSE42-NEXT: pxor %xmm4, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [8192,8192]
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm0
+; SSE42-NEXT: pand %xmm2, %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm0, %xmm4
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [16384,16384]
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm4
+; SSE42-NEXT: pand %xmm2, %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm4, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm5, %xmm4
+; SSE42-NEXT: pxor %xmm0, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [32768,32768]
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm0
+; SSE42-NEXT: pand %xmm2, %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm0, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm5, %xmm0
+; SSE42-NEXT: pxor %xmm4, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm15 = [65536,65536]
+; SSE42-NEXT: movdqa %xmm10, %xmm4
+; SSE42-NEXT: pand %xmm15, %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm4, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm5, %xmm4
+; SSE42-NEXT: pxor %xmm0, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm14 = [131072,131072]
+; SSE42-NEXT: movdqa %xmm10, %xmm5
+; SSE42-NEXT: pand %xmm14, %xmm5
+; SSE42-NEXT: movdqa %xmm9, %xmm0
+; SSE42-NEXT: pmuludq %xmm5, %xmm0
+; SSE42-NEXT: pmuludq %xmm3, %xmm5
+; SSE42-NEXT: psllq $32, %xmm5
+; SSE42-NEXT: por %xmm0, %xmm5
+; SSE42-NEXT: pxor %xmm4, %xmm5
+; SSE42-NEXT: movdqa {{.*#+}} xmm13 = [262144,262144]
+; SSE42-NEXT: movdqa %xmm10, %xmm0
+; SSE42-NEXT: pand %xmm13, %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm0, %xmm4
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm4, %xmm0
+; SSE42-NEXT: pxor %xmm5, %xmm0
+; SSE42-NEXT: pxor %xmm6, %xmm1
+; SSE42-NEXT: pxor %xmm1, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm12 = [524288,524288]
+; SSE42-NEXT: movdqa %xmm10, %xmm1
+; SSE42-NEXT: pand %xmm12, %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm1, %xmm4
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm4, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [1048576,1048576]
+; SSE42-NEXT: movdqa %xmm5, (%rsp) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm4
+; SSE42-NEXT: pand %xmm5, %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm4, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm5, %xmm4
+; SSE42-NEXT: pxor %xmm1, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [2097152,2097152]
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm1
+; SSE42-NEXT: pand %xmm2, %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm1, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm5, %xmm1
+; SSE42-NEXT: pxor %xmm4, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [4194304,4194304]
+; SSE42-NEXT: movdqa %xmm5, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm4
+; SSE42-NEXT: pand %xmm5, %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm4, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm5, %xmm4
+; SSE42-NEXT: pxor %xmm1, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [8388608,8388608]
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm1
+; SSE42-NEXT: pand %xmm2, %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm1, %xmm5
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm5, %xmm1
+; SSE42-NEXT: pxor %xmm4, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm2 = [16777216,16777216]
+; SSE42-NEXT: movdqa %xmm10, %xmm6
+; SSE42-NEXT: pand %xmm2, %xmm6
+; SSE42-NEXT: movdqa %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm6, %xmm4
+; SSE42-NEXT: pmuludq %xmm3, %xmm6
+; SSE42-NEXT: psllq $32, %xmm6
+; SSE42-NEXT: por %xmm4, %xmm6
+; SSE42-NEXT: pxor %xmm1, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [33554432,33554432]
+; SSE42-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm10, %xmm4
+; SSE42-NEXT: pand %xmm1, %xmm4
+; SSE42-NEXT: movdqa %xmm9, %xmm1
+; SSE42-NEXT: pmuludq %xmm4, %xmm1
+; SSE42-NEXT: pmuludq %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: por %xmm1, %xmm4
+; SSE42-NEXT: pxor %xmm6, %xmm4
+; SSE42-NEXT: pxor %xmm0, %xmm4
+; SSE42-NEXT: movdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [67108864,67108864]
+; SSE42-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm10, %xmm0
+; SSE42-NEXT: pand %xmm1, %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm1
+; SSE42-NEXT: pmuludq %xmm0, %xmm1
+; SSE42-NEXT: pmuludq %xmm3, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm1, %xmm0
+; SSE42-NEXT: movdqa %xmm10, %xmm1
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm6
+; SSE42-NEXT: pmuludq %xmm1, %xmm6
+; SSE42-NEXT: pmuludq %xmm3, %xmm1
+; SSE42-NEXT: movdqa %xmm3, %xmm4
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm6, %xmm1
+; SSE42-NEXT: pxor %xmm0, %xmm1
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [268435456,268435456]
+; SSE42-NEXT: movdqa %xmm3, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm0
+; SSE42-NEXT: pand %xmm3, %xmm0
+; SSE42-NEXT: movdqa %xmm9, %xmm6
+; SSE42-NEXT: pmuludq %xmm0, %xmm6
+; SSE42-NEXT: pmuludq %xmm4, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: por %xmm6, %xmm0
+; SSE42-NEXT: pxor %xmm1, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [536870912,536870912]
+; SSE42-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm11, %xmm8
+; SSE42-NEXT: pand %xmm1, %xmm8
+; SSE42-NEXT: movdqa %xmm9, %xmm1
+; SSE42-NEXT: pmuludq %xmm8, %xmm1
+; SSE42-NEXT: movdqa %xmm4, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pmuludq %xmm4, %xmm8
+; SSE42-NEXT: psllq $32, %xmm8
+; SSE42-NEXT: por %xmm1, %xmm8
+; SSE42-NEXT: pxor %xmm0, %xmm8
+; SSE42-NEXT: movdqa %xmm11, %xmm1
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1
+; SSE42-NEXT: movdqa %xmm9, %xmm7
+; SSE42-NEXT: pmuludq %xmm1, %xmm7
+; SSE42-NEXT: pmuludq %xmm4, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: por %xmm7, %xmm1
+; SSE42-NEXT: pxor %xmm8, %xmm1
+; SSE42-NEXT: movdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: psrlq $32, %xmm10
+; SSE42-NEXT: movaps {{.*#+}} xmm0 = [1,1]
+; SSE42-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE42-NEXT: pand %xmm10, %xmm0
+; SSE42-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa %xmm10, %xmm8
+; SSE42-NEXT: movdqa {{.*#+}} xmm7 = [2,2]
+; SSE42-NEXT: pand %xmm10, %xmm7
+; SSE42-NEXT: movdqa {{.*#+}} xmm4 = [4,4]
+; SSE42-NEXT: pand %xmm10, %xmm4
+; SSE42-NEXT: movdqa {{.*#+}} xmm5 = [8,8]
+; SSE42-NEXT: pand %xmm10, %xmm5
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE42-NEXT: pand %xmm10, %xmm0
+; SSE42-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [512,512]
+; SSE42-NEXT: pand %xmm10, %xmm3
+; SSE42-NEXT: movdqa {{.*#+}} xmm6 = [1024,1024]
+; SSE42-NEXT: pand %xmm10, %xmm6
+; SSE42-NEXT: movdqa {{.*#+}} xmm10 = [2048,2048]
+; SSE42-NEXT: pand %xmm8, %xmm10
+; SSE42-NEXT: pand %xmm8, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pand %xmm8, %xmm14
+; SSE42-NEXT: movdqa %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pand %xmm8, %xmm13
+; SSE42-NEXT: movdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pand %xmm8, %xmm12
+; SSE42-NEXT: movdqa %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pand %xmm8, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm8, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE42-NEXT: pand %xmm8, %xmm0
+; SSE42-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm8
+; SSE42-NEXT: movdqa %xmm8, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [2147483648,2147483648]
+; SSE42-NEXT: movdqa %xmm11, %xmm8
+; SSE42-NEXT: pand %xmm1, %xmm8
+; SSE42-NEXT: psrlq $32, %xmm11
+; SSE42-NEXT: movdqa {{.*#+}} xmm12 = [16,16]
+; SSE42-NEXT: pand %xmm11, %xmm12
+; SSE42-NEXT: movdqa {{.*#+}} xmm13 = [32,32]
+; SSE42-NEXT: pand %xmm11, %xmm13
+; SSE42-NEXT: movdqa {{.*#+}} xmm14 = [64,64]
+; SSE42-NEXT: pand %xmm11, %xmm14
+; SSE42-NEXT: movdqa {{.*#+}} xmm15 = [128,128]
+; SSE42-NEXT: pand %xmm11, %xmm15
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa (%rsp), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, (%rsp) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm2
+; SSE42-NEXT: movdqa %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE42-NEXT: pand %xmm11, %xmm0
+; SSE42-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [1073741824,1073741824]
+; SSE42-NEXT: pand %xmm11, %xmm0
+; SSE42-NEXT: pand %xmm1, %xmm11
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm1
+; SSE42-NEXT: pmuludq %xmm9, %xmm7
+; SSE42-NEXT: pmuludq %xmm9, %xmm4
+; SSE42-NEXT: pmuludq %xmm9, %xmm5
+; SSE42-NEXT: pmuludq %xmm9, %xmm12
+; SSE42-NEXT: movdqa %xmm12, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pmuludq %xmm9, %xmm13
+; SSE42-NEXT: movdqa %xmm13, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pmuludq %xmm9, %xmm14
+; SSE42-NEXT: movdqa %xmm14, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm2
+; SSE42-NEXT: pmuludq %xmm9, %xmm3
+; SSE42-NEXT: pmuludq %xmm9, %xmm6
+; SSE42-NEXT: pmuludq %xmm9, %xmm10
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm12 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm12
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm14 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm14
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm13 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm13
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa (%rsp), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, (%rsp) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: movdqa %xmm15, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm15 # 16-byte Reload
+; SSE42-NEXT: pmuludq %xmm9, %xmm15
+; SSE42-NEXT: pmuludq %xmm9, %xmm0
+; SSE42-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; SSE42-NEXT: pmuludq %xmm9, %xmm11
+; SSE42-NEXT: pmuludq %xmm8, %xmm9
+; SSE42-NEXT: pmuludq {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
+; SSE42-NEXT: psllq $32, %xmm8
+; SSE42-NEXT: por %xmm9, %xmm8
+; SSE42-NEXT: pxor {{[-0-9]+}}(%r{{[sb]}}p), %xmm8 # 16-byte Folded Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm8, %xmm1
+; SSE42-NEXT: movdqa %xmm1, %xmm8
+; SSE42-NEXT: movdqa %xmm7, %xmm1
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm8, %xmm1
+; SSE42-NEXT: pxor {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Folded Reload
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: psllq $32, %xmm5
+; SSE42-NEXT: pxor %xmm4, %xmm5
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: pxor %xmm5, %xmm4
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm5
+; SSE42-NEXT: pxor %xmm4, %xmm5
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm4 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm4
+; SSE42-NEXT: pxor %xmm5, %xmm4
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm5 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm5
+; SSE42-NEXT: pxor %xmm4, %xmm5
+; SSE42-NEXT: psllq $32, %xmm2
+; SSE42-NEXT: pxor %xmm5, %xmm2
+; SSE42-NEXT: psllq $32, %xmm3
+; SSE42-NEXT: pxor %xmm2, %xmm3
+; SSE42-NEXT: psllq $32, %xmm6
+; SSE42-NEXT: pxor %xmm3, %xmm6
+; SSE42-NEXT: psllq $32, %xmm10
+; SSE42-NEXT: pxor %xmm6, %xmm10
+; SSE42-NEXT: psllq $32, %xmm12
+; SSE42-NEXT: pxor %xmm10, %xmm12
+; SSE42-NEXT: pxor %xmm1, %xmm12
+; SSE42-NEXT: psllq $32, %xmm14
+; SSE42-NEXT: psllq $32, %xmm13
+; SSE42-NEXT: pxor %xmm14, %xmm13
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm13, %xmm1
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm3
+; SSE42-NEXT: pxor %xmm1, %xmm3
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm3, %xmm1
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm3
+; SSE42-NEXT: pxor %xmm1, %xmm3
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm3, %xmm1
+; SSE42-NEXT: movdqa (%rsp), %xmm2 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm2
+; SSE42-NEXT: pxor %xmm1, %xmm2
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm2, %xmm1
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm2
+; SSE42-NEXT: pxor %xmm1, %xmm2
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm2, %xmm1
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm2
+; SSE42-NEXT: pxor %xmm1, %xmm2
+; SSE42-NEXT: pxor %xmm12, %xmm2
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm0, %xmm1
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: pxor %xmm1, %xmm0
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm1
+; SSE42-NEXT: pxor %xmm0, %xmm1
+; SSE42-NEXT: movdqa %xmm15, %xmm0
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: pxor %xmm1, %xmm0
+; SSE42-NEXT: movdqa %xmm0, %xmm1
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Reload
+; SSE42-NEXT: psllq $32, %xmm0
+; SSE42-NEXT: pxor %xmm1, %xmm0
+; SSE42-NEXT: pxor %xmm2, %xmm0
+; SSE42-NEXT: movdqa {{[-0-9]+}}(%r{{[sb]}}p), %xmm1 # 16-byte Reload
+; SSE42-NEXT: psllq $56, %xmm1
+; SSE42-NEXT: psllq $32, %xmm11
+; SSE42-NEXT: pxor %xmm0, %xmm11
+; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[u,u,u,u,3,2],zero,zero,xmm0[u,u,u,u,11,10],zero,zero
+; SSE42-NEXT: por %xmm1, %xmm0
+; SSE42-NEXT: movdqa %xmm11, %xmm1
+; SSE42-NEXT: pshufb {{.*#+}} xmm1 = xmm1[u,u,u,u],zero,zero,xmm1[1],zero,xmm1[u,u,u,u],zero,zero,xmm1[9],zero
+; SSE42-NEXT: por %xmm1, %xmm0
+; SSE42-NEXT: pshufb {{.*#+}} xmm11 = xmm11[7,6,5,4,u,u,u,u,15,14,13,12,u,u,u,u]
+; SSE42-NEXT: pblendw {{.*#+}} xmm11 = xmm11[0,1],xmm0[2,3],xmm11[4,5],xmm0[6,7]
+; SSE42-NEXT: movdqa %xmm11, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; SSE42-NEXT: pand %xmm3, %xmm0
+; SSE42-NEXT: movdqa {{.*#+}} xmm1 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; SSE42-NEXT: pshufb %xmm0, %xmm1
+; SSE42-NEXT: psrlw $4, %xmm11
+; SSE42-NEXT: pand %xmm3, %xmm11
+; SSE42-NEXT: movdqa {{.*#+}} xmm0 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; SSE42-NEXT: pshufb %xmm11, %xmm0
+; SSE42-NEXT: por %xmm1, %xmm0
+; SSE42-NEXT: psrlq $1, %xmm0
+; SSE42-NEXT: addq $312, %rsp # imm = 0x138
+; SSE42-NEXT: retq
+;
+; AVX2-LABEL: clmulh_v2i64:
+; AVX2: # %bb.0:
+; AVX2-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[u,u,u,u,3],zero,zero,zero,xmm0[u,u,u,u,11],zero,zero,zero
+; AVX2-NEXT: vpshufb {{.*#+}} xmm3 = xmm0[u,u,u,u],zero,xmm0[2],zero,zero,xmm0[u,u,u,u],zero,xmm0[10],zero,zero
+; AVX2-NEXT: vpshufb {{.*#+}} xmm4 = xmm0[7,6,5,4,u,u,u,u,15,14,13,12,u,u,u,u]
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u,u,u],zero,zero,xmm0[1,0,u,u,u,u],zero,zero,xmm0[9,8]
+; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm4[0],xmm0[1],xmm4[2],xmm0[3]
+; AVX2-NEXT: vpbroadcastd {{.*#+}} xmm14 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX2-NEXT: vpand %xmm0, %xmm14, %xmm2
+; AVX2-NEXT: vmovdqa {{.*#+}} xmm6 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; AVX2-NEXT: vpshufb %xmm2, %xmm6, %xmm2
+; AVX2-NEXT: vpsrlw $4, %xmm0, %xmm0
+; AVX2-NEXT: vpand %xmm0, %xmm14, %xmm0
+; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; AVX2-NEXT: vpshufb %xmm0, %xmm4, %xmm3
+; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm1[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
+; AVX2-NEXT: vpor %xmm3, %xmm2, %xmm1
+; AVX2-NEXT: vpsrlw $4, %xmm0, %xmm2
+; AVX2-NEXT: vpand %xmm2, %xmm14, %xmm2
+; AVX2-NEXT: vpshufb %xmm2, %xmm4, %xmm7
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpsrlq $32, %xmm1, %xmm11
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm1, %xmm5
+; AVX2-NEXT: vpmuludq %xmm4, %xmm11, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpor %xmm4, %xmm5, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand %xmm0, %xmm14, %xmm0
+; AVX2-NEXT: vpshufb %xmm0, %xmm6, %xmm12
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm0
+; AVX2-NEXT: vpmuludq %xmm0, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm0, %xmm11, %xmm0
+; AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
+; AVX2-NEXT: vpor %xmm0, %xmm3, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm2, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm6
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm0
+; AVX2-NEXT: vpmuludq %xmm0, %xmm1, %xmm2
+; AVX2-NEXT: vpmuludq %xmm0, %xmm11, %xmm0
+; AVX2-NEXT: vpsllq $32, %xmm0, %xmm0
+; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpxor %xmm0, %xmm6, %xmm0
+; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm15 = [33554432,33554432]
+; AVX2-NEXT: vpand %xmm7, %xmm15, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm5
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm13 = [67108864,67108864]
+; AVX2-NEXT: vpand %xmm7, %xmm13, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm3
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm3, %xmm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm10 = [134217728,134217728]
+; AVX2-NEXT: vpand %xmm7, %xmm10, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm9 = [268435456,268435456]
+; AVX2-NEXT: vpand %xmm9, %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm4
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm4, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm8 = [536870912,536870912]
+; AVX2-NEXT: vpand %xmm8, %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm0
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm2, %xmm3
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm4 = [1073741824,1073741824]
+; AVX2-NEXT: vpand %xmm4, %xmm12, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm0
+; AVX2-NEXT: vpmuludq %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm2, %xmm2
+; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm3, %xmm0
+; AVX2-NEXT: vpbroadcastq {{.*#+}} xmm2 = [2147483648,2147483648]
+; AVX2-NEXT: vpand %xmm2, %xmm12, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm11, %xmm11
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm11, %xmm11
+; AVX2-NEXT: vpor %xmm3, %xmm11, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpsrlq $32, %xmm7, %xmm7
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpxor %xmm0, %xmm5, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpsrlq $32, %xmm12, %xmm11
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm7, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpand %xmm7, %xmm15, %xmm3
+; AVX2-NEXT: vpmuludq %xmm3, %xmm1, %xmm3
+; AVX2-NEXT: vpsllq $32, %xmm3, %xmm3
+; AVX2-NEXT: vpand %xmm7, %xmm13, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand %xmm7, %xmm10, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand %xmm9, %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand %xmm8, %xmm11, %xmm5
+; AVX2-NEXT: vpmuludq %xmm5, %xmm1, %xmm5
+; AVX2-NEXT: vpsllq $32, %xmm5, %xmm5
+; AVX2-NEXT: vpxor %xmm5, %xmm3, %xmm3
+; AVX2-NEXT: vpand %xmm4, %xmm11, %xmm4
+; AVX2-NEXT: vpmuludq %xmm4, %xmm1, %xmm4
+; AVX2-NEXT: vpsllq $32, %xmm4, %xmm4
+; AVX2-NEXT: vpxor %xmm4, %xmm3, %xmm3
+; AVX2-NEXT: vpxor %xmm3, %xmm0, %xmm0
+; AVX2-NEXT: vpand %xmm2, %xmm11, %xmm2
+; AVX2-NEXT: vpmuludq %xmm2, %xmm1, %xmm1
+; AVX2-NEXT: vpsllq $56, %xmm6, %xmm2
+; AVX2-NEXT: vpsllq $32, %xmm1, %xmm1
+; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm1
+; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[u,u,u,u,3,2],zero,zero,xmm0[u,u,u,u,11,10],zero,zero
+; AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
+; AVX2-NEXT: vpshufb {{.*#+}} xmm2 = xmm1[u,u,u,u],zero,zero,xmm1[1],zero,xmm1[u,u,u,u],zero,zero,xmm1[9],zero
+; AVX2-NEXT: vpor %xmm2, %xmm0, %xmm0
+; AVX2-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[7,6,5,4,u,u,u,u,15,14,13,12,u,u,u,u]
+; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm1[0],xmm0[1],xmm1[2],xmm0[3]
+; AVX2-NEXT: vpand %xmm0, %xmm14, %xmm1
+; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; AVX2-NEXT: vpshufb %xmm1, %xmm2, %xmm1
+; AVX2-NEXT: vpsrlw $4, %xmm0, %xmm0
+; AVX2-NEXT: vpand %xmm0, %xmm14, %xmm0
+; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; AVX2-NEXT: vpshufb %xmm0, %xmm2, %xmm0
+; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
+; AVX2-NEXT: vpsrlq $1, %xmm0, %xmm0
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: clmulh_v2i64:
+; AVX512: # %bb.0:
+; AVX512-NEXT: vpshufb {{.*#+}} xmm2 = xmm0[u,u,u,u,3],zero,zero,zero,xmm0[u,u,u,u,11],zero,zero,zero
+; AVX512-NEXT: vpshufb {{.*#+}} xmm3 = xmm0[u,u,u,u],zero,xmm0[2],zero,zero,xmm0[u,u,u,u],zero,xmm0[10],zero,zero
+; AVX512-NEXT: vpshufb {{.*#+}} xmm4 = xmm0[u,u,u,u],zero,zero,xmm0[1,0,u,u,u,u],zero,zero,xmm0[9,8]
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 | xmm3 | xmm2
+; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[7,6,5,4,u,u,u,u,15,14,13,12,u,u,u,u]
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3]
+; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm3 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm7 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; AVX512-NEXT: vpand %xmm3, %xmm0, %xmm2
+; AVX512-NEXT: vpshufb %xmm2, %xmm7, %xmm2
+; AVX512-NEXT: vpsrlw $4, %xmm0, %xmm0
+; AVX512-NEXT: vpand %xmm3, %xmm0, %xmm0
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm4 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; AVX512-NEXT: vpshufb %xmm0, %xmm4, %xmm0
+; AVX512-NEXT: vpor %xmm0, %xmm2, %xmm5
+; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm1[7,6,5,4,3,2,1,0,15,14,13,12,11,10,9,8]
+; AVX512-NEXT: vpsrlw $4, %xmm0, %xmm1
+; AVX512-NEXT: vpand %xmm3, %xmm1, %xmm1
+; AVX512-NEXT: vpshufb %xmm1, %xmm4, %xmm6
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm1
+; AVX512-NEXT: vpmullq %xmm1, %xmm5, %xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm1
+; AVX512-NEXT: vpmullq %xmm1, %xmm5, %xmm11
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm1
+; AVX512-NEXT: vpmullq %xmm1, %xmm5, %xmm1
+; AVX512-NEXT: vmovdqa %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm1
+; AVX512-NEXT: vpmullq %xmm1, %xmm5, %xmm8
+; AVX512-NEXT: vpand %xmm3, %xmm0, %xmm0
+; AVX512-NEXT: vpshufb %xmm0, %xmm7, %xmm1
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm0
+; AVX512-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm12
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm14
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm7
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm18
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm16
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm15
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm19
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm17
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm21
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm20
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm23
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm22
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm25
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm24
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm27
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm26
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm29
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm28
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm31
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm30
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm13
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm4
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm10
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm9
+; AVX512-NEXT: vpmullq %xmm9, %xmm5, %xmm9
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpxor %xmm2, %xmm11, %xmm11
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm0
+; AVX512-NEXT: vpternlogq $150, {{[-0-9]+}}(%r{{[sb]}}p), %xmm11, %xmm8 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm8 = xmm8 ^ xmm11 ^ mem
+; AVX512-NEXT: vpmullq %xmm0, %xmm5, %xmm0
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm11
+; AVX512-NEXT: vpternlogq $150, {{[-0-9]+}}(%r{{[sb]}}p), %xmm8, %xmm12 # 16-byte Folded Reload
+; AVX512-NEXT: # xmm12 = xmm12 ^ xmm8 ^ mem
+; AVX512-NEXT: vpmullq %xmm11, %xmm5, %xmm8
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm11
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm7 = xmm7 ^ xmm12 ^ xmm14
+; AVX512-NEXT: vpmullq %xmm11, %xmm5, %xmm11
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm12
+; AVX512-NEXT: vpxorq %xmm18, %xmm7, %xmm14
+; AVX512-NEXT: vpmullq %xmm12, %xmm5, %xmm12
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm18
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm15 = xmm15 ^ xmm14 ^ xmm16
+; AVX512-NEXT: vpmullq %xmm18, %xmm5, %xmm14
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm16
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm17 = xmm17 ^ xmm15 ^ xmm19
+; AVX512-NEXT: vpmullq %xmm16, %xmm5, %xmm15
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm16
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm20 = xmm20 ^ xmm17 ^ xmm21
+; AVX512-NEXT: vpmullq %xmm16, %xmm5, %xmm16
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm17
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm22 = xmm22 ^ xmm20 ^ xmm23
+; AVX512-NEXT: vpmullq %xmm17, %xmm5, %xmm17
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm18
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm24 = xmm24 ^ xmm22 ^ xmm25
+; AVX512-NEXT: vpmullq %xmm18, %xmm5, %xmm18
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm19
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm26 = xmm26 ^ xmm24 ^ xmm27
+; AVX512-NEXT: vpmullq %xmm19, %xmm5, %xmm19
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm20
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm28 = xmm28 ^ xmm26 ^ xmm29
+; AVX512-NEXT: vpmullq %xmm20, %xmm5, %xmm20
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm21
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm30 = xmm30 ^ xmm28 ^ xmm31
+; AVX512-NEXT: vpmullq %xmm21, %xmm5, %xmm21
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm22
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 ^ xmm30 ^ xmm13
+; AVX512-NEXT: vpmullq %xmm22, %xmm5, %xmm13
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm22
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm4 ^ xmm10
+; AVX512-NEXT: vpmullq %xmm22, %xmm5, %xmm4
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm10
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm2 = xmm2 ^ xmm3 ^ xmm9
+; AVX512-NEXT: vpmullq %xmm10, %xmm5, %xmm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm9
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm8 = xmm8 ^ xmm2 ^ xmm0
+; AVX512-NEXT: vpmullq %xmm9, %xmm5, %xmm0
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm12 = xmm12 ^ xmm8 ^ xmm11
+; AVX512-NEXT: vpmullq %xmm2, %xmm5, %xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm8
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm15 = xmm15 ^ xmm12 ^ xmm14
+; AVX512-NEXT: vpmullq %xmm8, %xmm5, %xmm8
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm9
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm17 = xmm17 ^ xmm15 ^ xmm16
+; AVX512-NEXT: vpmullq %xmm9, %xmm5, %xmm9
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm10
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm19 = xmm19 ^ xmm17 ^ xmm18
+; AVX512-NEXT: vpmullq %xmm10, %xmm5, %xmm10
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm11
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm21 = xmm21 ^ xmm19 ^ xmm20
+; AVX512-NEXT: vpmullq %xmm11, %xmm5, %xmm11
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm12
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 ^ xmm21 ^ xmm13
+; AVX512-NEXT: vpmullq %xmm12, %xmm5, %xmm12
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm13
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ xmm4 ^ xmm3
+; AVX512-NEXT: vpmullq %xmm13, %xmm5, %xmm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm8 = xmm8 ^ xmm0 ^ xmm2
+; AVX512-NEXT: vpmullq %xmm4, %xmm5, %xmm0
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm10 = xmm10 ^ xmm8 ^ xmm9
+; AVX512-NEXT: vpmullq %xmm2, %xmm5, %xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm4
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm12 = xmm12 ^ xmm10 ^ xmm11
+; AVX512-NEXT: vpmullq %xmm4, %xmm5, %xmm4
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm8
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ xmm12 ^ xmm3
+; AVX512-NEXT: vpmullq %xmm8, %xmm5, %xmm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm8
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm4 = xmm4 ^ xmm0 ^ xmm2
+; AVX512-NEXT: vpmullq %xmm8, %xmm5, %xmm0
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm6, %xmm2
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm0 = xmm0 ^ xmm4 ^ xmm3
+; AVX512-NEXT: vpmullq %xmm2, %xmm5, %xmm2
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm3
+; AVX512-NEXT: vpsllq $56, %xmm7, %xmm4
+; AVX512-NEXT: vpmullq %xmm3, %xmm5, %xmm3
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm6
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm3 = xmm3 ^ xmm0 ^ xmm2
+; AVX512-NEXT: vpmullq %xmm6, %xmm5, %xmm0
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm2
+; AVX512-NEXT: vpmullq %xmm2, %xmm5, %xmm2
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm2 = xmm2 ^ xmm3 ^ xmm0
+; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm2[u,u,u,u,3,2],zero,zero,xmm2[u,u,u,u,11,10],zero,zero
+; AVX512-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to2}, %xmm1, %xmm1
+; AVX512-NEXT: vpmullq %xmm1, %xmm5, %xmm1
+; AVX512-NEXT: vpxor %xmm1, %xmm2, %xmm1
+; AVX512-NEXT: vpshufb {{.*#+}} xmm2 = xmm1[u,u,u,u],zero,zero,xmm1[1],zero,xmm1[u,u,u,u],zero,zero,xmm1[9],zero
+; AVX512-NEXT: vpternlogq {{.*#+}} xmm2 = xmm2 | xmm4 | xmm0
+; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm1[7,6,5,4,u,u,u,u,15,14,13,12,u,u,u,u]
+; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3]
+; AVX512-NEXT: vpbroadcastd {{.*#+}} xmm2 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15]
+; AVX512-NEXT: vpand %xmm2, %xmm0, %xmm1
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm3 = [0,128,64,192,32,160,96,224,16,144,80,208,48,176,112,240]
+; AVX512-NEXT: vpshufb %xmm1, %xmm3, %xmm1
+; AVX512-NEXT: vpsrlw $4, %xmm0, %xmm0
+; AVX512-NEXT: vpand %xmm2, %xmm0, %xmm0
+; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [0,8,4,12,2,10,6,14,1,9,5,13,3,11,7,15]
+; AVX512-NEXT: vpshufb %xmm0, %xmm2, %xmm0
+; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
+; AVX512-NEXT: vpsrlq $1, %xmm0, %xmm0
+; AVX512-NEXT: retq
+ %a.ext = zext <2 x i64> %a to <2 x i128>
+ %b.ext = zext <2 x i64> %b to <2 x i128>
+ %clmul = call <2 x i128> @llvm.clmul.v2i128(<2 x i128> %a.ext, <2 x i128> %b.ext)
+ %res.ext = lshr <2 x i128> %clmul, splat (i128 64)
+ %res = trunc <2 x i128> %res.ext to <2 x i64>
+ ret <2 x i64> %res
+}
+;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
+; AVX: {{.*}}
diff --git a/llvm/test/CodeGen/X86/clmul.ll b/llvm/test/CodeGen/X86/clmul.ll
new file mode 100644
index 0000000000000..c57c827080814
--- /dev/null
+++ b/llvm/test/CodeGen/X86/clmul.ll
@@ -0,0 +1,1868 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v2 | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,AVX
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,AVX
+
+define i8 @clmul_i8(i8 %a, i8 %b) nounwind {
+; CHECK-LABEL: clmul_i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andb $1, %dl
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andb $2, %cl
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %cl
+; CHECK-NEXT: movl %eax, %ecx
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %dl
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: xorb %cl, %dl
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andb $4, %cl
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %cl
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andb $8, %cl
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %cl
+; CHECK-NEXT: movl %eax, %ecx
+; CHECK-NEXT: xorb %r8b, %cl
+; CHECK-NEXT: xorb %dl, %cl
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andb $16, %dl
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %dl
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andb $32, %r8b
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %r8b
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: movl %esi, %r9d
+; CHECK-NEXT: andb $64, %r9b
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %r9b
+; CHECK-NEXT: movl %eax, %r9d
+; CHECK-NEXT: xorb %dl, %r8b
+; CHECK-NEXT: xorb %r8b, %r9b
+; CHECK-NEXT: xorb %cl, %r9b
+; CHECK-NEXT: andb $-128, %sil
+; CHECK-NEXT: movl %edi, %eax
+; CHECK-NEXT: mulb %sil
+; CHECK-NEXT: xorb %r9b, %al
+; CHECK-NEXT: retq
+ %res = call i8 @llvm.clmul.i8(i8 %a, i8 %b)
+ ret i8 %res
+}
+
+define i16 @clmul_i16(i16 %a, i16 %b) nounwind {
+; CHECK-LABEL: clmul_i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $2, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $1, %ecx
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %eax, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $4, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $8, %edx
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $16, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $32, %ecx
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %eax, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $64, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: xorl %edx, %eax
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $128, %ecx
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $256, %edx # imm = 0x100
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $512, %r8d # imm = 0x200
+; CHECK-NEXT: imull %edi, %r8d
+; CHECK-NEXT: xorl %edx, %r8d
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $1024, %ecx # imm = 0x400
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %r8d, %ecx
+; CHECK-NEXT: xorl %eax, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $2048, %eax # imm = 0x800
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $4096, %edx # imm = 0x1000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %eax, %edx
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $8192, %r8d # imm = 0x2000
+; CHECK-NEXT: imull %edi, %r8d
+; CHECK-NEXT: xorl %edx, %r8d
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $16384, %eax # imm = 0x4000
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: xorl %r8d, %eax
+; CHECK-NEXT: andl $-32768, %esi # imm = 0x8000
+; CHECK-NEXT: imull %edi, %esi
+; CHECK-NEXT: xorl %esi, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT: retq
+ %res = call i16 @llvm.clmul.i16(i16 %a, i16 %b)
+ ret i16 %res
+}
+
+define i32 @clmul_i32(i32 %a, i32 %b) nounwind {
+; CHECK-LABEL: clmul_i32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $2, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $1, %ecx
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %eax, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $4, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $8, %edx
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $16, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $32, %r8d
+; CHECK-NEXT: imull %edi, %r8d
+; CHECK-NEXT: xorl %eax, %r8d
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $64, %ecx
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %r8d, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $128, %eax
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $256, %edx # imm = 0x100
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %eax, %edx
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $512, %r8d # imm = 0x200
+; CHECK-NEXT: imull %edi, %r8d
+; CHECK-NEXT: xorl %edx, %r8d
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $1024, %eax # imm = 0x400
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: xorl %r8d, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $2048, %ecx # imm = 0x800
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $4096, %edx # imm = 0x1000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $8192, %ecx # imm = 0x2000
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $16384, %edx # imm = 0x4000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $32768, %ecx # imm = 0x8000
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: xorl %eax, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $65536, %eax # imm = 0x10000
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $131072, %edx # imm = 0x20000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %eax, %edx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $262144, %eax # imm = 0x40000
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: xorl %edx, %eax
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $524288, %edx # imm = 0x80000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %eax, %edx
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $1048576, %r8d # imm = 0x100000
+; CHECK-NEXT: imull %edi, %r8d
+; CHECK-NEXT: xorl %edx, %r8d
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $2097152, %eax # imm = 0x200000
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: xorl %r8d, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $4194304, %ecx # imm = 0x400000
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $8388608, %edx # imm = 0x800000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $16777216, %ecx # imm = 0x1000000
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $33554432, %edx # imm = 0x2000000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $67108864, %ecx # imm = 0x4000000
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $134217728, %edx # imm = 0x8000000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $268435456, %ecx # imm = 0x10000000
+; CHECK-NEXT: imull %edi, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: xorl %eax, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $536870912, %edx # imm = 0x20000000
+; CHECK-NEXT: imull %edi, %edx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: andl $1073741824, %eax # imm = 0x40000000
+; CHECK-NEXT: imull %edi, %eax
+; CHECK-NEXT: xorl %edx, %eax
+; CHECK-NEXT: andl $-2147483648, %esi # imm = 0x80000000
+; CHECK-NEXT: imull %edi, %esi
+; CHECK-NEXT: xorl %esi, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: retq
+ %res = call i32 @llvm.clmul.i32(i32 %a, i32 %b)
+ ret i32 %res
+}
+
+define i64 @clmul_i64(i64 %a, i64 %b) nounwind {
+; CHECK-LABEL: clmul_i64:
+; CHECK: # %bb.0:
+; CHECK-NEXT: pushq %rbp
+; CHECK-NEXT: pushq %r15
+; CHECK-NEXT: pushq %r14
+; CHECK-NEXT: pushq %r13
+; CHECK-NEXT: pushq %r12
+; CHECK-NEXT: pushq %rbx
+; CHECK-NEXT: subq $40, %rsp
+; CHECK-NEXT: movl %esi, %r10d
+; CHECK-NEXT: movl %esi, %r15d
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: movl %esi, %r13d
+; CHECK-NEXT: movl %esi, %r12d
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: movl %esi, %ebp
+; CHECK-NEXT: movl %esi, %r9d
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: movl %esi, %r11d
+; CHECK-NEXT: movl %esi, %ebx
+; CHECK-NEXT: movl %esi, %r14d
+; CHECK-NEXT: andl $2, %r14d
+; CHECK-NEXT: imulq %rdi, %r14
+; CHECK-NEXT: andl $1, %r10d
+; CHECK-NEXT: imulq %rdi, %r10
+; CHECK-NEXT: xorq %r14, %r10
+; CHECK-NEXT: movl %esi, %r14d
+; CHECK-NEXT: andl $4, %r15d
+; CHECK-NEXT: imulq %rdi, %r15
+; CHECK-NEXT: andl $8, %eax
+; CHECK-NEXT: imulq %rdi, %rax
+; CHECK-NEXT: xorq %r15, %rax
+; CHECK-NEXT: movl %esi, %r15d
+; CHECK-NEXT: xorq %r10, %rax
+; CHECK-NEXT: movl %esi, %r10d
+; CHECK-NEXT: andl $16, %r13d
+; CHECK-NEXT: imulq %rdi, %r13
+; CHECK-NEXT: andl $32, %r12d
+; CHECK-NEXT: imulq %rdi, %r12
+; CHECK-NEXT: xorq %r13, %r12
+; CHECK-NEXT: movl %esi, %r13d
+; CHECK-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: andl $64, %r8d
+; CHECK-NEXT: imulq %rdi, %r8
+; CHECK-NEXT: xorq %r12, %r8
+; CHECK-NEXT: xorq %rax, %r8
+; CHECK-NEXT: movl %esi, %r12d
+; CHECK-NEXT: andl $128, %ebp
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: andl $256, %r9d # imm = 0x100
+; CHECK-NEXT: imulq %rdi, %r9
+; CHECK-NEXT: xorq %rbp, %r9
+; CHECK-NEXT: movl %esi, %ebp
+; CHECK-NEXT: andl $512, %ecx # imm = 0x200
+; CHECK-NEXT: imulq %rdi, %rcx
+; CHECK-NEXT: xorq %r9, %rcx
+; CHECK-NEXT: movl %esi, %r9d
+; CHECK-NEXT: andl $1024, %edx # imm = 0x400
+; CHECK-NEXT: imulq %rdi, %rdx
+; CHECK-NEXT: xorq %rcx, %rdx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: xorq %r8, %rdx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: andl $2048, %r11d # imm = 0x800
+; CHECK-NEXT: imulq %rdi, %r11
+; CHECK-NEXT: andl $4096, %ebx # imm = 0x1000
+; CHECK-NEXT: imulq %rdi, %rbx
+; CHECK-NEXT: xorq %r11, %rbx
+; CHECK-NEXT: movl %esi, %r11d
+; CHECK-NEXT: andl $8192, %r14d # imm = 0x2000
+; CHECK-NEXT: imulq %rdi, %r14
+; CHECK-NEXT: xorq %rbx, %r14
+; CHECK-NEXT: movl %esi, %ebx
+; CHECK-NEXT: andl $16384, %r15d # imm = 0x4000
+; CHECK-NEXT: imulq %rdi, %r15
+; CHECK-NEXT: xorq %r14, %r15
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $32768, %r10d # imm = 0x8000
+; CHECK-NEXT: imulq %rdi, %r10
+; CHECK-NEXT: xorq %r15, %r10
+; CHECK-NEXT: movl %esi, %r14d
+; CHECK-NEXT: xorq %rdx, %r10
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload
+; CHECK-NEXT: andl $65536, %ecx # imm = 0x10000
+; CHECK-NEXT: imulq %rdi, %rcx
+; CHECK-NEXT: andl $131072, %r13d # imm = 0x20000
+; CHECK-NEXT: imulq %rdi, %r13
+; CHECK-NEXT: xorq %rcx, %r13
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $262144, %r12d # imm = 0x40000
+; CHECK-NEXT: imulq %rdi, %r12
+; CHECK-NEXT: xorq %r13, %r12
+; CHECK-NEXT: movl %esi, %r15d
+; CHECK-NEXT: andl $524288, %ebp # imm = 0x80000
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %r12, %rbp
+; CHECK-NEXT: movl %esi, %r12d
+; CHECK-NEXT: andl $1048576, %r9d # imm = 0x100000
+; CHECK-NEXT: imulq %rdi, %r9
+; CHECK-NEXT: xorq %rbp, %r9
+; CHECK-NEXT: movabsq $4294967296, %rbp # imm = 0x100000000
+; CHECK-NEXT: andq %rsi, %rbp
+; CHECK-NEXT: andl $2097152, %eax # imm = 0x200000
+; CHECK-NEXT: imulq %rdi, %rax
+; CHECK-NEXT: xorq %r9, %rax
+; CHECK-NEXT: movabsq $8589934592, %r9 # imm = 0x200000000
+; CHECK-NEXT: andq %rsi, %r9
+; CHECK-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: xorq %r10, %rax
+; CHECK-NEXT: movabsq $17179869184, %r9 # imm = 0x400000000
+; CHECK-NEXT: andq %rsi, %r9
+; CHECK-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload
+; CHECK-NEXT: andl $4194304, %r9d # imm = 0x400000
+; CHECK-NEXT: imulq %rdi, %r9
+; CHECK-NEXT: andl $8388608, %r11d # imm = 0x800000
+; CHECK-NEXT: imulq %rdi, %r11
+; CHECK-NEXT: xorq %r9, %r11
+; CHECK-NEXT: movabsq $34359738368, %r9 # imm = 0x800000000
+; CHECK-NEXT: andq %rsi, %r9
+; CHECK-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: andl $16777216, %ebx # imm = 0x1000000
+; CHECK-NEXT: imulq %rdi, %rbx
+; CHECK-NEXT: xorq %r11, %rbx
+; CHECK-NEXT: movabsq $68719476736, %r9 # imm = 0x1000000000
+; CHECK-NEXT: andq %rsi, %r9
+; CHECK-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: andl $33554432, %r8d # imm = 0x2000000
+; CHECK-NEXT: imulq %rdi, %r8
+; CHECK-NEXT: xorq %rbx, %r8
+; CHECK-NEXT: movabsq $137438953472, %r9 # imm = 0x2000000000
+; CHECK-NEXT: andq %rsi, %r9
+; CHECK-NEXT: movq %r9, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: andl $67108864, %r14d # imm = 0x4000000
+; CHECK-NEXT: imulq %rdi, %r14
+; CHECK-NEXT: xorq %r8, %r14
+; CHECK-NEXT: movabsq $274877906944, %r8 # imm = 0x4000000000
+; CHECK-NEXT: andq %rsi, %r8
+; CHECK-NEXT: movq %r8, (%rsp) # 8-byte Spill
+; CHECK-NEXT: andl $134217728, %edx # imm = 0x8000000
+; CHECK-NEXT: imulq %rdi, %rdx
+; CHECK-NEXT: xorq %r14, %rdx
+; CHECK-NEXT: movabsq $549755813888, %r8 # imm = 0x8000000000
+; CHECK-NEXT: andq %rsi, %r8
+; CHECK-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movq %rcx, %r13
+; CHECK-NEXT: andl $268435456, %r13d # imm = 0x10000000
+; CHECK-NEXT: imulq %rdi, %r13
+; CHECK-NEXT: xorq %rdx, %r13
+; CHECK-NEXT: movabsq $1099511627776, %rcx # imm = 0x10000000000
+; CHECK-NEXT: andq %rsi, %rcx
+; CHECK-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: xorq %rax, %r13
+; CHECK-NEXT: movabsq $2199023255552, %rax # imm = 0x20000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: andl $536870912, %r15d # imm = 0x20000000
+; CHECK-NEXT: imulq %rdi, %r15
+; CHECK-NEXT: andl $1073741824, %r12d # imm = 0x40000000
+; CHECK-NEXT: imulq %rdi, %r12
+; CHECK-NEXT: xorq %r15, %r12
+; CHECK-NEXT: movq %r12, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $4398046511104, %rax # imm = 0x40000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $8796093022208, %rax # imm = 0x80000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $17592186044416, %rax # imm = 0x100000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $35184372088832, %rax # imm = 0x200000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $70368744177664, %rax # imm = 0x400000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $140737488355328, %rax # imm = 0x800000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $281474976710656, %rax # imm = 0x1000000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $562949953421312, %rax # imm = 0x2000000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $1125899906842624, %rax # imm = 0x4000000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $2251799813685248, %rax # imm = 0x8000000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $4503599627370496, %r12 # imm = 0x10000000000000
+; CHECK-NEXT: andq %rsi, %r12
+; CHECK-NEXT: movabsq $9007199254740992, %r14 # imm = 0x20000000000000
+; CHECK-NEXT: andq %rsi, %r14
+; CHECK-NEXT: movabsq $18014398509481984, %rax # imm = 0x40000000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; CHECK-NEXT: movabsq $36028797018963968, %r15 # imm = 0x80000000000000
+; CHECK-NEXT: andq %rsi, %r15
+; CHECK-NEXT: movabsq $72057594037927936, %rbx # imm = 0x100000000000000
+; CHECK-NEXT: andq %rsi, %rbx
+; CHECK-NEXT: movabsq $144115188075855872, %r11 # imm = 0x200000000000000
+; CHECK-NEXT: andq %rsi, %r11
+; CHECK-NEXT: movabsq $288230376151711744, %r10 # imm = 0x400000000000000
+; CHECK-NEXT: andq %rsi, %r10
+; CHECK-NEXT: movabsq $576460752303423488, %r9 # imm = 0x800000000000000
+; CHECK-NEXT: andq %rsi, %r9
+; CHECK-NEXT: movabsq $1152921504606846976, %r8 # imm = 0x1000000000000000
+; CHECK-NEXT: andq %rsi, %r8
+; CHECK-NEXT: movabsq $2305843009213693952, %rdx # imm = 0x2000000000000000
+; CHECK-NEXT: andq %rsi, %rdx
+; CHECK-NEXT: movabsq $4611686018427387904, %rcx # imm = 0x4000000000000000
+; CHECK-NEXT: andq %rsi, %rcx
+; CHECK-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
+; CHECK-NEXT: andq %rsi, %rax
+; CHECK-NEXT: # kill: def $esi killed $esi killed $rsi def $rsi
+; CHECK-NEXT: andl $-2147483648, %esi # imm = 0x80000000
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: xorq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %rsi, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: xorq %rbp, %rsi
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %rsi, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: xorq %rbp, %rsi
+; CHECK-NEXT: movq %rsi, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: xorq %rbp, %rsi
+; CHECK-NEXT: xorq %r13, %rsi
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: movq (%rsp), %r13 # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %r13
+; CHECK-NEXT: xorq %rbp, %r13
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %r13, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %r13
+; CHECK-NEXT: xorq %rbp, %r13
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %r13, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %r13
+; CHECK-NEXT: xorq %rbp, %r13
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %r13, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %r13
+; CHECK-NEXT: xorq %rbp, %r13
+; CHECK-NEXT: xorq %rsi, %r13
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %rsi, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: xorq %rbp, %rsi
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %rsi, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: xorq %rbp, %rsi
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rbp
+; CHECK-NEXT: xorq %rsi, %rbp
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: xorq %rbp, %rsi
+; CHECK-NEXT: imulq %rdi, %r12
+; CHECK-NEXT: xorq %rsi, %r12
+; CHECK-NEXT: imulq %rdi, %r14
+; CHECK-NEXT: xorq %r12, %r14
+; CHECK-NEXT: xorq %r13, %r14
+; CHECK-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; CHECK-NEXT: imulq %rdi, %rsi
+; CHECK-NEXT: imulq %rdi, %r15
+; CHECK-NEXT: xorq %rsi, %r15
+; CHECK-NEXT: imulq %rdi, %rbx
+; CHECK-NEXT: xorq %r15, %rbx
+; CHECK-NEXT: imulq %rdi, %r11
+; CHECK-NEXT: xorq %rbx, %r11
+; CHECK-NEXT: imulq %rdi, %r10
+; CHECK-NEXT: xorq %r11, %r10
+; CHECK-NEXT: imulq %rdi, %r9
+; CHECK-NEXT: xorq %r10, %r9
+; CHECK-NEXT: imulq %rdi, %r8
+; CHECK-NEXT: xorq %r9, %r8
+; CHECK-NEXT: imulq %rdi, %rdx
+; CHECK-NEXT: xorq %r8, %rdx
+; CHECK-NEXT: imulq %rdi, %rcx
+; CHECK-NEXT: xorq %rdx, %rcx
+; CHECK-NEXT: imulq %rdi, %rax
+; CHECK-NEXT: xorq %rcx, %rax
+; CHECK-NEXT: xorq %r14, %rax
+; CHECK-NEXT: addq $40, %rsp
+; CHECK-NEXT: popq %rbx
+; CHECK-NEXT: popq %r12
+; CHECK-NEXT: popq %r13
+; CHECK-NEXT: popq %r14
+; CHECK-NEXT: popq %r15
+; CHECK-NEXT: popq %rbp
+; CHECK-NEXT: retq
+ %res = call i64 @llvm.clmul.i64(i64 %a, i64 %b)
+ ret i64 %res
+}
+
+define i8 @clmulr_i8(i8 %a, i8 %b) nounwind {
+; CHECK-LABEL: clmulr_i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $2, %ecx
+; CHECK-NEXT: movzbl %dil, %eax
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $1, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $4, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $8, %edi
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %ecx, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $16, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $32, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $64, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: xorl %edi, %ecx
+; CHECK-NEXT: andl $128, %esi
+; CHECK-NEXT: imull %esi, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: shrl $7, %eax
+; CHECK-NEXT: # kill: def $al killed $al killed $eax
+; CHECK-NEXT: retq
+ %a.ext = zext i8 %a to i16
+ %b.ext = zext i8 %b to i16
+ %clmul = call i16 @llvm.clmul.i16(i16 %a.ext, i16 %b.ext)
+ %res.ext = lshr i16 %clmul, 7
+ %res = trunc i16 %res.ext to i8
+ ret i8 %res
+}
+
+define i16 @clmulr_i16(i16 %a, i16 %b) nounwind {
+; CHECK-LABEL: clmulr_i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $2, %ecx
+; CHECK-NEXT: movzwl %di, %eax
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $1, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $4, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $8, %edi
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %ecx, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $16, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $32, %r8d
+; CHECK-NEXT: imull %eax, %r8d
+; CHECK-NEXT: xorl %ecx, %r8d
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $64, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %r8d, %edx
+; CHECK-NEXT: xorl %edi, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $128, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $256, %edi # imm = 0x100
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %ecx, %edi
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $512, %r8d # imm = 0x200
+; CHECK-NEXT: imull %eax, %r8d
+; CHECK-NEXT: xorl %edi, %r8d
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $1024, %ecx # imm = 0x400
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: xorl %r8d, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $2048, %edx # imm = 0x800
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $4096, %edi # imm = 0x1000
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $8192, %edx # imm = 0x2000
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %edi, %edx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $16384, %edi # imm = 0x4000
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: andl $32768, %esi # imm = 0x8000
+; CHECK-NEXT: imull %esi, %eax
+; CHECK-NEXT: xorl %edi, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: shrl $15, %eax
+; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT: retq
+ %a.ext = zext i16 %a to i32
+ %b.ext = zext i16 %b to i32
+ %clmul = call i32 @llvm.clmul.i32(i32 %a.ext, i32 %b.ext)
+ %res.ext = lshr i32 %clmul, 15
+ %res = trunc i32 %res.ext to i16
+ ret i16 %res
+}
+
+define i32 @clmulr_i32(i32 %a, i32 %b) nounwind {
+; CHECK-LABEL: clmulr_i32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %edi, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $2, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $1, %esi
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdx, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $4, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $8, %edi
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $16, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: andl $32, %r8d
+; CHECK-NEXT: imulq %rcx, %r8
+; CHECK-NEXT: xorq %rdx, %r8
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $64, %esi
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %r8, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $128, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $256, %edi # imm = 0x100
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: andl $512, %r8d # imm = 0x200
+; CHECK-NEXT: imulq %rcx, %r8
+; CHECK-NEXT: xorq %rdi, %r8
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $1024, %edx # imm = 0x400
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: xorq %r8, %rdx
+; CHECK-NEXT: xorq %rsi, %rdx
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $2048, %esi # imm = 0x800
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $4096, %edi # imm = 0x1000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $8192, %esi # imm = 0x2000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $16384, %edi # imm = 0x4000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $32768, %esi # imm = 0x8000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: xorq %rdx, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $65536, %edx # imm = 0x10000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $131072, %edi # imm = 0x20000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $262144, %edx # imm = 0x40000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: xorq %rdi, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $524288, %edi # imm = 0x80000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: andl $1048576, %r8d # imm = 0x100000
+; CHECK-NEXT: imulq %rcx, %r8
+; CHECK-NEXT: xorq %rdi, %r8
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $2097152, %edx # imm = 0x200000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: xorq %r8, %rdx
+; CHECK-NEXT: xorq %rsi, %rdx
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $4194304, %esi # imm = 0x400000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $8388608, %edi # imm = 0x800000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $16777216, %esi # imm = 0x1000000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $33554432, %edi # imm = 0x2000000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $67108864, %esi # imm = 0x4000000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $134217728, %edi # imm = 0x8000000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $268435456, %esi # imm = 0x10000000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: xorq %rdx, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $536870912, %edx # imm = 0x20000000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $1073741824, %edi # imm = 0x40000000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: andl $-2147483648, %eax # imm = 0x80000000
+; CHECK-NEXT: imulq %rcx, %rax
+; CHECK-NEXT: xorq %rdi, %rax
+; CHECK-NEXT: xorq %rsi, %rax
+; CHECK-NEXT: shrq $31, %rax
+; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
+; CHECK-NEXT: retq
+ %a.ext = zext i32 %a to i64
+ %b.ext = zext i32 %b to i64
+ %clmul = call i64 @llvm.clmul.i64(i64 %a.ext, i64 %b.ext)
+ %res.ext = lshr i64 %clmul, 31
+ %res = trunc i64 %res.ext to i32
+ ret i32 %res
+}
+
+define i8 @clmulh_i8(i8 %a, i8 %b) nounwind {
+; CHECK-LABEL: clmulh_i8:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $2, %ecx
+; CHECK-NEXT: movzbl %dil, %eax
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $1, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $4, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $8, %edi
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %ecx, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $16, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $32, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $64, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: xorl %edi, %ecx
+; CHECK-NEXT: andl $128, %esi
+; CHECK-NEXT: imull %esi, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: shrl $8, %eax
+; CHECK-NEXT: # kill: def $al killed $al killed $eax
+; CHECK-NEXT: retq
+ %a.ext = zext i8 %a to i16
+ %b.ext = zext i8 %b to i16
+ %clmul = call i16 @llvm.clmul.i16(i16 %a.ext, i16 %b.ext)
+ %res.ext = lshr i16 %clmul, 8
+ %res = trunc i16 %res.ext to i8
+ ret i8 %res
+}
+
+define i16 @clmulh_i16(i16 %a, i16 %b) nounwind {
+; CHECK-LABEL: clmulh_i16:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $2, %ecx
+; CHECK-NEXT: movzwl %di, %eax
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $1, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %ecx, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $4, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $8, %edi
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %ecx, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $16, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $32, %r8d
+; CHECK-NEXT: imull %eax, %r8d
+; CHECK-NEXT: xorl %ecx, %r8d
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $64, %edx
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %r8d, %edx
+; CHECK-NEXT: xorl %edi, %edx
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $128, %ecx
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $256, %edi # imm = 0x100
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %ecx, %edi
+; CHECK-NEXT: movl %esi, %r8d
+; CHECK-NEXT: andl $512, %r8d # imm = 0x200
+; CHECK-NEXT: imull %eax, %r8d
+; CHECK-NEXT: xorl %edi, %r8d
+; CHECK-NEXT: movl %esi, %ecx
+; CHECK-NEXT: andl $1024, %ecx # imm = 0x400
+; CHECK-NEXT: imull %eax, %ecx
+; CHECK-NEXT: xorl %r8d, %ecx
+; CHECK-NEXT: xorl %edx, %ecx
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $2048, %edx # imm = 0x800
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $4096, %edi # imm = 0x1000
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: movl %esi, %edx
+; CHECK-NEXT: andl $8192, %edx # imm = 0x2000
+; CHECK-NEXT: imull %eax, %edx
+; CHECK-NEXT: xorl %edi, %edx
+; CHECK-NEXT: movl %esi, %edi
+; CHECK-NEXT: andl $16384, %edi # imm = 0x4000
+; CHECK-NEXT: imull %eax, %edi
+; CHECK-NEXT: xorl %edx, %edi
+; CHECK-NEXT: andl $32768, %esi # imm = 0x8000
+; CHECK-NEXT: imull %esi, %eax
+; CHECK-NEXT: xorl %edi, %eax
+; CHECK-NEXT: xorl %ecx, %eax
+; CHECK-NEXT: shrl $16, %eax
+; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT: retq
+ %a.ext = zext i16 %a to i32
+ %b.ext = zext i16 %b to i32
+ %clmul = call i32 @llvm.clmul.i32(i32 %a.ext, i32 %b.ext)
+ %res.ext = lshr i32 %clmul, 16
+ %res = trunc i32 %res.ext to i16
+ ret i16 %res
+}
+
+define i32 @clmulh_i32(i32 %a, i32 %b) nounwind {
+; CHECK-LABEL: clmulh_i32:
+; CHECK: # %bb.0:
+; CHECK-NEXT: movl %edi, %ecx
+; CHECK-NEXT: movl %esi, %eax
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $2, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $1, %esi
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdx, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $4, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $8, %edi
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $16, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: andl $32, %r8d
+; CHECK-NEXT: imulq %rcx, %r8
+; CHECK-NEXT: xorq %rdx, %r8
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $64, %esi
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %r8, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $128, %edx
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $256, %edi # imm = 0x100
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: andl $512, %r8d # imm = 0x200
+; CHECK-NEXT: imulq %rcx, %r8
+; CHECK-NEXT: xorq %rdi, %r8
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $1024, %edx # imm = 0x400
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: xorq %r8, %rdx
+; CHECK-NEXT: xorq %rsi, %rdx
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $2048, %esi # imm = 0x800
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $4096, %edi # imm = 0x1000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $8192, %esi # imm = 0x2000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $16384, %edi # imm = 0x4000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $32768, %esi # imm = 0x8000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: xorq %rdx, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $65536, %edx # imm = 0x10000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $131072, %edi # imm = 0x20000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $262144, %edx # imm = 0x40000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: xorq %rdi, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $524288, %edi # imm = 0x80000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: movl %eax, %r8d
+; CHECK-NEXT: andl $1048576, %r8d # imm = 0x100000
+; CHECK-NEXT: imulq %rcx, %r8
+; CHECK-NEXT: xorq %rdi, %r8
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $2097152, %edx # imm = 0x200000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: xorq %r8, %rdx
+; CHECK-NEXT: xorq %rsi, %rdx
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $4194304, %esi # imm = 0x400000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $8388608, %edi # imm = 0x800000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $16777216, %esi # imm = 0x1000000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $33554432, %edi # imm = 0x2000000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $67108864, %esi # imm = 0x4000000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $134217728, %edi # imm = 0x8000000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rsi, %rdi
+; CHECK-NEXT: movl %eax, %esi
+; CHECK-NEXT: andl $268435456, %esi # imm = 0x10000000
+; CHECK-NEXT: imulq %rcx, %rsi
+; CHECK-NEXT: xorq %rdi, %rsi
+; CHECK-NEXT: xorq %rdx, %rsi
+; CHECK-NEXT: movl %eax, %edx
+; CHECK-NEXT: andl $536870912, %edx # imm = 0x20000000
+; CHECK-NEXT: imulq %rcx, %rdx
+; CHECK-NEXT: movl %eax, %edi
+; CHECK-NEXT: andl $1073741824, %edi # imm = 0x40000000
+; CHECK-NEXT: imulq %rcx, %rdi
+; CHECK-NEXT: xorq %rdx, %rdi
+; CHECK-NEXT: andl $-2147483648, %eax # imm = 0x80000000
+; CHECK-NEXT: imulq %rcx, %rax
+; CHECK-NEXT: xorq %rdi, %rax
+; CHECK-NEXT: xorq %rsi, %rax
+; CHECK-NEXT: shrq $32, %rax
+; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
+; CHECK-NEXT: retq
+ %a.ext = zext i32 %a to i64
+ %b.ext = zext i32 %b to i64
+ %clmul = call i64 @llvm.clmul.i64(i64 %a.ext, i64 %b.ext)
+ %res.ext = lshr i64 %clmul, 32
+ %res = trunc i64 %res.ext to i32
+ ret i32 %res
+}
+
+define i64 @clmulh_i64(i64 %a, i64 %b) nounwind {
+; SSE-LABEL: clmulh_i64:
+; SSE: # %bb.0:
+; SSE-NEXT: pushq %rbp
+; SSE-NEXT: pushq %r15
+; SSE-NEXT: pushq %r14
+; SSE-NEXT: pushq %r13
+; SSE-NEXT: pushq %r12
+; SSE-NEXT: pushq %rbx
+; SSE-NEXT: subq $40, %rsp
+; SSE-NEXT: bswapq %rdi
+; SSE-NEXT: movq %rdi, %rax
+; SSE-NEXT: shrq $4, %rax
+; SSE-NEXT: movabsq $1085102592571150095, %r9 # imm = 0xF0F0F0F0F0F0F0F
+; SSE-NEXT: andq %r9, %rax
+; SSE-NEXT: andq %r9, %rdi
+; SSE-NEXT: shlq $4, %rdi
+; SSE-NEXT: orq %rax, %rdi
+; SSE-NEXT: movabsq $3689348814741910323, %r8 # imm = 0x3333333333333333
+; SSE-NEXT: movq %rdi, %rax
+; SSE-NEXT: andq %r8, %rax
+; SSE-NEXT: shrq $2, %rdi
+; SSE-NEXT: andq %r8, %rdi
+; SSE-NEXT: leaq (%rdi,%rax,4), %rax
+; SSE-NEXT: movabsq $6148914691236517205, %rdx # imm = 0x5555555555555555
+; SSE-NEXT: movq %rax, %rcx
+; SSE-NEXT: andq %rdx, %rcx
+; SSE-NEXT: shrq %rax
+; SSE-NEXT: andq %rdx, %rax
+; SSE-NEXT: bswapq %rsi
+; SSE-NEXT: leaq (%rax,%rcx,2), %rdi
+; SSE-NEXT: movq %rsi, %rax
+; SSE-NEXT: shrq $4, %rax
+; SSE-NEXT: andq %r9, %rax
+; SSE-NEXT: andq %r9, %rsi
+; SSE-NEXT: shlq $4, %rsi
+; SSE-NEXT: orq %rax, %rsi
+; SSE-NEXT: movq %rsi, %rax
+; SSE-NEXT: andq %r8, %rax
+; SSE-NEXT: shrq $2, %rsi
+; SSE-NEXT: andq %r8, %rsi
+; SSE-NEXT: leaq (%rsi,%rax,4), %rax
+; SSE-NEXT: movq %rax, %rcx
+; SSE-NEXT: andq %rdx, %rcx
+; SSE-NEXT: shrq %rax
+; SSE-NEXT: andq %rdx, %rax
+; SSE-NEXT: leaq (%rax,%rcx,2), %rsi
+; SSE-NEXT: movl %esi, %r10d
+; SSE-NEXT: movl %esi, %r15d
+; SSE-NEXT: movl %esi, %ecx
+; SSE-NEXT: movl %esi, %r14d
+; SSE-NEXT: movl %esi, %r11d
+; SSE-NEXT: movl %esi, %eax
+; SSE-NEXT: movl %esi, %ebx
+; SSE-NEXT: movl %esi, %r9d
+; SSE-NEXT: movl %esi, %r8d
+; SSE-NEXT: movl %esi, %edx
+; SSE-NEXT: andl $2, %edx
+; SSE-NEXT: imulq %rdi, %rdx
+; SSE-NEXT: andl $1, %r10d
+; SSE-NEXT: imulq %rdi, %r10
+; SSE-NEXT: xorq %rdx, %r10
+; SSE-NEXT: movl %esi, %edx
+; SSE-NEXT: andl $4, %r15d
+; SSE-NEXT: imulq %rdi, %r15
+; SSE-NEXT: andl $8, %ecx
+; SSE-NEXT: imulq %rdi, %rcx
+; SSE-NEXT: xorq %r15, %rcx
+; SSE-NEXT: movl %esi, %r13d
+; SSE-NEXT: xorq %r10, %rcx
+; SSE-NEXT: movl %esi, %r10d
+; SSE-NEXT: andl $16, %r14d
+; SSE-NEXT: imulq %rdi, %r14
+; SSE-NEXT: andl $32, %r11d
+; SSE-NEXT: imulq %rdi, %r11
+; SSE-NEXT: xorq %r14, %r11
+; SSE-NEXT: movl %esi, %r14d
+; SSE-NEXT: andl $64, %eax
+; SSE-NEXT: imulq %rdi, %rax
+; SSE-NEXT: xorq %r11, %rax
+; SSE-NEXT: movl %esi, %r11d
+; SSE-NEXT: xorq %rcx, %rax
+; SSE-NEXT: movl %esi, %ecx
+; SSE-NEXT: andl $128, %ebx
+; SSE-NEXT: imulq %rdi, %rbx
+; SSE-NEXT: andl $256, %r9d # imm = 0x100
+; SSE-NEXT: imulq %rdi, %r9
+; SSE-NEXT: xorq %rbx, %r9
+; SSE-NEXT: movl %esi, %ebp
+; SSE-NEXT: andl $512, %r8d # imm = 0x200
+; SSE-NEXT: imulq %rdi, %r8
+; SSE-NEXT: xorq %r9, %r8
+; SSE-NEXT: movl %esi, %r15d
+; SSE-NEXT: andl $1024, %edx # imm = 0x400
+; SSE-NEXT: imulq %rdi, %rdx
+; SSE-NEXT: xorq %r8, %rdx
+; SSE-NEXT: movl %esi, %r12d
+; SSE-NEXT: xorq %rax, %rdx
+; SSE-NEXT: movl %esi, %ebx
+; SSE-NEXT: andl $2048, %r13d # imm = 0x800
+; SSE-NEXT: imulq %rdi, %r13
+; SSE-NEXT: andl $4096, %r10d # imm = 0x1000
+; SSE-NEXT: imulq %rdi, %r10
+; SSE-NEXT: xorq %r13, %r10
+; SSE-NEXT: movl %esi, %r13d
+; SSE-NEXT: andl $8192, %r14d # imm = 0x2000
+; SSE-NEXT: imulq %rdi, %r14
+; SSE-NEXT: xorq %r10, %r14
+; SSE-NEXT: movl %esi, %eax
+; SSE-NEXT: andl $16384, %r11d # imm = 0x4000
+; SSE-NEXT: imulq %rdi, %r11
+; SSE-NEXT: xorq %r14, %r11
+; SSE-NEXT: movl %esi, %r14d
+; SSE-NEXT: andl $32768, %ecx # imm = 0x8000
+; SSE-NEXT: imulq %rdi, %rcx
+; SSE-NEXT: xorq %r11, %rcx
+; SSE-NEXT: movl %esi, %r8d
+; SSE-NEXT: xorq %rdx, %rcx
+; SSE-NEXT: movl %esi, %edx
+; SSE-NEXT: andl $65536, %ebp # imm = 0x10000
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: andl $131072, %r15d # imm = 0x20000
+; SSE-NEXT: imulq %rdi, %r15
+; SSE-NEXT: xorq %rbp, %r15
+; SSE-NEXT: movl %esi, %r9d
+; SSE-NEXT: andl $262144, %r12d # imm = 0x40000
+; SSE-NEXT: imulq %rdi, %r12
+; SSE-NEXT: xorq %r15, %r12
+; SSE-NEXT: movl %esi, %r10d
+; SSE-NEXT: andl $524288, %ebx # imm = 0x80000
+; SSE-NEXT: imulq %rdi, %rbx
+; SSE-NEXT: xorq %r12, %rbx
+; SSE-NEXT: movl %esi, %r11d
+; SSE-NEXT: andl $1048576, %r13d # imm = 0x100000
+; SSE-NEXT: imulq %rdi, %r13
+; SSE-NEXT: xorq %rbx, %r13
+; SSE-NEXT: movl %esi, %r15d
+; SSE-NEXT: andl $2097152, %eax # imm = 0x200000
+; SSE-NEXT: imulq %rdi, %rax
+; SSE-NEXT: xorq %r13, %rax
+; SSE-NEXT: movl %esi, %ebx
+; SSE-NEXT: xorq %rcx, %rax
+; SSE-NEXT: movl %esi, %ecx
+; SSE-NEXT: andl $4194304, %r14d # imm = 0x400000
+; SSE-NEXT: imulq %rdi, %r14
+; SSE-NEXT: andl $8388608, %r8d # imm = 0x800000
+; SSE-NEXT: imulq %rdi, %r8
+; SSE-NEXT: xorq %r14, %r8
+; SSE-NEXT: movabsq $4294967296, %rbp # imm = 0x100000000
+; SSE-NEXT: andq %rsi, %rbp
+; SSE-NEXT: andl $16777216, %edx # imm = 0x1000000
+; SSE-NEXT: imulq %rdi, %rdx
+; SSE-NEXT: xorq %r8, %rdx
+; SSE-NEXT: movabsq $8589934592, %r8 # imm = 0x200000000
+; SSE-NEXT: andq %rsi, %r8
+; SSE-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: andl $33554432, %r9d # imm = 0x2000000
+; SSE-NEXT: imulq %rdi, %r9
+; SSE-NEXT: xorq %rdx, %r9
+; SSE-NEXT: movabsq $17179869184, %rdx # imm = 0x400000000
+; SSE-NEXT: andq %rsi, %rdx
+; SSE-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: andl $67108864, %r10d # imm = 0x4000000
+; SSE-NEXT: imulq %rdi, %r10
+; SSE-NEXT: xorq %r9, %r10
+; SSE-NEXT: movabsq $34359738368, %rdx # imm = 0x800000000
+; SSE-NEXT: andq %rsi, %rdx
+; SSE-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: andl $134217728, %r11d # imm = 0x8000000
+; SSE-NEXT: imulq %rdi, %r11
+; SSE-NEXT: xorq %r10, %r11
+; SSE-NEXT: movabsq $68719476736, %rdx # imm = 0x1000000000
+; SSE-NEXT: andq %rsi, %rdx
+; SSE-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: andl $268435456, %r15d # imm = 0x10000000
+; SSE-NEXT: imulq %rdi, %r15
+; SSE-NEXT: xorq %r11, %r15
+; SSE-NEXT: movabsq $137438953472, %rdx # imm = 0x2000000000
+; SSE-NEXT: andq %rsi, %rdx
+; SSE-NEXT: movq %rdx, (%rsp) # 8-byte Spill
+; SSE-NEXT: xorq %rax, %r15
+; SSE-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $274877906944, %r13 # imm = 0x4000000000
+; SSE-NEXT: andq %rsi, %r13
+; SSE-NEXT: andl $536870912, %ebx # imm = 0x20000000
+; SSE-NEXT: imulq %rdi, %rbx
+; SSE-NEXT: andl $1073741824, %ecx # imm = 0x40000000
+; SSE-NEXT: imulq %rdi, %rcx
+; SSE-NEXT: xorq %rbx, %rcx
+; SSE-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $549755813888, %rax # imm = 0x8000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $1099511627776, %rax # imm = 0x10000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $2199023255552, %rax # imm = 0x20000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $4398046511104, %rax # imm = 0x40000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $8796093022208, %rax # imm = 0x80000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $17592186044416, %rax # imm = 0x100000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $35184372088832, %rax # imm = 0x200000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $70368744177664, %rax # imm = 0x400000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $140737488355328, %rax # imm = 0x800000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $281474976710656, %rax # imm = 0x1000000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $562949953421312, %rax # imm = 0x2000000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $1125899906842624, %rax # imm = 0x4000000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $2251799813685248, %rax # imm = 0x8000000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $4503599627370496, %r12 # imm = 0x10000000000000
+; SSE-NEXT: andq %rsi, %r12
+; SSE-NEXT: movabsq $9007199254740992, %r15 # imm = 0x20000000000000
+; SSE-NEXT: andq %rsi, %r15
+; SSE-NEXT: movabsq $18014398509481984, %r14 # imm = 0x40000000000000
+; SSE-NEXT: andq %rsi, %r14
+; SSE-NEXT: movabsq $36028797018963968, %r11 # imm = 0x80000000000000
+; SSE-NEXT: andq %rsi, %r11
+; SSE-NEXT: movabsq $72057594037927936, %rax # imm = 0x100000000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; SSE-NEXT: movabsq $144115188075855872, %rbx # imm = 0x200000000000000
+; SSE-NEXT: andq %rsi, %rbx
+; SSE-NEXT: movabsq $288230376151711744, %r10 # imm = 0x400000000000000
+; SSE-NEXT: andq %rsi, %r10
+; SSE-NEXT: movabsq $576460752303423488, %r9 # imm = 0x800000000000000
+; SSE-NEXT: andq %rsi, %r9
+; SSE-NEXT: movabsq $1152921504606846976, %r8 # imm = 0x1000000000000000
+; SSE-NEXT: andq %rsi, %r8
+; SSE-NEXT: movabsq $2305843009213693952, %rdx # imm = 0x2000000000000000
+; SSE-NEXT: andq %rsi, %rdx
+; SSE-NEXT: movabsq $4611686018427387904, %rcx # imm = 0x4000000000000000
+; SSE-NEXT: andq %rsi, %rcx
+; SSE-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
+; SSE-NEXT: andq %rsi, %rax
+; SSE-NEXT: # kill: def $esi killed $esi killed $rsi def $rsi
+; SSE-NEXT: andl $-2147483648, %esi # imm = 0x80000000
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: xorq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %rsi, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: xorq %rbp, %rsi
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %rsi, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: xorq %rbp, %rsi
+; SSE-NEXT: movq %rsi, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: xorq %rbp, %rsi
+; SSE-NEXT: xorq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
+; SSE-NEXT: movq (%rsp), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: imulq %rdi, %r13
+; SSE-NEXT: xorq %rbp, %r13
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %r13, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %r13
+; SSE-NEXT: xorq %rbp, %r13
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %r13, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %r13
+; SSE-NEXT: xorq %rbp, %r13
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %r13, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %r13
+; SSE-NEXT: xorq %rbp, %r13
+; SSE-NEXT: movq %r13, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %r13
+; SSE-NEXT: xorq %rbp, %r13
+; SSE-NEXT: xorq %rsi, %r13
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %rsi, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: xorq %rbp, %rsi
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %rsi, %rbp
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: xorq %rbp, %rsi
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rbp
+; SSE-NEXT: xorq %rsi, %rbp
+; SSE-NEXT: imulq %rdi, %r12
+; SSE-NEXT: xorq %rbp, %r12
+; SSE-NEXT: imulq %rdi, %r15
+; SSE-NEXT: xorq %r12, %r15
+; SSE-NEXT: imulq %rdi, %r14
+; SSE-NEXT: xorq %r15, %r14
+; SSE-NEXT: imulq %rdi, %r11
+; SSE-NEXT: xorq %r14, %r11
+; SSE-NEXT: xorq %r13, %r11
+; SSE-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; SSE-NEXT: imulq %rdi, %rsi
+; SSE-NEXT: imulq %rdi, %rbx
+; SSE-NEXT: xorq %rsi, %rbx
+; SSE-NEXT: imulq %rdi, %r10
+; SSE-NEXT: xorq %rbx, %r10
+; SSE-NEXT: imulq %rdi, %r9
+; SSE-NEXT: xorq %r10, %r9
+; SSE-NEXT: imulq %rdi, %r8
+; SSE-NEXT: xorq %r9, %r8
+; SSE-NEXT: imulq %rdi, %rdx
+; SSE-NEXT: xorq %r8, %rdx
+; SSE-NEXT: imulq %rdi, %rcx
+; SSE-NEXT: xorq %rdx, %rcx
+; SSE-NEXT: imulq %rdi, %rax
+; SSE-NEXT: xorq %rcx, %rax
+; SSE-NEXT: xorq %r11, %rax
+; SSE-NEXT: bswapq %rax
+; SSE-NEXT: movq %rax, %rcx
+; SSE-NEXT: shrq $4, %rcx
+; SSE-NEXT: movabsq $1085102592571150095, %rdx # imm = 0xF0F0F0F0F0F0F0F
+; SSE-NEXT: andq %rdx, %rcx
+; SSE-NEXT: andq %rdx, %rax
+; SSE-NEXT: shlq $4, %rax
+; SSE-NEXT: orq %rcx, %rax
+; SSE-NEXT: movq %rax, %rcx
+; SSE-NEXT: movabsq $3689348814741910323, %rdx # imm = 0x3333333333333333
+; SSE-NEXT: andq %rdx, %rcx
+; SSE-NEXT: shrq $2, %rax
+; SSE-NEXT: andq %rdx, %rax
+; SSE-NEXT: leaq (%rax,%rcx,4), %rax
+; SSE-NEXT: movabsq $6148914691236517205, %rdx # imm = 0x5555555555555555
+; SSE-NEXT: andq %rax, %rdx
+; SSE-NEXT: shrq %rax
+; SSE-NEXT: movabsq $6148914691236517204, %rcx # imm = 0x5555555555555554
+; SSE-NEXT: andq %rax, %rcx
+; SSE-NEXT: leaq (%rcx,%rdx,2), %rax
+; SSE-NEXT: shrq %rax
+; SSE-NEXT: addq $40, %rsp
+; SSE-NEXT: popq %rbx
+; SSE-NEXT: popq %r12
+; SSE-NEXT: popq %r13
+; SSE-NEXT: popq %r14
+; SSE-NEXT: popq %r15
+; SSE-NEXT: popq %rbp
+; SSE-NEXT: retq
+;
+; AVX-LABEL: clmulh_i64:
+; AVX: # %bb.0:
+; AVX-NEXT: pushq %rbp
+; AVX-NEXT: pushq %r15
+; AVX-NEXT: pushq %r14
+; AVX-NEXT: pushq %r13
+; AVX-NEXT: pushq %r12
+; AVX-NEXT: pushq %rbx
+; AVX-NEXT: subq $40, %rsp
+; AVX-NEXT: bswapq %rdi
+; AVX-NEXT: movq %rdi, %rax
+; AVX-NEXT: shrq $4, %rax
+; AVX-NEXT: movabsq $1085102592571150095, %r9 # imm = 0xF0F0F0F0F0F0F0F
+; AVX-NEXT: andq %r9, %rax
+; AVX-NEXT: andq %r9, %rdi
+; AVX-NEXT: shlq $4, %rdi
+; AVX-NEXT: orq %rax, %rdi
+; AVX-NEXT: movabsq $3689348814741910323, %r8 # imm = 0x3333333333333333
+; AVX-NEXT: movq %rdi, %rax
+; AVX-NEXT: andq %r8, %rax
+; AVX-NEXT: shrq $2, %rdi
+; AVX-NEXT: andq %r8, %rdi
+; AVX-NEXT: leaq (%rdi,%rax,4), %rax
+; AVX-NEXT: movabsq $6148914691236517205, %rdx # imm = 0x5555555555555555
+; AVX-NEXT: movq %rax, %rcx
+; AVX-NEXT: andq %rdx, %rcx
+; AVX-NEXT: shrq %rax
+; AVX-NEXT: andq %rdx, %rax
+; AVX-NEXT: leaq (%rax,%rcx,2), %rdi
+; AVX-NEXT: bswapq %rsi
+; AVX-NEXT: movq %rsi, %rax
+; AVX-NEXT: shrq $4, %rax
+; AVX-NEXT: andq %r9, %rax
+; AVX-NEXT: andq %r9, %rsi
+; AVX-NEXT: shlq $4, %rsi
+; AVX-NEXT: orq %rax, %rsi
+; AVX-NEXT: movq %rsi, %rax
+; AVX-NEXT: andq %r8, %rax
+; AVX-NEXT: shrq $2, %rsi
+; AVX-NEXT: andq %r8, %rsi
+; AVX-NEXT: leaq (%rsi,%rax,4), %rax
+; AVX-NEXT: movq %rax, %rcx
+; AVX-NEXT: andq %rdx, %rcx
+; AVX-NEXT: shrq %rax
+; AVX-NEXT: andq %rdx, %rax
+; AVX-NEXT: leaq (%rax,%rcx,2), %rsi
+; AVX-NEXT: movl %esi, %r10d
+; AVX-NEXT: movl %esi, %r15d
+; AVX-NEXT: movl %esi, %ecx
+; AVX-NEXT: movl %esi, %r14d
+; AVX-NEXT: movl %esi, %r11d
+; AVX-NEXT: movl %esi, %eax
+; AVX-NEXT: movl %esi, %ebx
+; AVX-NEXT: movl %esi, %r9d
+; AVX-NEXT: movl %esi, %r8d
+; AVX-NEXT: movl %esi, %edx
+; AVX-NEXT: andl $2, %edx
+; AVX-NEXT: imulq %rdi, %rdx
+; AVX-NEXT: andl $1, %r10d
+; AVX-NEXT: imulq %rdi, %r10
+; AVX-NEXT: xorq %rdx, %r10
+; AVX-NEXT: movl %esi, %edx
+; AVX-NEXT: andl $4, %r15d
+; AVX-NEXT: imulq %rdi, %r15
+; AVX-NEXT: andl $8, %ecx
+; AVX-NEXT: imulq %rdi, %rcx
+; AVX-NEXT: xorq %r15, %rcx
+; AVX-NEXT: movl %esi, %r13d
+; AVX-NEXT: xorq %r10, %rcx
+; AVX-NEXT: movl %esi, %r10d
+; AVX-NEXT: andl $16, %r14d
+; AVX-NEXT: imulq %rdi, %r14
+; AVX-NEXT: andl $32, %r11d
+; AVX-NEXT: imulq %rdi, %r11
+; AVX-NEXT: xorq %r14, %r11
+; AVX-NEXT: movl %esi, %r14d
+; AVX-NEXT: andl $64, %eax
+; AVX-NEXT: imulq %rdi, %rax
+; AVX-NEXT: xorq %r11, %rax
+; AVX-NEXT: movl %esi, %r11d
+; AVX-NEXT: xorq %rcx, %rax
+; AVX-NEXT: movl %esi, %ecx
+; AVX-NEXT: andl $128, %ebx
+; AVX-NEXT: imulq %rdi, %rbx
+; AVX-NEXT: andl $256, %r9d # imm = 0x100
+; AVX-NEXT: imulq %rdi, %r9
+; AVX-NEXT: xorq %rbx, %r9
+; AVX-NEXT: movl %esi, %ebp
+; AVX-NEXT: andl $512, %r8d # imm = 0x200
+; AVX-NEXT: imulq %rdi, %r8
+; AVX-NEXT: xorq %r9, %r8
+; AVX-NEXT: movl %esi, %r15d
+; AVX-NEXT: andl $1024, %edx # imm = 0x400
+; AVX-NEXT: imulq %rdi, %rdx
+; AVX-NEXT: xorq %r8, %rdx
+; AVX-NEXT: movl %esi, %r12d
+; AVX-NEXT: xorq %rax, %rdx
+; AVX-NEXT: movl %esi, %ebx
+; AVX-NEXT: andl $2048, %r13d # imm = 0x800
+; AVX-NEXT: imulq %rdi, %r13
+; AVX-NEXT: andl $4096, %r10d # imm = 0x1000
+; AVX-NEXT: imulq %rdi, %r10
+; AVX-NEXT: xorq %r13, %r10
+; AVX-NEXT: movl %esi, %r13d
+; AVX-NEXT: andl $8192, %r14d # imm = 0x2000
+; AVX-NEXT: imulq %rdi, %r14
+; AVX-NEXT: xorq %r10, %r14
+; AVX-NEXT: movl %esi, %eax
+; AVX-NEXT: andl $16384, %r11d # imm = 0x4000
+; AVX-NEXT: imulq %rdi, %r11
+; AVX-NEXT: xorq %r14, %r11
+; AVX-NEXT: movl %esi, %r14d
+; AVX-NEXT: andl $32768, %ecx # imm = 0x8000
+; AVX-NEXT: imulq %rdi, %rcx
+; AVX-NEXT: xorq %r11, %rcx
+; AVX-NEXT: movl %esi, %r8d
+; AVX-NEXT: xorq %rdx, %rcx
+; AVX-NEXT: movl %esi, %edx
+; AVX-NEXT: andl $65536, %ebp # imm = 0x10000
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: andl $131072, %r15d # imm = 0x20000
+; AVX-NEXT: imulq %rdi, %r15
+; AVX-NEXT: xorq %rbp, %r15
+; AVX-NEXT: movl %esi, %r9d
+; AVX-NEXT: andl $262144, %r12d # imm = 0x40000
+; AVX-NEXT: imulq %rdi, %r12
+; AVX-NEXT: xorq %r15, %r12
+; AVX-NEXT: movl %esi, %r10d
+; AVX-NEXT: andl $524288, %ebx # imm = 0x80000
+; AVX-NEXT: imulq %rdi, %rbx
+; AVX-NEXT: xorq %r12, %rbx
+; AVX-NEXT: movl %esi, %r11d
+; AVX-NEXT: andl $1048576, %r13d # imm = 0x100000
+; AVX-NEXT: imulq %rdi, %r13
+; AVX-NEXT: xorq %rbx, %r13
+; AVX-NEXT: movl %esi, %r15d
+; AVX-NEXT: andl $2097152, %eax # imm = 0x200000
+; AVX-NEXT: imulq %rdi, %rax
+; AVX-NEXT: xorq %r13, %rax
+; AVX-NEXT: movl %esi, %ebx
+; AVX-NEXT: xorq %rcx, %rax
+; AVX-NEXT: movl %esi, %ecx
+; AVX-NEXT: andl $4194304, %r14d # imm = 0x400000
+; AVX-NEXT: imulq %rdi, %r14
+; AVX-NEXT: andl $8388608, %r8d # imm = 0x800000
+; AVX-NEXT: imulq %rdi, %r8
+; AVX-NEXT: xorq %r14, %r8
+; AVX-NEXT: movabsq $4294967296, %rbp # imm = 0x100000000
+; AVX-NEXT: andq %rsi, %rbp
+; AVX-NEXT: andl $16777216, %edx # imm = 0x1000000
+; AVX-NEXT: imulq %rdi, %rdx
+; AVX-NEXT: xorq %r8, %rdx
+; AVX-NEXT: movabsq $8589934592, %r8 # imm = 0x200000000
+; AVX-NEXT: andq %rsi, %r8
+; AVX-NEXT: movq %r8, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: andl $33554432, %r9d # imm = 0x2000000
+; AVX-NEXT: imulq %rdi, %r9
+; AVX-NEXT: xorq %rdx, %r9
+; AVX-NEXT: movabsq $17179869184, %rdx # imm = 0x400000000
+; AVX-NEXT: andq %rsi, %rdx
+; AVX-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: andl $67108864, %r10d # imm = 0x4000000
+; AVX-NEXT: imulq %rdi, %r10
+; AVX-NEXT: xorq %r9, %r10
+; AVX-NEXT: movabsq $34359738368, %rdx # imm = 0x800000000
+; AVX-NEXT: andq %rsi, %rdx
+; AVX-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: andl $134217728, %r11d # imm = 0x8000000
+; AVX-NEXT: imulq %rdi, %r11
+; AVX-NEXT: xorq %r10, %r11
+; AVX-NEXT: movabsq $68719476736, %rdx # imm = 0x1000000000
+; AVX-NEXT: andq %rsi, %rdx
+; AVX-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: andl $268435456, %r15d # imm = 0x10000000
+; AVX-NEXT: imulq %rdi, %r15
+; AVX-NEXT: xorq %r11, %r15
+; AVX-NEXT: movabsq $137438953472, %rdx # imm = 0x2000000000
+; AVX-NEXT: andq %rsi, %rdx
+; AVX-NEXT: movq %rdx, (%rsp) # 8-byte Spill
+; AVX-NEXT: xorq %rax, %r15
+; AVX-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $274877906944, %r13 # imm = 0x4000000000
+; AVX-NEXT: andq %rsi, %r13
+; AVX-NEXT: andl $536870912, %ebx # imm = 0x20000000
+; AVX-NEXT: imulq %rdi, %rbx
+; AVX-NEXT: andl $1073741824, %ecx # imm = 0x40000000
+; AVX-NEXT: imulq %rdi, %rcx
+; AVX-NEXT: xorq %rbx, %rcx
+; AVX-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $549755813888, %rax # imm = 0x8000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $1099511627776, %rax # imm = 0x10000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $2199023255552, %rax # imm = 0x20000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $4398046511104, %rax # imm = 0x40000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $8796093022208, %rax # imm = 0x80000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $17592186044416, %rax # imm = 0x100000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $35184372088832, %rax # imm = 0x200000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $70368744177664, %rax # imm = 0x400000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $140737488355328, %rax # imm = 0x800000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $281474976710656, %rax # imm = 0x1000000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $562949953421312, %rax # imm = 0x2000000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $1125899906842624, %rax # imm = 0x4000000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $2251799813685248, %rax # imm = 0x8000000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $4503599627370496, %r12 # imm = 0x10000000000000
+; AVX-NEXT: andq %rsi, %r12
+; AVX-NEXT: movabsq $9007199254740992, %r15 # imm = 0x20000000000000
+; AVX-NEXT: andq %rsi, %r15
+; AVX-NEXT: movabsq $18014398509481984, %r14 # imm = 0x40000000000000
+; AVX-NEXT: andq %rsi, %r14
+; AVX-NEXT: movabsq $36028797018963968, %r11 # imm = 0x80000000000000
+; AVX-NEXT: andq %rsi, %r11
+; AVX-NEXT: movabsq $72057594037927936, %rax # imm = 0x100000000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
+; AVX-NEXT: movabsq $144115188075855872, %rbx # imm = 0x200000000000000
+; AVX-NEXT: andq %rsi, %rbx
+; AVX-NEXT: movabsq $288230376151711744, %r10 # imm = 0x400000000000000
+; AVX-NEXT: andq %rsi, %r10
+; AVX-NEXT: movabsq $576460752303423488, %r9 # imm = 0x800000000000000
+; AVX-NEXT: andq %rsi, %r9
+; AVX-NEXT: movabsq $1152921504606846976, %r8 # imm = 0x1000000000000000
+; AVX-NEXT: andq %rsi, %r8
+; AVX-NEXT: movabsq $2305843009213693952, %rdx # imm = 0x2000000000000000
+; AVX-NEXT: andq %rsi, %rdx
+; AVX-NEXT: movabsq $4611686018427387904, %rcx # imm = 0x4000000000000000
+; AVX-NEXT: andq %rsi, %rcx
+; AVX-NEXT: movabsq $-9223372036854775808, %rax # imm = 0x8000000000000000
+; AVX-NEXT: andq %rsi, %rax
+; AVX-NEXT: # kill: def $esi killed $esi killed $rsi def $rsi
+; AVX-NEXT: andl $-2147483648, %esi # imm = 0x80000000
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: xorq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %rsi, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: xorq %rbp, %rsi
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %rsi, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: xorq %rbp, %rsi
+; AVX-NEXT: movq %rsi, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: xorq %rbp, %rsi
+; AVX-NEXT: xorq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Folded Reload
+; AVX-NEXT: movq (%rsp), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: imulq %rdi, %r13
+; AVX-NEXT: xorq %rbp, %r13
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %r13, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %r13
+; AVX-NEXT: xorq %rbp, %r13
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %r13, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %r13
+; AVX-NEXT: xorq %rbp, %r13
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %r13, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %r13
+; AVX-NEXT: xorq %rbp, %r13
+; AVX-NEXT: movq %r13, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r13 # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %r13
+; AVX-NEXT: xorq %rbp, %r13
+; AVX-NEXT: xorq %rsi, %r13
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %rsi, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: xorq %rbp, %rsi
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %rsi, %rbp
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: xorq %rbp, %rsi
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rbp # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rbp
+; AVX-NEXT: xorq %rsi, %rbp
+; AVX-NEXT: imulq %rdi, %r12
+; AVX-NEXT: xorq %rbp, %r12
+; AVX-NEXT: imulq %rdi, %r15
+; AVX-NEXT: xorq %r12, %r15
+; AVX-NEXT: imulq %rdi, %r14
+; AVX-NEXT: xorq %r15, %r14
+; AVX-NEXT: imulq %rdi, %r11
+; AVX-NEXT: xorq %r14, %r11
+; AVX-NEXT: xorq %r13, %r11
+; AVX-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload
+; AVX-NEXT: imulq %rdi, %rsi
+; AVX-NEXT: imulq %rdi, %rbx
+; AVX-NEXT: xorq %rsi, %rbx
+; AVX-NEXT: imulq %rdi, %r10
+; AVX-NEXT: xorq %rbx, %r10
+; AVX-NEXT: imulq %rdi, %r9
+; AVX-NEXT: xorq %r10, %r9
+; AVX-NEXT: imulq %rdi, %r8
+; AVX-NEXT: xorq %r9, %r8
+; AVX-NEXT: imulq %rdi, %rdx
+; AVX-NEXT: xorq %r8, %rdx
+; AVX-NEXT: imulq %rdi, %rcx
+; AVX-NEXT: xorq %rdx, %rcx
+; AVX-NEXT: imulq %rdi, %rax
+; AVX-NEXT: xorq %rcx, %rax
+; AVX-NEXT: xorq %r11, %rax
+; AVX-NEXT: bswapq %rax
+; AVX-NEXT: movq %rax, %rcx
+; AVX-NEXT: shrq $4, %rcx
+; AVX-NEXT: movabsq $1085102592571150095, %rdx # imm = 0xF0F0F0F0F0F0F0F
+; AVX-NEXT: andq %rdx, %rcx
+; AVX-NEXT: andq %rdx, %rax
+; AVX-NEXT: shlq $4, %rax
+; AVX-NEXT: orq %rcx, %rax
+; AVX-NEXT: movq %rax, %rcx
+; AVX-NEXT: movabsq $3689348814741910323, %rdx # imm = 0x3333333333333333
+; AVX-NEXT: andq %rdx, %rcx
+; AVX-NEXT: shrq $2, %rax
+; AVX-NEXT: andq %rdx, %rax
+; AVX-NEXT: leaq (%rax,%rcx,4), %rax
+; AVX-NEXT: movabsq $6148914691236517205, %rdx # imm = 0x5555555555555555
+; AVX-NEXT: andq %rax, %rdx
+; AVX-NEXT: shrq %rax
+; AVX-NEXT: movabsq $6148914691236517204, %rcx # imm = 0x5555555555555554
+; AVX-NEXT: andq %rax, %rcx
+; AVX-NEXT: leaq (%rcx,%rdx,2), %rax
+; AVX-NEXT: shrq %rax
+; AVX-NEXT: addq $40, %rsp
+; AVX-NEXT: popq %rbx
+; AVX-NEXT: popq %r12
+; AVX-NEXT: popq %r13
+; AVX-NEXT: popq %r14
+; AVX-NEXT: popq %r15
+; AVX-NEXT: popq %rbp
+; AVX-NEXT: retq
+ %a.ext = zext i64 %a to i128
+ %b.ext = zext i64 %b to i128
+ %clmul = call i128 @llvm.clmul.i128(i128 %a.ext, i128 %b.ext)
+ %res.ext = lshr i128 %clmul, 64
+ %res = trunc i128 %res.ext to i64
+ ret i64 %res
+}
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