[llvm] [TableGen] Print MVT name in the isel table when it doesn't require a VBR. NFC (PR #175128)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 8 23:44:21 PST 2026
https://github.com/topperc updated https://github.com/llvm/llvm-project/pull/175128
>From 54e6cb796d9f7b200516c1d54fc1cf3652811eff Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 8 Jan 2026 23:26:58 -0800
Subject: [PATCH 1/3] [TableGen] Add a helper function for emitting an MVT in
the isel table. NFC
---
llvm/utils/TableGen/DAGISelMatcherEmitter.cpp | 49 ++++++-------------
1 file changed, 16 insertions(+), 33 deletions(-)
diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index 7877a1f36424f..afad7818d18da 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -424,6 +424,12 @@ void MatcherTableEmitter::EmitPatternMatchTable(raw_ostream &OS) {
EndEmitFunction(OS);
}
+static unsigned emitMVT(MVT VT, raw_ostream &OS) {
+ if (!OmitComments)
+ OS << "/*" << getEnumName(VT) << "*/";
+ return EmitVBRValue(VT.SimpleTy, OS);
+}
+
/// EmitMatcher - Emit bytes for the specified matcher and return
/// the number of bytes emitted.
unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
@@ -631,12 +637,8 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
OS << ' ';
if (const SwitchOpcodeMatcher *SOM = dyn_cast<SwitchOpcodeMatcher>(N))
OS << "TARGET_VAL(" << SOM->getCaseOpcode(i).getEnumName() << "),";
- else {
- if (!OmitComments)
- OS << "/*" << getEnumName(cast<SwitchTypeMatcher>(N)->getCaseType(i))
- << "*/";
- EmitVBRValue(cast<SwitchTypeMatcher>(N)->getCaseType(i).SimpleTy, OS);
- }
+ else
+ emitMVT(cast<SwitchTypeMatcher>(N)->getCaseType(i), OS);
if (!OmitComments)
OS << " // ->" << CurrentIdx + ChildSize;
OS << '\n';
@@ -669,18 +671,13 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
return 1;
default:
OS << "OPC_CheckType, ";
- if (!OmitComments)
- OS << "/*" << getEnumName(VT) << "*/";
- unsigned NumBytes = EmitVBRValue(VT.SimpleTy, OS);
+ unsigned NumBytes = emitMVT(VT, OS);
OS << "\n";
return NumBytes + 1;
}
}
OS << "OPC_CheckTypeRes, " << cast<CheckTypeMatcher>(N)->getResNo() << ", ";
- if (!OmitComments)
- OS << "/*" << getEnumName(cast<CheckTypeMatcher>(N)->getType()) << "*/";
- unsigned NumBytes =
- EmitVBRValue(cast<CheckTypeMatcher>(N)->getType().SimpleTy, OS);
+ unsigned NumBytes = emitMVT(cast<CheckTypeMatcher>(N)->getType(), OS);
OS << "\n";
return NumBytes + 2;
}
@@ -696,9 +693,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
default:
OS << "OPC_CheckChild" << cast<CheckChildTypeMatcher>(N)->getChildNo()
<< "Type, ";
- if (!OmitComments)
- OS << "/*" << getEnumName(VT) << "*/";
- unsigned NumBytes = EmitVBRValue(VT.SimpleTy, OS);
+ unsigned NumBytes = emitMVT(VT, OS);
OS << "\n";
return NumBytes + 1;
}
@@ -731,11 +726,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
case Matcher::CheckValueType: {
OS << "OPC_CheckValueType, ";
- if (!OmitComments)
- OS << "/*" << getEnumName(cast<CheckValueTypeMatcher>(N)->getVT())
- << "*/";
- unsigned NumBytes =
- EmitVBRValue(cast<CheckValueTypeMatcher>(N)->getVT().SimpleTy, OS);
+ unsigned NumBytes = emitMVT(cast<CheckValueTypeMatcher>(N)->getVT(), OS);
OS << "\n";
return NumBytes + 1;
}
@@ -807,9 +798,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
break;
default:
OS << "OPC_EmitInteger, ";
- if (!OmitComments)
- OS << "/*" << getEnumName(VT) << "*/";
- TypeBytes = EmitVBRValue(VT.SimpleTy, OS);
+ TypeBytes = emitMVT(VT, OS);
OS << ' ';
break;
}
@@ -840,9 +829,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
// use EmitRegister2.
if (Reg && Reg->EnumValue > 255) {
OS << "OPC_EmitRegister2, ";
- if (!OmitComments)
- OS << "/*" << getEnumName(VT) << "*/";
- OpBytes = EmitVBRValue(VT.SimpleTy, OS);
+ OpBytes = emitMVT(VT, OS);
OS << "TARGET_VAL(" << getQualifiedName(Reg->TheDef) << "),\n";
return OpBytes + 3;
}
@@ -854,9 +841,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
break;
default:
OS << "OPC_EmitRegister, ";
- if (!OmitComments)
- OS << "/*" << getEnumName(VT) << "*/";
- OpBytes = EmitVBRValue(VT.SimpleTy, OS) + 1;
+ OpBytes = emitMVT(VT, OS) + 1;
break;
}
if (Reg) {
@@ -1020,9 +1005,7 @@ unsigned MatcherTableEmitter::EmitMatcher(const Matcher *N,
unsigned NumTypeBytes = 0;
for (unsigned i = 0, e = EN->getNumVTs(); i != e; ++i) {
OS << ' ';
- if (!OmitComments)
- OS << "/*" << getEnumName(EN->getVT(i)) << "*/";
- NumTypeBytes += EmitVBRValue(EN->getVT(i).SimpleTy, OS);
+ NumTypeBytes += emitMVT(EN->getVT(i), OS);
}
OS << ' ' << EN->getNumOperands();
>From 4e7d3fb4b8426a08a5ab61b6528af73f44e5619b Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 8 Jan 2026 23:36:59 -0800
Subject: [PATCH 2/3] [TableGen] Print MVT name in the isel table when it
doesn't require a VBR.
If the MVT is small enough, we can emit the enum name instead of
printing its encoding.
---
llvm/utils/TableGen/DAGISelMatcherEmitter.cpp | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
index afad7818d18da..6eaac318d3e41 100644
--- a/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
+++ b/llvm/utils/TableGen/DAGISelMatcherEmitter.cpp
@@ -425,6 +425,12 @@ void MatcherTableEmitter::EmitPatternMatchTable(raw_ostream &OS) {
}
static unsigned emitMVT(MVT VT, raw_ostream &OS) {
+ // Print the MVT directly if it doesn't require a VBR.
+ if (VT.SimpleTy <= 127) {
+ OS << getEnumName(VT) << ',';
+ return 1;
+ }
+
if (!OmitComments)
OS << "/*" << getEnumName(VT) << "*/";
return EmitVBRValue(VT.SimpleTy, OS);
>From e8eb44d6f982eab37a798d6dcf59f8b4527fb871 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Thu, 8 Jan 2026 23:44:08 -0800
Subject: [PATCH 3/3] fixup! Update unittests
---
llvm/test/TableGen/CPtrWildcard.td | 4 ++--
llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 4 ++--
llvm/test/TableGen/multiple-type-casts-patfrags.td | 8 ++++----
3 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/llvm/test/TableGen/CPtrWildcard.td b/llvm/test/TableGen/CPtrWildcard.td
index 79efc42af9634..009fc04a722d3 100644
--- a/llvm/test/TableGen/CPtrWildcard.td
+++ b/llvm/test/TableGen/CPtrWildcard.td
@@ -10,13 +10,13 @@
// CHECK-NEXT:/* 6*/ OPC_Scope, 9, /*->17*/ // 2 children in Scope
// CHECK-NEXT:/* 8*/ OPC_CheckChild1Type, /*MVT::c64*/2|128,2/*258*/,
// CHECK-NEXT:/* 11*/ OPC_MorphNodeTo1None, TARGET_VAL(MyTarget::C64_TO_I64),
-// CHECK-NEXT: /*MVT::i64*/8, 1/*#Ops*/, 0,
+// CHECK-NEXT: MVT::i64, 1/*#Ops*/, 0,
// CHECK-NEXT: // Src: (intrinsic_wo_chain:{ *:[i64] } [[#]]:{ *:[iPTR] }, c64:{ *:[c64] }:$src) - Complexity = 8
// CHECK-NEXT: // Dst: (C64_TO_I64:{ *:[i64] } ?:{ *:[c64] }:$src)
// CHECK-NEXT:/* 17*/ /*Scope*/ 9, /*->27*/
// CHECK-NEXT:/* 18*/ OPC_CheckChild1Type, /*MVT::c128*/3|128,2/*259*/,
// CHECK-NEXT:/* 21*/ OPC_MorphNodeTo1None, TARGET_VAL(MyTarget::C128_TO_I64),
-// CHECK-NEXT: /*MVT::i64*/8, 1/*#Ops*/, 0,
+// CHECK-NEXT: MVT::i64, 1/*#Ops*/, 0,
// CHECK-NEXT: // Src: (intrinsic_wo_chain:{ *:[i64] } [[#]]:{ *:[iPTR] }, c128:{ *:[c128] }:$src) - Complexity = 8
// CHECK-NEXT: // Dst: (C128_TO_I64:{ *:[i64] } ?:{ *:[c128] }:$src)
// CHECK-NEXT:/* 27*/ 0, // End of Scope
diff --git a/llvm/test/TableGen/dag-isel-regclass-emit-enum.td b/llvm/test/TableGen/dag-isel-regclass-emit-enum.td
index f2858fc7504a4..cfcfedb8dd374 100644
--- a/llvm/test/TableGen/dag-isel-regclass-emit-enum.td
+++ b/llvm/test/TableGen/dag-isel-regclass-emit-enum.td
@@ -27,13 +27,13 @@ def GPRAbove127 : RegisterClass<"TestTarget", [i32], 32,
// CHECK-NEXT: OPC_CheckChild1Integer, 0,
// CHECK-NEXT: OPC_EmitIntegerI32, 0|128,1/*128*/, // #1 = TestNamespace::GPRAbove127RegClassID
// CHECK-NEXT: OPC_MorphNodeTo1None, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS),
-// CHECK-NEXT: /*MVT::i32*/7, 2/*#Ops*/, 1, 0,
+// CHECK-NEXT: MVT::i32, 2/*#Ops*/, 1, 0,
def : Pat<(i32 (add i32:$src, (i32 0))),
(COPY_TO_REGCLASS GPRAbove127, GPR0:$src)>;
// CHECK: OPC_CheckChild1Integer, 1,
// CHECK-NEXT: OPC_EmitIntegerI32, TestNamespace::GPR127RegClassID,
// CHECK-NEXT: OPC_MorphNodeTo1None, TARGET_VAL(TargetOpcode::COPY_TO_REGCLASS),
-// CHECK-NEXT: /*MVT::i32*/7, 2/*#Ops*/, 1, 0,
+// CHECK-NEXT: MVT::i32, 2/*#Ops*/, 1, 0,
def : Pat<(i32 (add i32:$src, (i32 1))),
(COPY_TO_REGCLASS GPR127, GPR0:$src)>;
diff --git a/llvm/test/TableGen/multiple-type-casts-patfrags.td b/llvm/test/TableGen/multiple-type-casts-patfrags.td
index c4b4b62995fdb..39a5b042eaa66 100644
--- a/llvm/test/TableGen/multiple-type-casts-patfrags.td
+++ b/llvm/test/TableGen/multiple-type-casts-patfrags.td
@@ -18,8 +18,8 @@ def INSTR_FOO_I32_I16 : Instruction {
let InOperandList = (ins);
}
-// SDAG: 7*/ OPC_SwitchType {{.*}}, 10, /*MVT::i16*/6
-// SDAG: OPC_CheckTypeRes, 1, /*MVT::i32*/7
+// SDAG: 7*/ OPC_SwitchType {{.*}}, 10, MVT::i16
+// SDAG: OPC_CheckTypeRes, 1, MVT::i32
// SDAG: OPC_MorphNodeTo2Chain, TARGET_VAL(::INSTR_FOO_I16_I32)
// GISEL: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s16
@@ -27,8 +27,8 @@ def INSTR_FOO_I32_I16 : Instruction {
// GISEL: GIR_BuildRootMI, /*Opcode*/GIMT_Encode2(::INSTR_FOO_I16_I32)
def : Pat<([i16, i32] (int_foo)), ([i16, i32] (INSTR_FOO_I16_I32))>;
-// SDAG: 20*/ /*SwitchType*/ {{.*}} /*MVT::i32*/7
-// SDAG: OPC_CheckTypeRes, 1, /*MVT::i16*/6
+// SDAG: 20*/ /*SwitchType*/ {{.*}} MVT::i32
+// SDAG: OPC_CheckTypeRes, 1, MVT::i16
// SDAG: OPC_MorphNodeTo2Chain, TARGET_VAL(::INSTR_FOO_I32_I16)
// GISEL: GIM_RootCheckType, /*Op*/0, /*Type*/GILLT_s32
More information about the llvm-commits
mailing list