[llvm] [RISCV] AI Foundry ET extensions for RISC-V (PR #174571)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 8 12:12:13 PST 2026
================
@@ -194,6 +194,28 @@ static DecodeStatus DecodeFPR128RegisterClass(MCInst &Inst, uint32_t RegNo,
return MCDisassembler::Success;
}
+static DecodeStatus DecodeFPR256RegisterClass(MCInst &Inst, uint64_t RegNo,
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topperc wrote:
Why is RegNo a `uint64_t` here but `uint32_t` in all existing code?
https://github.com/llvm/llvm-project/pull/174571
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