[llvm] [VE] Use `softPromoteHalfType` (PR #175141)
Trevor Gross via llvm-commits
llvm-commits at lists.llvm.org
Fri Jan 9 01:18:46 PST 2026
https://github.com/tgross35 created https://github.com/llvm/llvm-project/pull/175141
Follow suite from other targets.
Fixes the (unlisted) VE portion of https://github.com/llvm/llvm-project/issues/97975 Fixes the (unlisted) VE portion of https://github.com/llvm/llvm-project/issues/97981
>From 50fb6ab6356e0f816976fccbd9202cfee5021f57 Mon Sep 17 00:00:00 2001
From: Trevor Gross <tg at trevorgross.com>
Date: Thu, 8 Jan 2026 23:06:32 -0600
Subject: [PATCH] [VE] Use `softPromoteHalfType`
Follow suite from other targets.
Fixes the (unlisted) VE portion of https://github.com/llvm/llvm-project/issues/97975
Fixes the (unlisted) VE portion of https://github.com/llvm/llvm-project/issues/97981
---
llvm/lib/Target/VE/VEISelLowering.h | 1 +
llvm/test/CodeGen/Generic/half-op.ll | 2 +-
llvm/test/CodeGen/Generic/half.ll | 2 +-
llvm/test/CodeGen/VE/Scalar/fp_extload_truncstore.ll | 11 ++---------
4 files changed, 5 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/VE/VEISelLowering.h b/llvm/lib/Target/VE/VEISelLowering.h
index ad7cf3e902fb6..57ec4565e8353 100644
--- a/llvm/lib/Target/VE/VEISelLowering.h
+++ b/llvm/lib/Target/VE/VEISelLowering.h
@@ -294,6 +294,7 @@ class VETargetLowering : public TargetLowering {
// VE has NND instruction.
bool hasAndNot(SDValue Y) const override;
+ bool softPromoteHalfType() const override { return true; }
/// } Target Optimization
};
} // namespace llvm
diff --git a/llvm/test/CodeGen/Generic/half-op.ll b/llvm/test/CodeGen/Generic/half-op.ll
index f08c71b187eb1..650737bae17cf 100644
--- a/llvm/test/CodeGen/Generic/half-op.ll
+++ b/llvm/test/CodeGen/Generic/half-op.ll
@@ -36,7 +36,7 @@
; RUN: %if sparc-registered-target %{ llc %s -o - -mtriple=sparc64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK-NEG-ABS,CHECK-COPYSIGN,CHECK-FMA %}
; RUN: %if spirv-registered-target %{ llc %s -o - -mtriple=spirv-unknown-unknown | FileCheck %s --check-prefixes=NOCRASH %}
; RUN: %if systemz-registered-target %{ llc %s -o - -mtriple=s390x-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK-NEG-ABS,CHECK-COPYSIGN,CHECK-FMA %}
-; RUN: %if ve-registered-target %{ llc %s -o - -mtriple=ve-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD-NEG-ABS,BAD-COPYSIGN,BAD-FMA %}
+; RUN: %if ve-registered-target %{ llc %s -o - -mtriple=ve-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK-NEG-ABS,CHECK-COPYSIGN,CHECK-FMA %}
; RUN: %if webassembly-registered-target %{ llc %s -o - -mtriple=wasm32-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK-NEG-ABS,CHECK-COPYSIGN,CHECK-FMA %}
; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK-NEG-ABS,CHECK-COPYSIGN,CHECK-FMA %}
; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK-NEG-ABS,CHECK-COPYSIGN,CHECK-FMA %}
diff --git a/llvm/test/CodeGen/Generic/half.ll b/llvm/test/CodeGen/Generic/half.ll
index 115193d046782..2465b65ecbf2f 100644
--- a/llvm/test/CodeGen/Generic/half.ll
+++ b/llvm/test/CodeGen/Generic/half.ll
@@ -38,7 +38,7 @@
; RUN: %if sparc-registered-target %{ llc %s -o - -mtriple=sparc64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
; RUN: %if spirv-registered-target %{ llc %s -o - -mtriple=spirv-unknown-unknown | FileCheck %s --check-prefixes=NOCRASH %}
; RUN: %if systemz-registered-target %{ llc %s -o - -mtriple=s390x-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if ve-registered-target %{ llc %s -o - -mtriple=ve-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD %}
+; RUN: %if ve-registered-target %{ llc %s -o - -mtriple=ve-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK %}
; RUN: %if webassembly-registered-target %{ llc %s -o - -mtriple=wasm32-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK %}
; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK %}
diff --git a/llvm/test/CodeGen/VE/Scalar/fp_extload_truncstore.ll b/llvm/test/CodeGen/VE/Scalar/fp_extload_truncstore.ll
index f105966bc4d08..1d21b225b736b 100644
--- a/llvm/test/CodeGen/VE/Scalar/fp_extload_truncstore.ll
+++ b/llvm/test/CodeGen/VE/Scalar/fp_extload_truncstore.ll
@@ -192,21 +192,14 @@ define half @func_fp32fp16(ptr %fl.ptr, float %a) {
; CHECK-NEXT: or %s0, 0, %s62
; CHECK-NEXT: .LBB5_2:
; CHECK-NEXT: st %s18, 288(, %s11) # 8-byte Folded Spill
-; CHECK-NEXT: st %s19, 296(, %s11) # 8-byte Folded Spill
; CHECK-NEXT: or %s18, 0, %s0
; CHECK-NEXT: lea %s0, __truncsfhf2 at lo
; CHECK-NEXT: and %s0, %s0, (32)0
; CHECK-NEXT: lea.sl %s12, __truncsfhf2 at hi(, %s0)
; CHECK-NEXT: or %s0, 0, %s1
; CHECK-NEXT: bsic %s10, (, %s12)
-; CHECK-NEXT: or %s19, 0, %s0
-; CHECK-NEXT: lea %s0, __extendhfsf2 at lo
-; CHECK-NEXT: and %s0, %s0, (32)0
-; CHECK-NEXT: lea.sl %s12, __extendhfsf2 at hi(, %s0)
-; CHECK-NEXT: or %s0, 0, %s19
-; CHECK-NEXT: bsic %s10, (, %s12)
-; CHECK-NEXT: st2b %s19, (, %s18)
-; CHECK-NEXT: ld %s19, 296(, %s11) # 8-byte Folded Reload
+; CHECK-NEXT: and %s1, %s0, (32)0
+; CHECK-NEXT: st2b %s1, (, %s18)
; CHECK-NEXT: ld %s18, 288(, %s11) # 8-byte Folded Reload
; CHECK-NEXT: or %s11, 0, %s9
; CHECK-NEXT: ld %s10, 8(, %s11)
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