[llvm] [X86][NewPM] Port x86-fast-tile-config to NewPM (PR #174446)
via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 5 09:26:54 PST 2026
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-x86
Author: Aiden Grossman (boomanaiden154)
<details>
<summary>Changes</summary>
Standard porting. Refactor the current implementation, rename the legacy pass, and call the wrapper from the new pass manager.
---
Full diff: https://github.com/llvm/llvm-project/pull/174446.diff
5 Files Affected:
- (modified) llvm/lib/Target/X86/X86.h (+8-2)
- (modified) llvm/lib/Target/X86/X86FastTileConfig.cpp (+29-10)
- (modified) llvm/lib/Target/X86/X86PassRegistry.def (+1-1)
- (modified) llvm/lib/Target/X86/X86TargetMachine.cpp (+2-2)
- (modified) llvm/test/CodeGen/X86/AMX/amx-sink-config-after-calls.mir (+2-1)
``````````diff
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index f2f827765c201..2fd6ece9737a0 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -141,7 +141,13 @@ class X86FastPreTileConfigPass
FunctionPass *createX86FastPreTileConfigLegacyPass();
/// Return a pass that config the tile registers after fast reg allocation.
-FunctionPass *createX86FastTileConfigPass();
+class X86FastTileConfigPass : public PassInfoMixin<X86FastTileConfigPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createX86FastTileConfigLegacyPass();
/// Return a pass that insert pseudo tile config instruction.
FunctionPass *createX86PreTileConfigPass();
@@ -314,7 +320,7 @@ void initializeX86ExecutionDomainFixPass(PassRegistry &);
void initializeX86ExpandPseudoLegacyPass(PassRegistry &);
void initializeX86FPStackifierLegacyPass(PassRegistry &);
void initializeX86FastPreTileConfigLegacyPass(PassRegistry &);
-void initializeX86FastTileConfigPass(PassRegistry &);
+void initializeX86FastTileConfigLegacyPass(PassRegistry &);
void initializeX86FixupSetCCPassPass(PassRegistry &);
void initializeX86FlagsCopyLoweringLegacyPass(PassRegistry &);
void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86FastTileConfig.cpp b/llvm/lib/Target/X86/X86FastTileConfig.cpp
index d86ae36aa2a67..f9bf5575dd44a 100644
--- a/llvm/lib/Target/X86/X86FastTileConfig.cpp
+++ b/llvm/lib/Target/X86/X86FastTileConfig.cpp
@@ -31,11 +31,15 @@
using namespace llvm;
-#define DEBUG_TYPE "fasttileconfig"
+#define DEBUG_TYPE "x86-fast-tile-config"
namespace {
-class X86FastTileConfig : public MachineFunctionPass {
+class X86FastTileConfigImpl {
+public:
+ bool runOnMachineFunction(MachineFunction &MF);
+
+private:
// context
MachineFunction *MF = nullptr;
const TargetInstrInfo *TII = nullptr;
@@ -44,9 +48,11 @@ class X86FastTileConfig : public MachineFunctionPass {
X86MachineFunctionInfo *X86FI = nullptr;
bool configBasicBlock(MachineBasicBlock &MBB);
+};
+class X86FastTileConfigLegacy : public MachineFunctionPass {
public:
- X86FastTileConfig() : MachineFunctionPass(ID) {}
+ X86FastTileConfigLegacy() : MachineFunctionPass(ID) {}
/// Return the pass name.
StringRef getPassName() const override {
@@ -70,11 +76,11 @@ class X86FastTileConfig : public MachineFunctionPass {
} // end anonymous namespace
-char X86FastTileConfig::ID = 0;
+char X86FastTileConfigLegacy::ID = 0;
-INITIALIZE_PASS_BEGIN(X86FastTileConfig, DEBUG_TYPE,
+INITIALIZE_PASS_BEGIN(X86FastTileConfigLegacy, DEBUG_TYPE,
"Fast Tile Register Configure", false, false)
-INITIALIZE_PASS_END(X86FastTileConfig, DEBUG_TYPE,
+INITIALIZE_PASS_END(X86FastTileConfigLegacy, DEBUG_TYPE,
"Fast Tile Register Configure", false, false)
static bool isTileDef(MachineRegisterInfo *MRI, MachineInstr &MI) {
@@ -110,7 +116,7 @@ static unsigned getTMMIndex(Register Reg) {
// PreTileConfig should configure the tile registers based on basic
// block.
-bool X86FastTileConfig::configBasicBlock(MachineBasicBlock &MBB) {
+bool X86FastTileConfigImpl::configBasicBlock(MachineBasicBlock &MBB) {
bool Change = false;
SmallVector<std::pair<unsigned, ShapeT>, 6> ShapeInfos;
for (MachineInstr &MI : reverse(MBB)) {
@@ -168,7 +174,7 @@ bool X86FastTileConfig::configBasicBlock(MachineBasicBlock &MBB) {
return Change;
}
-bool X86FastTileConfig::runOnMachineFunction(MachineFunction &MFunc) {
+bool X86FastTileConfigImpl::runOnMachineFunction(MachineFunction &MFunc) {
X86FI = MFunc.getInfo<X86MachineFunctionInfo>();
// Early exit in the common case of non-AMX code.
if (X86FI->getAMXProgModel() != AMXProgModelEnum::ManagedRA)
@@ -188,6 +194,19 @@ bool X86FastTileConfig::runOnMachineFunction(MachineFunction &MFunc) {
return Change;
}
-FunctionPass *llvm::createX86FastTileConfigPass() {
- return new X86FastTileConfig();
+FunctionPass *llvm::createX86FastTileConfigLegacyPass() {
+ return new X86FastTileConfigLegacy();
+}
+
+bool X86FastTileConfigLegacy::runOnMachineFunction(MachineFunction &MF) {
+ X86FastTileConfigImpl Impl;
+ return Impl.runOnMachineFunction(MF);
+}
+
+PreservedAnalyses
+X86FastTileConfigPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ X86FastTileConfigImpl Impl;
+ Impl.runOnMachineFunction(MF);
+ return getMachineFunctionPassPreservedAnalyses().preserveSet<CFGAnalyses>();
}
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
index 64a1b1cdb4465..316a0722cd9e7 100644
--- a/llvm/lib/Target/X86/X86PassRegistry.def
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -38,6 +38,7 @@ MACHINE_FUNCTION_PASS("x86-domain-reassignment", X86DomainReassignmentPass())
MACHINE_FUNCTION_PASS("x86-dyn-alloca-expander", X86DynAllocaExpanderPass())
MACHINE_FUNCTION_PASS("x86-expand-pseudo", X86ExpandPseudoPass())
MACHINE_FUNCTION_PASS("x86-fast-pre-tile-config", X86FastPreTileConfigPass())
+MACHINE_FUNCTION_PASS("x86-fast-tile-config", X86FastTileConfigPass())
MACHINE_FUNCTION_PASS("x86-fixup-leas", X86FixupLEAsPass())
MACHINE_FUNCTION_PASS("x86-flags-copy-lowering", X86FlagsCopyLoweringPass())
MACHINE_FUNCTION_PASS("x86-fp-stackifier", X86FPStackifierPass())
@@ -49,7 +50,6 @@ MACHINE_FUNCTION_PASS("x86-optimize-leas", X86OptimizeLEAsPass())
#define DUMMY_MACHINE_FUNCTION_PASS(NAME, PASS_NAME)
#endif
DUMMY_MACHINE_FUNCTION_PASS("x86-execution-domain-fix", X86ExecutionDomainFix())
-DUMMY_MACHINE_FUNCTION_PASS("fasttileconfig", X86FastTileConfig())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-bw-inst", FixupBWInstPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-inst-tuning", X86FixupInstTuningPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-setcc", X86FixupSetCCPass())
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 09e1acb4c7a2f..edf454e119cf0 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -82,7 +82,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() {
initializeX86CmovConversionLegacyPass(PR);
initializeX86TileConfigPass(PR);
initializeX86FastPreTileConfigLegacyPass(PR);
- initializeX86FastTileConfigPass(PR);
+ initializeX86FastTileConfigLegacyPass(PR);
initializeKCFIPass(PR);
initializeX86LowerTileCopyPass(PR);
initializeX86ExpandPseudoLegacyPass(PR);
@@ -635,7 +635,7 @@ void X86PassConfig::addPreEmitPass2() {
}
bool X86PassConfig::addPostFastRegAllocRewrite() {
- addPass(createX86FastTileConfigPass());
+ addPass(createX86FastTileConfigLegacyPass());
return true;
}
diff --git a/llvm/test/CodeGen/X86/AMX/amx-sink-config-after-calls.mir b/llvm/test/CodeGen/X86/AMX/amx-sink-config-after-calls.mir
index 4eea98838910e..320118cc19376 100644
--- a/llvm/test/CodeGen/X86/AMX/amx-sink-config-after-calls.mir
+++ b/llvm/test/CodeGen/X86/AMX/amx-sink-config-after-calls.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
-# RUN: llc -mtriple=x86_64-- -mattr=+amx-int8,avx512f -run-pass="x86-fast-pre-tile-config,regallocfast,fasttileconfig" -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64-- -mattr=+amx-int8,avx512f -run-pass="x86-fast-pre-tile-config,regallocfast,x86-fast-tile-config" -verify-machineinstrs -o - %s | FileCheck %s
+# RUN: llc -mtriple=x86_64-- -mattr=+amx-int8,avx512f -passes="x86-fast-pre-tile-config,regallocfast,x86-fast-tile-config" -o - %s | FileCheck %s
# Test to verify that ldtilecfg instructions are sinked closer to tile defining
# instructions after a call. This ensures call does not overwrite values in
``````````
</details>
https://github.com/llvm/llvm-project/pull/174446
More information about the llvm-commits
mailing list