[llvm] M68k call seq start fix (PR #175457)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 11 12:48:47 PST 2026
https://github.com/knickish updated https://github.com/llvm/llvm-project/pull/175457
>From ac4c6af91d7643ba78245a5436a97867821efcc2 Mon Sep 17 00:00:00 2001
From: kirk <knickish at gmail.com>
Date: Sun, 23 Mar 2025 01:05:12 +0000
Subject: [PATCH 1/3] [M68k] add test showing callseq begin failure for doubles
---
llvm/test/CodeGen/M68k/Regression/146213.ll | 54 +++++++++++++++++++++
1 file changed, 54 insertions(+)
create mode 100644 llvm/test/CodeGen/M68k/Regression/146213.ll
diff --git a/llvm/test/CodeGen/M68k/Regression/146213.ll b/llvm/test/CodeGen/M68k/Regression/146213.ll
new file mode 100644
index 0000000000000..997df1b569ca7
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/146213.ll
@@ -0,0 +1,54 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=m68k-linux | FileCheck %s
+
+declare float @float_arg(float)
+declare float @double_arg(double)
+
+define float @float_arg_test(ptr %inout) nounwind {
+; CHECK-LABEL: float_arg_test:
+; CHECK: ; %bb.0: ; %start
+; CHECK-NEXT: suba.l #12, %sp
+; CHECK-NEXT: movem.l %a2, (8,%sp) ; 8-byte Folded Spill
+; CHECK-NEXT: move.l #0, (%sp)
+; CHECK-NEXT: jsr float_arg
+; CHECK-NEXT: move.l (16,%sp), %a2
+; CHECK-NEXT: move.l (%a2), (%sp)
+; CHECK-NEXT: move.l #0, (4,%sp)
+; CHECK-NEXT: jsr __mulsf3
+; CHECK-NEXT: move.l %d0, (%a2)
+; CHECK-NEXT: moveq #0, %d0
+; CHECK-NEXT: movem.l (8,%sp), %a2 ; 8-byte Folded Reload
+; CHECK-NEXT: adda.l #12, %sp
+; CHECK-NEXT: rts
+start:
+ %_58 = call float @float_arg(float 0.000000e+00)
+ %_60 = load float, ptr %inout, align 8
+ %_57 = fmul float 0.000000e+00, %_60
+ store float %_57, ptr %inout, align 8
+ ret float 0.000000e+00
+}
+
+define float @double_arg_test(ptr %inout) nounwind {
+; CHECK-LABEL: double_arg_test:
+; CHECK: ; %bb.0: ; %start
+; CHECK-NEXT: suba.l #12, %sp
+; CHECK-NEXT: movem.l %a2, (8,%sp) ; 8-byte Folded Spill
+; CHECK-NEXT: move.l #0, (4,%sp)
+; CHECK-NEXT: move.l #0, (%sp)
+; CHECK-NEXT: jsr double_arg
+; CHECK-NEXT: move.l (16,%sp), %a2
+; CHECK-NEXT: move.l (%a2), (%sp)
+; CHECK-NEXT: move.l #0, (4,%sp)
+; CHECK-NEXT: jsr __mulsf3
+; CHECK-NEXT: move.l %d0, (%a2)
+; CHECK-NEXT: moveq #0, %d0
+; CHECK-NEXT: movem.l (8,%sp), %a2 ; 8-byte Folded Reload
+; CHECK-NEXT: adda.l #12, %sp
+; CHECK-NEXT: rts
+start:
+ %_58 = call float @double_arg(double 0.000000e+00)
+ %_60 = load float, ptr %inout, align 8
+ %_57 = fmul float 0.000000e+00, %_60
+ store float %_57, ptr %inout, align 8
+ ret float 0.000000e+00
+}
>From 1dc3b297df90d5f48a4bb35764434b55c2da4177 Mon Sep 17 00:00:00 2001
From: kirk <knickish at gmail.com>
Date: Sun, 11 Jan 2026 15:58:15 +0000
Subject: [PATCH 2/3] Update combined load/store pattern fragments, ensuring
that there are no other callseq_end (or lowered equivalents) in the chain
before proceeding. This change essentially replaces a chain dependency with a
register dependency, which is necessary for scheduling.
---
llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp | 51 +
llvm/lib/Target/M68k/M68kInstrData.td | 36 +-
llvm/lib/Target/M68k/M68kInstrInfo.td | 12 +
llvm/test/CodeGen/M68k/Regression/146213.ll | 10 +
llvm/test/CodeGen/M68k/Regression/146213.s | 48 +
llvm/test/CodeGen/M68k/Regression/double.svg | 930 ++++++++++++++++++
llvm/test/CodeGen/M68k/Regression/float.svg | 870 ++++++++++++++++
.../M68k/Regression/i386-pre-sched.dot | 135 +++
.../M68k/Regression/i386-pre-select.dot | 116 +++
.../M68k/Regression/m68k-pre-sched.dot | 106 ++
.../M68k/Regression/m68k-pre-select.dot | 116 +++
11 files changed, 2424 insertions(+), 6 deletions(-)
create mode 100644 llvm/test/CodeGen/M68k/Regression/146213.s
create mode 100644 llvm/test/CodeGen/M68k/Regression/double.svg
create mode 100644 llvm/test/CodeGen/M68k/Regression/float.svg
create mode 100644 llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot
create mode 100644 llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot
create mode 100644 llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot
create mode 100644 llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot
diff --git a/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp b/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
index 9c3d61ec60e00..68d919362c251 100644
--- a/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
+++ b/llvm/lib/Target/M68k/M68kISelDAGToDAG.cpp
@@ -172,6 +172,57 @@ struct M68kISelAddressMode {
namespace {
+static bool hasCallSeqEndInChain(SDValue Chain) {
+ SmallVector<SDValue, 8> Worklist;
+ SmallPtrSet<SDNode *, 16> Visited;
+ Worklist.push_back(Chain);
+
+ while (!Worklist.empty()) {
+ SDNode *CN = Worklist.pop_back_val().getNode();
+ if (!CN || !Visited.insert(CN).second)
+ continue;
+
+ if (CN->getOpcode() == ISD::CALLSEQ_END)
+ return true;
+ if (CN->isMachineOpcode() && CN->getMachineOpcode() == M68k::ADJCALLSTACKUP)
+ return true;
+
+ if (CN->getOpcode() == ISD::TokenFactor) {
+ for (const SDValue &Op : CN->op_values())
+ if (Op.getValueType() == MVT::Other)
+ Worklist.push_back(Op);
+ continue;
+ }
+
+ for (const SDValue &Op : CN->op_values())
+ if (Op.getValueType() == MVT::Other) {
+ if (Worklist.size() == 8) {
+ // We can't actually evaluate all branches,
+ // be pessimistic and fail out.
+ return true;
+ }
+ Worklist.push_back(Op);
+ break;
+ }
+ }
+ return false;
+}
+
+// Helper for use in TableGen. We can't safely use a combined load/store in the
+// case where a token factor can cause a chain dep on a different call sequence.
+// Look for that case and return false if we can't confirm it's safe. This is
+// necessary due to the nesting level tracking in
+// ScheduleDAGRRList::FindCallSeqStart.
+static bool isSafeStoreLoad(SDNode *N) {
+ auto *ST = dyn_cast<StoreSDNode>(N);
+ if (!ST)
+ return false;
+ auto *LD = dyn_cast<LoadSDNode>(ST->getValue());
+ if (!LD)
+ return false;
+ return !hasCallSeqEndInChain(LD->getChain());
+}
+
class M68kDAGToDAGISel : public SelectionDAGISel {
public:
M68kDAGToDAGISel() = delete;
diff --git a/llvm/lib/Target/M68k/M68kInstrData.td b/llvm/lib/Target/M68k/M68kInstrData.td
index 9888b4c2b0633..a2e5589d2c89e 100644
--- a/llvm/lib/Target/M68k/M68kInstrData.td
+++ b/llvm/lib/Target/M68k/M68kInstrData.td
@@ -220,14 +220,38 @@ class MxMove_MM<MxType TYPE, MxOpBundle DST, MxOpBundle SRC,
MxMoveEncoding<!cast<MxMoveSize>("MxMoveSize"#TYPE.Size),
DST_ENC, SRC_ENC>>;
+// Use a store-load patfrag that can reject unsafe load chains (e.g. callseq).
+let mayLoad = 1, mayStore = 1 in
+class MxMove_MM_Safe<MxType TYPE, PatFrag StoreLoad,
+ MxOpBundle DST, MxOpBundle SRC,
+ MxEncMemOp DST_ENC, MxEncMemOp SRC_ENC>
+ : MxMove<TYPE.Prefix, (outs), (ins DST.Op:$dst, SRC.Op:$src),
+ [(StoreLoad DST.Pat:$dst, SRC.Pat:$src)],
+ MxMoveEncoding<!cast<MxMoveSize>("MxMoveSize"#TYPE.Size),
+ DST_ENC, SRC_ENC>>;
+
foreach DST_AM = MxMoveSupportedAMs in
foreach SRC_AM = MxMoveSupportedAMs in {
- foreach TYPE = [MxType8, MxType16, MxType32] in
- def MOV # TYPE.Size # DST_AM # SRC_AM # TYPE.Postfix
- : MxMove_MM<TYPE, !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#DST_AM),
- !cast<MxOpBundle>("MxOp"#TYPE.Size#"AddrMode_"#SRC_AM),
- !cast<MxEncMemOp>("MxMoveDstOpEnc_"#DST_AM),
- !cast<MxEncMemOp>("MxMoveSrcOpEnc_"#SRC_AM)>;
+ def MOV8 # DST_AM # SRC_AM # !cast<MxType>("MxType8").Postfix
+ : MxMove_MM_Safe<MxType8, Mxstoreloadi8_safe,
+ !cast<MxOpBundle>("MxOp8AddrMode_"#DST_AM),
+ !cast<MxOpBundle>("MxOp8AddrMode_"#SRC_AM),
+ !cast<MxEncMemOp>("MxMoveDstOpEnc_"#DST_AM),
+ !cast<MxEncMemOp>("MxMoveSrcOpEnc_"#SRC_AM)>;
+
+ def MOV16 # DST_AM # SRC_AM # !cast<MxType>("MxType16").Postfix
+ : MxMove_MM_Safe<MxType16, Mxstoreloadi16_safe,
+ !cast<MxOpBundle>("MxOp16AddrMode_"#DST_AM),
+ !cast<MxOpBundle>("MxOp16AddrMode_"#SRC_AM),
+ !cast<MxEncMemOp>("MxMoveDstOpEnc_"#DST_AM),
+ !cast<MxEncMemOp>("MxMoveSrcOpEnc_"#SRC_AM)>;
+
+ def MOV32 # DST_AM # SRC_AM # !cast<MxType>("MxType32").Postfix
+ : MxMove_MM_Safe<MxType32, Mxstoreloadi32_safe,
+ !cast<MxOpBundle>("MxOp32AddrMode_"#DST_AM),
+ !cast<MxOpBundle>("MxOp32AddrMode_"#SRC_AM),
+ !cast<MxEncMemOp>("MxMoveDstOpEnc_"#DST_AM),
+ !cast<MxEncMemOp>("MxMoveSrcOpEnc_"#SRC_AM)>;
} // foreach SRC_AM
// Store ABS(basically pointer) as Immdiate to Mem
diff --git a/llvm/lib/Target/M68k/M68kInstrInfo.td b/llvm/lib/Target/M68k/M68kInstrInfo.td
index 1200c493f9fca..2f93880368a3f 100644
--- a/llvm/lib/Target/M68k/M68kInstrInfo.td
+++ b/llvm/lib/Target/M68k/M68kInstrInfo.td
@@ -573,6 +573,18 @@ def Mxloadi32 : PatFrag<(ops node:$ptr), (i32 (unindexedload node:$ptr)), [{
return false;
}]>;
+def Mxstoreloadi8_safe : PatFrag<(ops node:$dst, node:$src),
+ (store (i8 (unindexedload node:$src)),
+ node:$dst), [{ return isSafeStoreLoad(N); }]>;
+
+def Mxstoreloadi16_safe : PatFrag<(ops node:$dst, node:$src),
+ (store (i16 (unindexedload node:$src)),
+ node:$dst), [{ return isSafeStoreLoad(N); }]>;
+
+def Mxstoreloadi32_safe : PatFrag<(ops node:$dst, node:$src),
+ (store (i32 (unindexedload node:$src)),
+ node:$dst),[{ return isSafeStoreLoad(N); }]>;
+
def Mxloadi8 : PatFrag<(ops node:$ptr), (i8 (load node:$ptr))>;
def MxSExtLoadi16i8 : PatFrag<(ops node:$ptr), (i16 (sextloadi8 node:$ptr))>;
diff --git a/llvm/test/CodeGen/M68k/Regression/146213.ll b/llvm/test/CodeGen/M68k/Regression/146213.ll
index 997df1b569ca7..6a4b6793d676f 100644
--- a/llvm/test/CodeGen/M68k/Regression/146213.ll
+++ b/llvm/test/CodeGen/M68k/Regression/146213.ll
@@ -1,9 +1,18 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc < %s -mtriple=m68k-linux | FileCheck %s
+; In this bug, we can see that a chain was generated that started from an ADJCALLSTACKUP
+; (lowered callseq_end for fmul) and crossed over to join the unrelated chain going through
+; the ADJCALLSTACKUP/DOWN for @double_arg. This resulted in an assertion firing during
+; scheduling, as the ADJCALLSTACKDOWN nodes do not depend on each other. This meant that
+; two ADJCALLSTACKUP (lowered callseq_end) nodes were encountered for the chain branch for
+; @double_arg, but only one ADJCALLSTACKDOWN would be present as they did not depend on
+; each other.
+
declare float @float_arg(float)
declare float @double_arg(double)
+; This works correctly
define float @float_arg_test(ptr %inout) nounwind {
; CHECK-LABEL: float_arg_test:
; CHECK: ; %bb.0: ; %start
@@ -28,6 +37,7 @@ start:
ret float 0.000000e+00
}
+; This fails to find a chain
define float @double_arg_test(ptr %inout) nounwind {
; CHECK-LABEL: double_arg_test:
; CHECK: ; %bb.0: ; %start
diff --git a/llvm/test/CodeGen/M68k/Regression/146213.s b/llvm/test/CodeGen/M68k/Regression/146213.s
new file mode 100644
index 0000000000000..e82b049f6e877
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/146213.s
@@ -0,0 +1,48 @@
+ .file "146213.ll"
+ .text
+ .globl float_arg_test ; -- Begin function float_arg_test
+ .p2align 1
+ .type float_arg_test, at function
+float_arg_test: ; @float_arg_test
+; %bb.0: ; %start
+ suba.l #12, %sp
+ movem.l %a2, (8,%sp) ; 8-byte Folded Spill
+ move.l #0, (%sp)
+ jsr float_arg
+ move.l (16,%sp), %a2
+ move.l (%a2), %d0
+ move.l %d0, (%sp)
+ move.l #0, (4,%sp)
+ jsr __mulsf3
+ move.l %d0, (%a2)
+ moveq #0, %d0
+ movem.l (8,%sp), %a2 ; 8-byte Folded Reload
+ adda.l #12, %sp
+ rts
+.Lfunc_end0:
+ .size float_arg_test, .Lfunc_end0-float_arg_test
+ ; -- End function
+ .globl double_arg_test ; -- Begin function double_arg_test
+ .p2align 1
+ .type double_arg_test, at function
+double_arg_test: ; @double_arg_test
+; %bb.0: ; %start
+ suba.l #12, %sp
+ movem.l %a2, (8,%sp) ; 8-byte Folded Spill
+ move.l #0, (4,%sp)
+ move.l #0, (%sp)
+ jsr double_arg
+ move.l (16,%sp), %a2
+ move.l (%a2), %d0
+ move.l %d0, (%sp)
+ move.l #0, (4,%sp)
+ jsr __mulsf3
+ move.l %d0, (%a2)
+ moveq #0, %d0
+ movem.l (8,%sp), %a2 ; 8-byte Folded Reload
+ adda.l #12, %sp
+ rts
+.Lfunc_end1:
+ .size double_arg_test, .Lfunc_end1-double_arg_test
+ ; -- End function
+ .section ".note.GNU-stack","", at progbits
diff --git a/llvm/test/CodeGen/M68k/Regression/double.svg b/llvm/test/CodeGen/M68k/Regression/double.svg
new file mode 100644
index 0000000000000..5f2c43cc53ff5
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/double.svg
@@ -0,0 +1,930 @@
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diff --git a/llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot b/llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot
new file mode 100644
index 0000000000000..ef15ef62c017b
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot
@@ -0,0 +1,135 @@
+digraph "scheduler input for double_arg_test:start" {
+ rankdir="BT";
+ label="scheduler input for double_arg_test:start";
+
+ Node0x5607d6dee470 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e379c0 [shape=record,shape=Mrecord,label="{MOV32r0|t8|{<d0>i32|<d1>i32}}"];
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+ Node0x5607d6e37aa0 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
+ Node0x5607d6e37b80 [shape=record,shape=Mrecord,label="{Register $esp|t12|{<d0>i32}}"];
+ Node0x5607d6e37e90 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=7]|t19|{<d0>i32}}"];
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+ Node0x5607d6e38050 [shape=record,shape=Mrecord,label="{Register $eax|t23|{<d0>i32}}"];
+ Node0x5607d6e38600 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3'|t46|{<d0>i32}}"];
+ Node0x5607d6e37790 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5}|MOV32rm\<Mem:(load (s32) from %fixed-stack.0)\>|t3|{<d0>i32|<d1>ch}}"];
+ Node0x5607d6e37790:s0 -> Node0x5607d6e37cd0:d0;
+ Node0x5607d6e37790:s1 -> Node0x5607d6e37800:d0;
+ Node0x5607d6e37790:s2 -> Node0x5607d6e38210:d0;
+ Node0x5607d6e37790:s3 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e37790:s4 -> Node0x5607d6e38280:d0;
+ Node0x5607d6e37790:s5 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
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+ Node0x5607d6e37b10:s1 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e37b10:s2 -> Node0x5607d6e37aa0:d0;
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+ Node0x5607d6e38130:s0 -> Node0x5607d6e37950:d1[color=blue,style=dashed];
+ Node0x5607d6e38130:s1 -> Node0x5607d6e37b80:d0;
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+ Node0x5607d6e37bf0:s0 -> Node0x5607d6e37b10:d1[color=blue,style=dashed];
+ Node0x5607d6e37bf0:s1 -> Node0x5607d6e37b80:d0;
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+ Node0x5607d6e37c60:s0 -> Node0x5607d6e37bf0:d0;
+ Node0x5607d6e37c60:s1 -> Node0x5607d6e37800:d0;
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+ Node0x5607d6e38520:s0 -> Node0x5607d6e38130:d0;
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+ Node0x5607d6e37db0:s0 -> Node0x5607d6e37bf0:d0;
+ Node0x5607d6e37db0:s1 -> Node0x5607d6e37800:d0;
+ Node0x5607d6e37db0:s2 -> Node0x5607d6e38210:d0;
+ Node0x5607d6e37db0:s3 -> Node0x5607d6e378e0:d0;
+ Node0x5607d6e37db0:s4 -> Node0x5607d6e38280:d0;
+ Node0x5607d6e37db0:s5 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e37db0:s6 -> Node0x5607d6e37b10:d1[color=blue,style=dashed];
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+ Node0x5607d6e37e20:s0 -> Node0x5607d6e37c60:d0[color=blue,style=dashed];
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+ Node0x5607d6e37f70:s1 -> Node0x5607d6e37f00:d0;
+ Node0x5607d6e37f70:s2 -> Node0x5607d6e37e20:d0[color=blue,style=dashed];
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+ Node0x5607d6e37fe0:s0 -> Node0x5607d6e37a30:d0;
+ Node0x5607d6e37fe0:s1 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e37fe0:s2 -> Node0x5607d6e37f70:d0[color=blue,style=dashed];
+ Node0x5607d6e37fe0:s3 -> Node0x5607d6e37f70:d1[color=red,style=bold];
+ Node0x5607d6e381a0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5}|MOV32rm\<Mem:(load (s32) from %ir.inout, align 8)\>|t38|{<d0>i32|<d1>ch}}"];
+ Node0x5607d6e381a0:s0 -> Node0x5607d6e37790:d0;
+ Node0x5607d6e381a0:s1 -> Node0x5607d6e37800:d0;
+ Node0x5607d6e381a0:s2 -> Node0x5607d6e38210:d0;
+ Node0x5607d6e381a0:s3 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e381a0:s4 -> Node0x5607d6e38280:d0;
+ Node0x5607d6e381a0:s5 -> Node0x5607d6e37fe0:d1[color=blue,style=dashed];
+ Node0x5607d6e380c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t24|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x5607d6e380c0:s0 -> Node0x5607d6e37fe0:d1[color=blue,style=dashed];
+ Node0x5607d6e380c0:s1 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e380c0:s2 -> Node0x5607d6e37fe0:d2[color=red,style=bold];
+ Node0x5607d6e38440 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5|<s6>6}|MOV32mr\<Mem:(store (s32) into stack)\>|t42|{<d0>ch}}"];
+ Node0x5607d6e38440:s0 -> Node0x5607d6e38130:d0;
+ Node0x5607d6e38440:s1 -> Node0x5607d6e37800:d0;
+ Node0x5607d6e38440:s2 -> Node0x5607d6e38210:d0;
+ Node0x5607d6e38440:s3 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e38440:s4 -> Node0x5607d6e38280:d0;
+ Node0x5607d6e38440:s5 -> Node0x5607d6e381a0:d0;
+ Node0x5607d6e38440:s6 -> Node0x5607d6e37950:d1[color=blue,style=dashed];
+ Node0x5607d6e38590 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
+ Node0x5607d6e38590:s0 -> Node0x5607d6e38440:d0[color=blue,style=dashed];
+ Node0x5607d6e38590:s1 -> Node0x5607d6e38520:d0[color=blue,style=dashed];
+ Node0x5607d6e3db50 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CALLpcrel32|t47|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e3db50:s0 -> Node0x5607d6e38600:d0;
+ Node0x5607d6e3db50:s1 -> Node0x5607d6e37f00:d0;
+ Node0x5607d6e3db50:s2 -> Node0x5607d6e38590:d0[color=blue,style=dashed];
+ Node0x5607d6e3dbc0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKUP32|t48|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x5607d6e3dbc0:s0 -> Node0x5607d6e37a30:d0;
+ Node0x5607d6e3dbc0:s1 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e3dbc0:s2 -> Node0x5607d6e3db50:d0[color=blue,style=dashed];
+ Node0x5607d6e3dbc0:s3 -> Node0x5607d6e3db50:d1[color=red,style=bold];
+ Node0x5607d6e3dc30 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t49|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x5607d6e3dc30:s0 -> Node0x5607d6e3dbc0:d1[color=blue,style=dashed];
+ Node0x5607d6e3dc30:s1 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e3dc30:s2 -> Node0x5607d6e3dbc0:d2[color=red,style=bold];
+ Node0x5607d6e3dca0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5|<s6>6}|MOV32mr\<Mem:(store (s32) into %ir.inout, align 8)\>|t50|{<d0>ch}}"];
+ Node0x5607d6e3dca0:s0 -> Node0x5607d6e37790:d0;
+ Node0x5607d6e3dca0:s1 -> Node0x5607d6e37800:d0;
+ Node0x5607d6e3dca0:s2 -> Node0x5607d6e38210:d0;
+ Node0x5607d6e3dca0:s3 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e3dca0:s4 -> Node0x5607d6e38280:d0;
+ Node0x5607d6e3dca0:s5 -> Node0x5607d6e3dc30:d0;
+ Node0x5607d6e3dca0:s6 -> Node0x5607d6e381a0:d1[color=blue,style=dashed];
+ Node0x5607d6e382f0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
+ Node0x5607d6e382f0:s0 -> Node0x5607d6e3dca0:d0[color=blue,style=dashed];
+ Node0x5607d6e382f0:s1 -> Node0x5607d6e380c0:d1[color=blue,style=dashed];
+ Node0x5607d6e38360 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e38360:s0 -> Node0x5607d6e382f0:d0[color=blue,style=dashed];
+ Node0x5607d6e38360:s1 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e38360:s2 -> Node0x5607d6e379c0:d0;
+ Node0x5607d6e383d0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|RET|t31|{<d0>ch}}"];
+ Node0x5607d6e383d0:s0 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e383d0:s1 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e383d0:s2 -> Node0x5607d6e38360:d0[color=blue,style=dashed];
+ Node0x5607d6e383d0:s3 -> Node0x5607d6e38360:d1[color=red,style=bold];
+ Node0x5607d6e37800 [shape=record,shape=Mrecord,label="{TargetConstant\<1\>|t51|{<d0>i8}}"];
+ Node0x5607d6e38210 [shape=record,shape=Mrecord,label="{Register $noreg|t52|{<d0>i32}}"];
+ Node0x5607d6e38280 [shape=record,shape=Mrecord,label="{Register $noreg|t53|{<d0>i16}}"];
+ Node0x5607d6e378e0 [shape=record,shape=Mrecord,label="{TargetConstant\<4\>|t54|{<d0>i32}}"];
+ Node0x5607d6e37cd0 [shape=record,shape=Mrecord,label="{TargetFrameIndex\<-1\>|t55|{<d0>i32}}"];
+ Node0x0[ plaintext=circle, label ="GraphRoot"];
+ Node0x0 -> Node0x5607d6e383d0:d0[color=blue,style=dashed];
+}
diff --git a/llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot b/llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot
new file mode 100644
index 0000000000000..d828efc46c0ab
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot
@@ -0,0 +1,116 @@
+digraph "isel input for double_arg_test:start" {
+ rankdir="BT";
+ label="isel input for double_arg_test:start";
+
+ Node0x5607d6dee470 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e376b0 [shape=record,shape=Mrecord,label="{FrameIndex\<-1\>|t1|{<d0>i32}}"];
+ Node0x5607d6e37720 [shape=record,shape=Mrecord,label="{undef|t2|{<d0>i32}}"];
+ Node0x5607d6e379c0 [shape=record,shape=Mrecord,label="{Constant\<0\>|t8|{<d0>i32}}"];
+ Node0x5607d6e37a30 [shape=record,shape=Mrecord,label="{TargetConstant\<8\>|t9|{<d0>i32}}"];
+ Node0x5607d6e37aa0 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
+ Node0x5607d6e37b80 [shape=record,shape=Mrecord,label="{Register $esp|t12|{<d0>i32}}"];
+ Node0x5607d6e37cd0 [shape=record,shape=Mrecord,label="{Constant\<4\>|t15|{<d0>i32}}"];
+ Node0x5607d6e37e90 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=7]|t19|{<d0>i32}}"];
+ Node0x5607d6e37f00 [shape=record,shape=Mrecord,label="{RegisterMask|t20|{<d0>Untyped}}"];
+ Node0x5607d6e38050 [shape=record,shape=Mrecord,label="{Register $eax|t23|{<d0>i32}}"];
+ Node0x5607d6e38600 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3'|t46|{<d0>i32}}"];
+ Node0x5607d6e37790 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|load\<(load (s32) from %fixed-stack.0)\>|t3|{<d0>i32|<d1>ch}}"];
+ Node0x5607d6e37790:s0 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
+ Node0x5607d6e37790:s1 -> Node0x5607d6e376b0:d0;
+ Node0x5607d6e37790:s2 -> Node0x5607d6e37720:d0;
+ Node0x5607d6e37950 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|callseq_start|t40|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e37950:s0 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
+ Node0x5607d6e37950:s1 -> Node0x5607d6e37a30:d0;
+ Node0x5607d6e37950:s2 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e37b10 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|callseq_start|t11|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e37b10:s0 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
+ Node0x5607d6e37b10:s1 -> Node0x5607d6e37a30:d0;
+ Node0x5607d6e37b10:s2 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e38130 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t41|{<d0>i32|<d1>ch}}"];
+ Node0x5607d6e38130:s0 -> Node0x5607d6e37950:d0[color=blue,style=dashed];
+ Node0x5607d6e38130:s1 -> Node0x5607d6e37b80:d0;
+ Node0x5607d6e37bf0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t13|{<d0>i32|<d1>ch}}"];
+ Node0x5607d6e37bf0:s0 -> Node0x5607d6e37b10:d0[color=blue,style=dashed];
+ Node0x5607d6e37bf0:s1 -> Node0x5607d6e37b80:d0;
+ Node0x5607d6e384b0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|add|t43|{<d0>i32}}"];
+ Node0x5607d6e384b0:s0 -> Node0x5607d6e38130:d0;
+ Node0x5607d6e384b0:s1 -> Node0x5607d6e37cd0:d0;
+ Node0x5607d6e37d40 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|add|t16|{<d0>i32}}"];
+ Node0x5607d6e37d40:s0 -> Node0x5607d6e37bf0:d0;
+ Node0x5607d6e37d40:s1 -> Node0x5607d6e37cd0:d0;
+ Node0x5607d6e37c60 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack)\>|t14|{<d0>ch}}"];
+ Node0x5607d6e37c60:s0 -> Node0x5607d6e37b10:d0[color=blue,style=dashed];
+ Node0x5607d6e37c60:s1 -> Node0x5607d6e379c0:d0;
+ Node0x5607d6e37c60:s2 -> Node0x5607d6e37bf0:d0;
+ Node0x5607d6e37c60:s3 -> Node0x5607d6e37720:d0;
+ Node0x5607d6e38520 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack + 4)\>|t44|{<d0>ch}}"];
+ Node0x5607d6e38520:s0 -> Node0x5607d6e37950:d0[color=blue,style=dashed];
+ Node0x5607d6e38520:s1 -> Node0x5607d6e379c0:d0;
+ Node0x5607d6e38520:s2 -> Node0x5607d6e384b0:d0;
+ Node0x5607d6e38520:s3 -> Node0x5607d6e37720:d0;
+ Node0x5607d6e37db0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack + 4)\>|t17|{<d0>ch}}"];
+ Node0x5607d6e37db0:s0 -> Node0x5607d6e37b10:d0[color=blue,style=dashed];
+ Node0x5607d6e37db0:s1 -> Node0x5607d6e379c0:d0;
+ Node0x5607d6e37db0:s2 -> Node0x5607d6e37d40:d0;
+ Node0x5607d6e37db0:s3 -> Node0x5607d6e37720:d0;
+ Node0x5607d6e37e20 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t18|{<d0>ch}}"];
+ Node0x5607d6e37e20:s0 -> Node0x5607d6e37c60:d0[color=blue,style=dashed];
+ Node0x5607d6e37e20:s1 -> Node0x5607d6e37db0:d0[color=blue,style=dashed];
+ Node0x5607d6e37f70 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|X86ISD::CALL|t21|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e37f70:s0 -> Node0x5607d6e37e20:d0[color=blue,style=dashed];
+ Node0x5607d6e37f70:s1 -> Node0x5607d6e37e90:d0;
+ Node0x5607d6e37f70:s2 -> Node0x5607d6e37f00:d0;
+ Node0x5607d6e37fe0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|callseq_end|t22|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e37fe0:s0 -> Node0x5607d6e37f70:d0[color=blue,style=dashed];
+ Node0x5607d6e37fe0:s1 -> Node0x5607d6e37a30:d0;
+ Node0x5607d6e37fe0:s2 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e37fe0:s3 -> Node0x5607d6e37f70:d1[color=red,style=bold];
+ Node0x5607d6e381a0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|load\<(load (s32) from %ir.inout, align 8)\>|t38|{<d0>i32|<d1>ch}}"];
+ Node0x5607d6e381a0:s0 -> Node0x5607d6e37fe0:d0[color=blue,style=dashed];
+ Node0x5607d6e381a0:s1 -> Node0x5607d6e37790:d0;
+ Node0x5607d6e381a0:s2 -> Node0x5607d6e37720:d0;
+ Node0x5607d6e380c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t24|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x5607d6e380c0:s0 -> Node0x5607d6e37fe0:d0[color=blue,style=dashed];
+ Node0x5607d6e380c0:s1 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e380c0:s2 -> Node0x5607d6e37fe0:d1[color=red,style=bold];
+ Node0x5607d6e38440 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack)\>|t42|{<d0>ch}}"];
+ Node0x5607d6e38440:s0 -> Node0x5607d6e37950:d0[color=blue,style=dashed];
+ Node0x5607d6e38440:s1 -> Node0x5607d6e381a0:d0;
+ Node0x5607d6e38440:s2 -> Node0x5607d6e38130:d0;
+ Node0x5607d6e38440:s3 -> Node0x5607d6e37720:d0;
+ Node0x5607d6e38590 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
+ Node0x5607d6e38590:s0 -> Node0x5607d6e38440:d0[color=blue,style=dashed];
+ Node0x5607d6e38590:s1 -> Node0x5607d6e38520:d0[color=blue,style=dashed];
+ Node0x5607d6e3db50 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|X86ISD::CALL|t47|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e3db50:s0 -> Node0x5607d6e38590:d0[color=blue,style=dashed];
+ Node0x5607d6e3db50:s1 -> Node0x5607d6e38600:d0;
+ Node0x5607d6e3db50:s2 -> Node0x5607d6e37f00:d0;
+ Node0x5607d6e3dbc0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|callseq_end|t48|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e3dbc0:s0 -> Node0x5607d6e3db50:d0[color=blue,style=dashed];
+ Node0x5607d6e3dbc0:s1 -> Node0x5607d6e37a30:d0;
+ Node0x5607d6e3dbc0:s2 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e3dbc0:s3 -> Node0x5607d6e3db50:d1[color=red,style=bold];
+ Node0x5607d6e3dc30 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t49|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x5607d6e3dc30:s0 -> Node0x5607d6e3dbc0:d0[color=blue,style=dashed];
+ Node0x5607d6e3dc30:s1 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e3dc30:s2 -> Node0x5607d6e3dbc0:d1[color=red,style=bold];
+ Node0x5607d6e3dca0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into %ir.inout, align 8)\>|t50|{<d0>ch}}"];
+ Node0x5607d6e3dca0:s0 -> Node0x5607d6e381a0:d1[color=blue,style=dashed];
+ Node0x5607d6e3dca0:s1 -> Node0x5607d6e3dc30:d0;
+ Node0x5607d6e3dca0:s2 -> Node0x5607d6e37790:d0;
+ Node0x5607d6e3dca0:s3 -> Node0x5607d6e37720:d0;
+ Node0x5607d6e382f0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
+ Node0x5607d6e382f0:s0 -> Node0x5607d6e3dca0:d0[color=blue,style=dashed];
+ Node0x5607d6e382f0:s1 -> Node0x5607d6e380c0:d1[color=blue,style=dashed];
+ Node0x5607d6e38360 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
+ Node0x5607d6e38360:s0 -> Node0x5607d6e382f0:d0[color=blue,style=dashed];
+ Node0x5607d6e38360:s1 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e38360:s2 -> Node0x5607d6e379c0:d0;
+ Node0x5607d6e383d0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|X86ISD::RET_GLUE|t31|{<d0>ch}}"];
+ Node0x5607d6e383d0:s0 -> Node0x5607d6e38360:d0[color=blue,style=dashed];
+ Node0x5607d6e383d0:s1 -> Node0x5607d6e37aa0:d0;
+ Node0x5607d6e383d0:s2 -> Node0x5607d6e38050:d0;
+ Node0x5607d6e383d0:s3 -> Node0x5607d6e38360:d1[color=red,style=bold];
+ Node0x0[ plaintext=circle, label ="GraphRoot"];
+ Node0x0 -> Node0x5607d6e383d0:d0[color=blue,style=dashed];
+}
diff --git a/llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot b/llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot
new file mode 100644
index 0000000000000..6907ee3e42724
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot
@@ -0,0 +1,106 @@
+digraph "scheduler input for double_arg_test:start" {
+ rankdir="BT";
+ label="scheduler input for double_arg_test:start";
+
+ Node0x577827b5e3a0 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8e430 [shape=record,shape=Mrecord,label="{{<s0>0}|MOVI32ri|t8|{<d0>i32|<d1>i8}}"];
+ Node0x577827b8e430:s0 -> Node0x577827b8e510:d0;
+ Node0x577827b8e4a0 [shape=record,shape=Mrecord,label="{TargetConstant\<8\>|t9|{<d0>i32}}"];
+ Node0x577827b8e510 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
+ Node0x577827b8e5f0 [shape=record,shape=Mrecord,label="{Register $sp|t12|{<d0>i32}}"];
+ Node0x577827b8e900 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=1]|t19|{<d0>i32}}"];
+ Node0x577827b8e970 [shape=record,shape=Mrecord,label="{RegisterMask|t20|{<d0>Untyped}}"];
+ Node0x577827b8eac0 [shape=record,shape=Mrecord,label="{Register $d0|t23|{<d0>i32}}"];
+ Node0x577827b8f070 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3' [TF=1]|t46|{<d0>i32}}"];
+ Node0x577827b8e200 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32rp\<Mem:(load (s32) from %fixed-stack.0, align 8)\>|t3|{<d0>i32|<d1>i8|<d2>ch}}"];
+ Node0x577827b8e200:s0 -> Node0x577827b8e510:d0;
+ Node0x577827b8e200:s1 -> Node0x577827b8e740:d0;
+ Node0x577827b8e200:s2 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
+ Node0x577827b8e3c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|ADJCALLSTACKDOWN|t40|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b8e3c0:s0 -> Node0x577827b8e4a0:d0;
+ Node0x577827b8e3c0:s1 -> Node0x577827b8e510:d0;
+ Node0x577827b8e3c0:s2 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
+ Node0x577827b8e580 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|ADJCALLSTACKDOWN|t11|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b8e580:s0 -> Node0x577827b8e4a0:d0;
+ Node0x577827b8e580:s1 -> Node0x577827b8e510:d0;
+ Node0x577827b8e580:s2 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
+ Node0x577827b8eba0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t41|{<d0>i32|<d1>ch}}"];
+ Node0x577827b8eba0:s0 -> Node0x577827b8e3c0:d1[color=blue,style=dashed];
+ Node0x577827b8eba0:s1 -> Node0x577827b8e5f0:d0;
+ Node0x577827b8e660 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t13|{<d0>i32|<d1>ch}}"];
+ Node0x577827b8e660:s0 -> Node0x577827b8e580:d1[color=blue,style=dashed];
+ Node0x577827b8e660:s1 -> Node0x577827b8e5f0:d0;
+ Node0x577827b8e6d0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32ji\<Mem:(store (s32) into stack, align 2)\>|t14|{<d0>i8|<d1>ch}}"];
+ Node0x577827b8e6d0:s0 -> Node0x577827b8e660:d0;
+ Node0x577827b8e6d0:s1 -> Node0x577827b8e510:d0;
+ Node0x577827b8e6d0:s2 -> Node0x577827b8e580:d1[color=blue,style=dashed];
+ Node0x577827b8ef90 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|MOV32pi\<Mem:(store (s32) into stack + 4, align 2)\>|t44|{<d0>i8|<d1>ch}}"];
+ Node0x577827b8ef90:s0 -> Node0x577827b8ec10:d0;
+ Node0x577827b8ef90:s1 -> Node0x577827b8eba0:d0;
+ Node0x577827b8ef90:s2 -> Node0x577827b8e510:d0;
+ Node0x577827b8ef90:s3 -> Node0x577827b8e3c0:d1[color=blue,style=dashed];
+ Node0x577827b8e820 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|MOV32pi\<Mem:(store (s32) into stack + 4, align 2)\>|t17|{<d0>i8|<d1>ch}}"];
+ Node0x577827b8e820:s0 -> Node0x577827b8ec10:d0;
+ Node0x577827b8e820:s1 -> Node0x577827b8e660:d0;
+ Node0x577827b8e820:s2 -> Node0x577827b8e510:d0;
+ Node0x577827b8e820:s3 -> Node0x577827b8e580:d1[color=blue,style=dashed];
+ Node0x577827b8e890 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t18|{<d0>ch}}"];
+ Node0x577827b8e890:s0 -> Node0x577827b8e6d0:d1[color=blue,style=dashed];
+ Node0x577827b8e890:s1 -> Node0x577827b8e820:d1[color=blue,style=dashed];
+ Node0x577827b8e9e0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CALLb|t21|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8e9e0:s0 -> Node0x577827b8e900:d0;
+ Node0x577827b8e9e0:s1 -> Node0x577827b8e970:d0;
+ Node0x577827b8e9e0:s2 -> Node0x577827b8e890:d0[color=blue,style=dashed];
+ Node0x577827b8ea50 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKUP|t22|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b8ea50:s0 -> Node0x577827b8e4a0:d0;
+ Node0x577827b8ea50:s1 -> Node0x577827b8e510:d0;
+ Node0x577827b8ea50:s2 -> Node0x577827b8e9e0:d0[color=blue,style=dashed];
+ Node0x577827b8ea50:s3 -> Node0x577827b8e9e0:d1[color=red,style=bold];
+ Node0x577827b8eb30 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t24|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b8eb30:s0 -> Node0x577827b8ea50:d1[color=blue,style=dashed];
+ Node0x577827b8eb30:s1 -> Node0x577827b8eac0:d0;
+ Node0x577827b8eb30:s2 -> Node0x577827b8ea50:d2[color=red,style=bold];
+ Node0x577827b8eeb0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32jj\<Mem:(store (s32) into stack, align 2) (load (s32) from %ir.inout, align 8)\>|t42|{<d0>i8|<d1>ch}}"];
+ Node0x577827b8eeb0:s0 -> Node0x577827b8eba0:d0;
+ Node0x577827b8eeb0:s1 -> Node0x577827b8e200:d0;
+ Node0x577827b8eeb0:s2 -> Node0x577827b8e270:d0[color=blue,style=dashed];
+ Node0x577827b8f000 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
+ Node0x577827b8f000:s0 -> Node0x577827b8eeb0:d1[color=blue,style=dashed];
+ Node0x577827b8f000:s1 -> Node0x577827b8ef90:d1[color=blue,style=dashed];
+ Node0x577827b91fa0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CALLb|t47|{<d0>ch|<d1>glue}}"];
+ Node0x577827b91fa0:s0 -> Node0x577827b8f070:d0;
+ Node0x577827b91fa0:s1 -> Node0x577827b8e970:d0;
+ Node0x577827b91fa0:s2 -> Node0x577827b8f000:d0[color=blue,style=dashed];
+ Node0x577827b92010 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKUP|t48|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b92010:s0 -> Node0x577827b8e4a0:d0;
+ Node0x577827b92010:s1 -> Node0x577827b8e510:d0;
+ Node0x577827b92010:s2 -> Node0x577827b91fa0:d0[color=blue,style=dashed];
+ Node0x577827b92010:s3 -> Node0x577827b91fa0:d1[color=red,style=bold];
+ Node0x577827b92080 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t49|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b92080:s0 -> Node0x577827b92010:d1[color=blue,style=dashed];
+ Node0x577827b92080:s1 -> Node0x577827b8eac0:d0;
+ Node0x577827b92080:s2 -> Node0x577827b92010:d2[color=red,style=bold];
+ Node0x577827b920f0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32jr\<Mem:(store (s32) into %ir.inout, align 8)\>|t50|{<d0>i8|<d1>ch}}"];
+ Node0x577827b920f0:s0 -> Node0x577827b8e200:d0;
+ Node0x577827b920f0:s1 -> Node0x577827b92080:d0;
+ Node0x577827b920f0:s2 -> Node0x577827b8eeb0:d1[color=blue,style=dashed];
+ Node0x577827b8ed60 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
+ Node0x577827b8ed60:s0 -> Node0x577827b920f0:d1[color=blue,style=dashed];
+ Node0x577827b8ed60:s1 -> Node0x577827b8eb30:d1[color=blue,style=dashed];
+ Node0x577827b8edd0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8edd0:s0 -> Node0x577827b8ed60:d0[color=blue,style=dashed];
+ Node0x577827b8edd0:s1 -> Node0x577827b8eac0:d0;
+ Node0x577827b8edd0:s2 -> Node0x577827b8e430:d0;
+ Node0x577827b8ee40 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|RET|t31|{<d0>ch}}"];
+ Node0x577827b8ee40:s0 -> Node0x577827b8e510:d0;
+ Node0x577827b8ee40:s1 -> Node0x577827b8eac0:d0;
+ Node0x577827b8ee40:s2 -> Node0x577827b8edd0:d0[color=blue,style=dashed];
+ Node0x577827b8ee40:s3 -> Node0x577827b8edd0:d1[color=red,style=bold];
+ Node0x577827b8e270 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t51|{<d0>ch}}"];
+ Node0x577827b8e270:s0 -> Node0x577827b8ea50:d1[color=blue,style=dashed];
+ Node0x577827b8e270:s1 -> Node0x577827b8e3c0:d1[color=blue,style=dashed];
+ Node0x577827b8ec10 [shape=record,shape=Mrecord,label="{TargetConstant\<4\>|t52|{<d0>i16}}"];
+ Node0x577827b8e740 [shape=record,shape=Mrecord,label="{TargetFrameIndex\<-1\>|t53|{<d0>i32}}"];
+ Node0x0[ plaintext=circle, label ="GraphRoot"];
+ Node0x0 -> Node0x577827b8ee40:d0[color=blue,style=dashed];
+}
diff --git a/llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot b/llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot
new file mode 100644
index 0000000000000..cf0c1f6dc1407
--- /dev/null
+++ b/llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot
@@ -0,0 +1,116 @@
+digraph "isel input for double_arg_test:start" {
+ rankdir="BT";
+ label="isel input for double_arg_test:start";
+
+ Node0x577827b5e3a0 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8e120 [shape=record,shape=Mrecord,label="{FrameIndex\<-1\>|t1|{<d0>i32}}"];
+ Node0x577827b8e190 [shape=record,shape=Mrecord,label="{undef|t2|{<d0>i32}}"];
+ Node0x577827b8e430 [shape=record,shape=Mrecord,label="{Constant\<0\>|t8|{<d0>i32}}"];
+ Node0x577827b8e4a0 [shape=record,shape=Mrecord,label="{TargetConstant\<8\>|t9|{<d0>i32}}"];
+ Node0x577827b8e510 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
+ Node0x577827b8e5f0 [shape=record,shape=Mrecord,label="{Register $sp|t12|{<d0>i32}}"];
+ Node0x577827b8e740 [shape=record,shape=Mrecord,label="{Constant\<4\>|t15|{<d0>i32}}"];
+ Node0x577827b8e900 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=1]|t19|{<d0>i32}}"];
+ Node0x577827b8e970 [shape=record,shape=Mrecord,label="{RegisterMask|t20|{<d0>Untyped}}"];
+ Node0x577827b8eac0 [shape=record,shape=Mrecord,label="{Register $d0|t23|{<d0>i32}}"];
+ Node0x577827b8f070 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3' [TF=1]|t46|{<d0>i32}}"];
+ Node0x577827b8e200 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|load\<(load (s32) from %fixed-stack.0, align 8)\>|t3|{<d0>i32|<d1>ch}}"];
+ Node0x577827b8e200:s0 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
+ Node0x577827b8e200:s1 -> Node0x577827b8e120:d0;
+ Node0x577827b8e200:s2 -> Node0x577827b8e190:d0;
+ Node0x577827b8e3c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|callseq_start|t40|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8e3c0:s0 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
+ Node0x577827b8e3c0:s1 -> Node0x577827b8e4a0:d0;
+ Node0x577827b8e3c0:s2 -> Node0x577827b8e510:d0;
+ Node0x577827b8e580 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|callseq_start|t11|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8e580:s0 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
+ Node0x577827b8e580:s1 -> Node0x577827b8e4a0:d0;
+ Node0x577827b8e580:s2 -> Node0x577827b8e510:d0;
+ Node0x577827b8eba0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t41|{<d0>i32|<d1>ch}}"];
+ Node0x577827b8eba0:s0 -> Node0x577827b8e3c0:d0[color=blue,style=dashed];
+ Node0x577827b8eba0:s1 -> Node0x577827b8e5f0:d0;
+ Node0x577827b8e660 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t13|{<d0>i32|<d1>ch}}"];
+ Node0x577827b8e660:s0 -> Node0x577827b8e580:d0[color=blue,style=dashed];
+ Node0x577827b8e660:s1 -> Node0x577827b8e5f0:d0;
+ Node0x577827b8ef20 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|add|t43|{<d0>i32}}"];
+ Node0x577827b8ef20:s0 -> Node0x577827b8eba0:d0;
+ Node0x577827b8ef20:s1 -> Node0x577827b8e740:d0;
+ Node0x577827b8e7b0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|add|t16|{<d0>i32}}"];
+ Node0x577827b8e7b0:s0 -> Node0x577827b8e660:d0;
+ Node0x577827b8e7b0:s1 -> Node0x577827b8e740:d0;
+ Node0x577827b8e6d0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack, align 2)\>|t14|{<d0>ch}}"];
+ Node0x577827b8e6d0:s0 -> Node0x577827b8e580:d0[color=blue,style=dashed];
+ Node0x577827b8e6d0:s1 -> Node0x577827b8e430:d0;
+ Node0x577827b8e6d0:s2 -> Node0x577827b8e660:d0;
+ Node0x577827b8e6d0:s3 -> Node0x577827b8e190:d0;
+ Node0x577827b8ef90 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack + 4, align 2)\>|t44|{<d0>ch}}"];
+ Node0x577827b8ef90:s0 -> Node0x577827b8e3c0:d0[color=blue,style=dashed];
+ Node0x577827b8ef90:s1 -> Node0x577827b8e430:d0;
+ Node0x577827b8ef90:s2 -> Node0x577827b8ef20:d0;
+ Node0x577827b8ef90:s3 -> Node0x577827b8e190:d0;
+ Node0x577827b8e820 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack + 4, align 2)\>|t17|{<d0>ch}}"];
+ Node0x577827b8e820:s0 -> Node0x577827b8e580:d0[color=blue,style=dashed];
+ Node0x577827b8e820:s1 -> Node0x577827b8e430:d0;
+ Node0x577827b8e820:s2 -> Node0x577827b8e7b0:d0;
+ Node0x577827b8e820:s3 -> Node0x577827b8e190:d0;
+ Node0x577827b8e890 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t18|{<d0>ch}}"];
+ Node0x577827b8e890:s0 -> Node0x577827b8e6d0:d0[color=blue,style=dashed];
+ Node0x577827b8e890:s1 -> Node0x577827b8e820:d0[color=blue,style=dashed];
+ Node0x577827b8e9e0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|M68kISD::CALL|t21|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8e9e0:s0 -> Node0x577827b8e890:d0[color=blue,style=dashed];
+ Node0x577827b8e9e0:s1 -> Node0x577827b8e900:d0;
+ Node0x577827b8e9e0:s2 -> Node0x577827b8e970:d0;
+ Node0x577827b8ea50 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|callseq_end|t22|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8ea50:s0 -> Node0x577827b8e9e0:d0[color=blue,style=dashed];
+ Node0x577827b8ea50:s1 -> Node0x577827b8e4a0:d0;
+ Node0x577827b8ea50:s2 -> Node0x577827b8e510:d0;
+ Node0x577827b8ea50:s3 -> Node0x577827b8e9e0:d1[color=red,style=bold];
+ Node0x577827b8ec10 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|load\<(load (s32) from %ir.inout, align 8)\>|t38|{<d0>i32|<d1>ch}}"];
+ Node0x577827b8ec10:s0 -> Node0x577827b8ea50:d0[color=blue,style=dashed];
+ Node0x577827b8ec10:s1 -> Node0x577827b8e200:d0;
+ Node0x577827b8ec10:s2 -> Node0x577827b8e190:d0;
+ Node0x577827b8eb30 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t24|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b8eb30:s0 -> Node0x577827b8ea50:d0[color=blue,style=dashed];
+ Node0x577827b8eb30:s1 -> Node0x577827b8eac0:d0;
+ Node0x577827b8eb30:s2 -> Node0x577827b8ea50:d1[color=red,style=bold];
+ Node0x577827b8eeb0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack, align 2)\>|t42|{<d0>ch}}"];
+ Node0x577827b8eeb0:s0 -> Node0x577827b8e3c0:d0[color=blue,style=dashed];
+ Node0x577827b8eeb0:s1 -> Node0x577827b8ec10:d0;
+ Node0x577827b8eeb0:s2 -> Node0x577827b8eba0:d0;
+ Node0x577827b8eeb0:s3 -> Node0x577827b8e190:d0;
+ Node0x577827b8f000 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
+ Node0x577827b8f000:s0 -> Node0x577827b8eeb0:d0[color=blue,style=dashed];
+ Node0x577827b8f000:s1 -> Node0x577827b8ef90:d0[color=blue,style=dashed];
+ Node0x577827b91fa0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|M68kISD::CALL|t47|{<d0>ch|<d1>glue}}"];
+ Node0x577827b91fa0:s0 -> Node0x577827b8f000:d0[color=blue,style=dashed];
+ Node0x577827b91fa0:s1 -> Node0x577827b8f070:d0;
+ Node0x577827b91fa0:s2 -> Node0x577827b8e970:d0;
+ Node0x577827b92010 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|callseq_end|t48|{<d0>ch|<d1>glue}}"];
+ Node0x577827b92010:s0 -> Node0x577827b91fa0:d0[color=blue,style=dashed];
+ Node0x577827b92010:s1 -> Node0x577827b8e4a0:d0;
+ Node0x577827b92010:s2 -> Node0x577827b8e510:d0;
+ Node0x577827b92010:s3 -> Node0x577827b91fa0:d1[color=red,style=bold];
+ Node0x577827b92080 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t49|{<d0>i32|<d1>ch|<d2>glue}}"];
+ Node0x577827b92080:s0 -> Node0x577827b92010:d0[color=blue,style=dashed];
+ Node0x577827b92080:s1 -> Node0x577827b8eac0:d0;
+ Node0x577827b92080:s2 -> Node0x577827b92010:d1[color=red,style=bold];
+ Node0x577827b920f0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into %ir.inout, align 8)\>|t50|{<d0>ch}}"];
+ Node0x577827b920f0:s0 -> Node0x577827b8ec10:d1[color=blue,style=dashed];
+ Node0x577827b920f0:s1 -> Node0x577827b92080:d0;
+ Node0x577827b920f0:s2 -> Node0x577827b8e200:d0;
+ Node0x577827b920f0:s3 -> Node0x577827b8e190:d0;
+ Node0x577827b8ed60 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
+ Node0x577827b8ed60:s0 -> Node0x577827b920f0:d0[color=blue,style=dashed];
+ Node0x577827b8ed60:s1 -> Node0x577827b8eb30:d1[color=blue,style=dashed];
+ Node0x577827b8edd0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
+ Node0x577827b8edd0:s0 -> Node0x577827b8ed60:d0[color=blue,style=dashed];
+ Node0x577827b8edd0:s1 -> Node0x577827b8eac0:d0;
+ Node0x577827b8edd0:s2 -> Node0x577827b8e430:d0;
+ Node0x577827b8ee40 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|M68kISD::RET|t31|{<d0>ch}}"];
+ Node0x577827b8ee40:s0 -> Node0x577827b8edd0:d0[color=blue,style=dashed];
+ Node0x577827b8ee40:s1 -> Node0x577827b8e510:d0;
+ Node0x577827b8ee40:s2 -> Node0x577827b8eac0:d0;
+ Node0x577827b8ee40:s3 -> Node0x577827b8edd0:d1[color=red,style=bold];
+ Node0x0[ plaintext=circle, label ="GraphRoot"];
+ Node0x0 -> Node0x577827b8ee40:d0[color=blue,style=dashed];
+}
>From 44785eb3b03c580814e8da1f7ea2704be791d460 Mon Sep 17 00:00:00 2001
From: kirk <knickish at gmail.com>
Date: Sun, 11 Jan 2026 20:37:34 +0000
Subject: [PATCH 3/3] test updates for load/store combine changes
---
llvm/test/CodeGen/M68k/Atomics/cmpxchg.ll | 12 +-
llvm/test/CodeGen/M68k/Atomics/rmw.ll | 24 +-
.../M68k/CodeModel/Large/Atomics/cmpxchg.ll | 24 +-
.../M68k/CodeModel/Large/Atomics/rmw.ll | 48 +-
llvm/test/CodeGen/M68k/Regression/146213.ll | 13 +-
llvm/test/CodeGen/M68k/Regression/146213.s | 48 -
llvm/test/CodeGen/M68k/Regression/double.svg | 930 ------------------
llvm/test/CodeGen/M68k/Regression/float.svg | 870 ----------------
.../M68k/Regression/i386-pre-sched.dot | 135 ---
.../M68k/Regression/i386-pre-select.dot | 116 ---
.../M68k/Regression/m68k-pre-sched.dot | 106 --
.../M68k/Regression/m68k-pre-select.dot | 116 ---
12 files changed, 35 insertions(+), 2407 deletions(-)
delete mode 100644 llvm/test/CodeGen/M68k/Regression/146213.s
delete mode 100644 llvm/test/CodeGen/M68k/Regression/double.svg
delete mode 100644 llvm/test/CodeGen/M68k/Regression/float.svg
delete mode 100644 llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot
delete mode 100644 llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot
delete mode 100644 llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot
delete mode 100644 llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot
diff --git a/llvm/test/CodeGen/M68k/Atomics/cmpxchg.ll b/llvm/test/CodeGen/M68k/Atomics/cmpxchg.ll
index 42c0a333fa1be..3bd9f79773260 100644
--- a/llvm/test/CodeGen/M68k/Atomics/cmpxchg.ll
+++ b/llvm/test/CodeGen/M68k/Atomics/cmpxchg.ll
@@ -10,13 +10,11 @@ define i1 @cmpxchg_i8_monotonic_monotonic(i8 %cmp, i8 %new, ptr %mem) nounwind {
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
; NO-ATOMIC-NEXT: movem.l %d2, (16,%sp) ; 8-byte Folded Spill
-; NO-ATOMIC-NEXT: move.b (31,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (8,%sp)
; NO-ATOMIC-NEXT: move.b (27,%sp), %d2
; NO-ATOMIC-NEXT: move.l %d2, %d0
; NO-ATOMIC-NEXT: and.l #255, %d0
; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (31,%sp), (8,%sp)
; NO-ATOMIC-NEXT: move.l (32,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_val_compare_and_swap_1
; NO-ATOMIC-NEXT: sub.b %d2, %d0
@@ -48,12 +46,8 @@ define i16 @cmpxchg_i16_release_monotonic(i16 %cmp, i16 %new, ptr %mem) nounwind
; NO-ATOMIC-LABEL: cmpxchg_i16_release_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
-; NO-ATOMIC-NEXT: move.w (22,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (8,%sp)
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (22,%sp), (8,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (24,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_val_compare_and_swap_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
diff --git a/llvm/test/CodeGen/M68k/Atomics/rmw.ll b/llvm/test/CodeGen/M68k/Atomics/rmw.ll
index 71ab4326cfe7d..22804c7994d3c 100644
--- a/llvm/test/CodeGen/M68k/Atomics/rmw.ll
+++ b/llvm/test/CodeGen/M68k/Atomics/rmw.ll
@@ -11,9 +11,7 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_add_1
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -55,9 +53,7 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_sub_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -171,9 +167,7 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_or_1
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -415,9 +409,7 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_umin_1
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -468,9 +460,7 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_umax_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -521,9 +511,7 @@ define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0: ; %entry
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_lock_test_and_set_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
diff --git a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/cmpxchg.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/cmpxchg.ll
index 36bd4654d3e54..654346a6cfb3b 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/cmpxchg.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/cmpxchg.ll
@@ -80,13 +80,11 @@ define i1 @cmpxchg_i8_monotonic_monotonic(i8 %cmp, i8 %new, ptr %mem) nounwind {
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #20, %sp
; NO-ATOMIC-NEXT: movem.l %d2, (16,%sp) ; 8-byte Folded Spill
-; NO-ATOMIC-NEXT: move.b (31,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (8,%sp)
; NO-ATOMIC-NEXT: move.b (27,%sp), %d2
; NO-ATOMIC-NEXT: move.l %d2, %d0
; NO-ATOMIC-NEXT: and.l #255, %d0
; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (31,%sp), (8,%sp)
; NO-ATOMIC-NEXT: move.l (32,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_val_compare_and_swap_1
; NO-ATOMIC-NEXT: sub.b %d2, %d0
@@ -99,13 +97,11 @@ define i1 @cmpxchg_i8_monotonic_monotonic(i8 %cmp, i8 %new, ptr %mem) nounwind {
; NO-ATOMIC-PIC: ; %bb.0:
; NO-ATOMIC-PIC-NEXT: suba.l #20, %sp
; NO-ATOMIC-PIC-NEXT: movem.l %d2, (16,%sp) ; 8-byte Folded Spill
-; NO-ATOMIC-PIC-NEXT: move.b (31,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (8,%sp)
; NO-ATOMIC-PIC-NEXT: move.b (27,%sp), %d2
; NO-ATOMIC-PIC-NEXT: move.l %d2, %d0
; NO-ATOMIC-PIC-NEXT: and.l #255, %d0
; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (31,%sp), (8,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (32,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_val_compare_and_swap_1 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: sub.b %d2, %d0
@@ -152,12 +148,8 @@ define i16 @cmpxchg_i16_release_monotonic(i16 %cmp, i16 %new, ptr %mem) nounwind
; NO-ATOMIC-LABEL: cmpxchg_i16_release_monotonic:
; NO-ATOMIC: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
-; NO-ATOMIC-NEXT: move.w (22,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (8,%sp)
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (22,%sp), (8,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (24,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_val_compare_and_swap_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -166,12 +158,8 @@ define i16 @cmpxchg_i16_release_monotonic(i16 %cmp, i16 %new, ptr %mem) nounwind
; NO-ATOMIC-PIC-LABEL: cmpxchg_i16_release_monotonic:
; NO-ATOMIC-PIC: ; %bb.0:
; NO-ATOMIC-PIC-NEXT: suba.l #12, %sp
-; NO-ATOMIC-PIC-NEXT: move.w (22,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (8,%sp)
-; NO-ATOMIC-PIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (22,%sp), (8,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (24,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_val_compare_and_swap_2 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: adda.l #12, %sp
diff --git a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
index 06b89adc597f0..f9738920d8b6d 100644
--- a/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
+++ b/llvm/test/CodeGen/M68k/CodeModel/Large/Atomics/rmw.ll
@@ -16,9 +16,7 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_add_1
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -29,9 +27,7 @@ define i8 @atomicrmw_add_i8(i8 %val, ptr %ptr) {
; NO-ATOMIC-PIC-NEXT: ; %bb.0:
; NO-ATOMIC-PIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-PIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_fetch_and_add_1 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: adda.l #12, %sp
@@ -100,9 +96,7 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_sub_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -113,9 +107,7 @@ define i16 @atomicrmw_sub_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-PIC-NEXT: ; %bb.0:
; NO-ATOMIC-PIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-PIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_fetch_and_sub_2 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: adda.l #12, %sp
@@ -320,9 +312,7 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_or_1
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -333,9 +323,7 @@ define i8 @atomicrmw_or_i8(i8 %val, ptr %ptr) {
; NO-ATOMIC-PIC-NEXT: ; %bb.0:
; NO-ATOMIC-PIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-PIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_fetch_and_or_1 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: adda.l #12, %sp
@@ -792,9 +780,7 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_umin_1
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -805,9 +791,7 @@ define i8 @atomicrmw_i8_umin(i8 %val, ptr %ptr) {
; NO-ATOMIC-PIC-NEXT: ; %bb.0:
; NO-ATOMIC-PIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-PIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT: move.b (19,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #255, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (19,%sp), (4,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_fetch_and_umin_1 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: adda.l #12, %sp
@@ -894,9 +878,7 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0:
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_fetch_and_umax_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -907,9 +889,7 @@ define i16 @atomicrmw_umax_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-PIC-NEXT: ; %bb.0:
; NO-ATOMIC-PIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-PIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_fetch_and_umax_2 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: adda.l #12, %sp
@@ -996,9 +976,7 @@ define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-NEXT: ; %bb.0: ; %entry
; NO-ATOMIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-NEXT: jsr __sync_lock_test_and_set_2
; NO-ATOMIC-NEXT: adda.l #12, %sp
@@ -1009,9 +987,7 @@ define i16 @atomicrmw_xchg_i16(i16 %val, ptr %ptr) {
; NO-ATOMIC-PIC-NEXT: ; %bb.0: ; %entry
; NO-ATOMIC-PIC-NEXT: suba.l #12, %sp
; NO-ATOMIC-PIC-NEXT: .cfi_def_cfa_offset -16
-; NO-ATOMIC-PIC-NEXT: move.w (18,%sp), %d0
-; NO-ATOMIC-PIC-NEXT: and.l #65535, %d0
-; NO-ATOMIC-PIC-NEXT: move.l %d0, (4,%sp)
+; NO-ATOMIC-PIC-NEXT: move.l (18,%sp), (4,%sp)
; NO-ATOMIC-PIC-NEXT: move.l (20,%sp), (%sp)
; NO-ATOMIC-PIC-NEXT: jsr (__sync_lock_test_and_set_2 at PLT,%pc)
; NO-ATOMIC-PIC-NEXT: adda.l #12, %sp
diff --git a/llvm/test/CodeGen/M68k/Regression/146213.ll b/llvm/test/CodeGen/M68k/Regression/146213.ll
index 6a4b6793d676f..58b96cb9a0042 100644
--- a/llvm/test/CodeGen/M68k/Regression/146213.ll
+++ b/llvm/test/CodeGen/M68k/Regression/146213.ll
@@ -3,11 +3,12 @@
; In this bug, we can see that a chain was generated that started from an ADJCALLSTACKUP
; (lowered callseq_end for fmul) and crossed over to join the unrelated chain going through
-; the ADJCALLSTACKUP/DOWN for @double_arg. This resulted in an assertion firing during
+; the ADJCALLSTACKUP/DOWN for @double_arg. This resulted in an assertion firing during
; scheduling, as the ADJCALLSTACKDOWN nodes do not depend on each other. This meant that
; two ADJCALLSTACKUP (lowered callseq_end) nodes were encountered for the chain branch for
-; @double_arg, but only one ADJCALLSTACKDOWN would be present as they did not depend on
-; each other.
+; @double_arg, but only one ADJCALLSTACKDOWN would be present as they did not depend on
+; each other. This situation was impossible to trigger on the i386 backend, as i386 does not
+; have MOV{SIZE}mm instructions for the load + store to be folded into.
declare float @float_arg(float)
declare float @double_arg(double)
@@ -21,7 +22,8 @@ define float @float_arg_test(ptr %inout) nounwind {
; CHECK-NEXT: move.l #0, (%sp)
; CHECK-NEXT: jsr float_arg
; CHECK-NEXT: move.l (16,%sp), %a2
-; CHECK-NEXT: move.l (%a2), (%sp)
+; CHECK-NEXT: move.l (%a2), %d0
+; CHECK-NEXT: move.l %d0, (%sp)
; CHECK-NEXT: move.l #0, (4,%sp)
; CHECK-NEXT: jsr __mulsf3
; CHECK-NEXT: move.l %d0, (%a2)
@@ -47,7 +49,8 @@ define float @double_arg_test(ptr %inout) nounwind {
; CHECK-NEXT: move.l #0, (%sp)
; CHECK-NEXT: jsr double_arg
; CHECK-NEXT: move.l (16,%sp), %a2
-; CHECK-NEXT: move.l (%a2), (%sp)
+; CHECK-NEXT: move.l (%a2), %d0
+; CHECK-NEXT: move.l %d0, (%sp)
; CHECK-NEXT: move.l #0, (4,%sp)
; CHECK-NEXT: jsr __mulsf3
; CHECK-NEXT: move.l %d0, (%a2)
diff --git a/llvm/test/CodeGen/M68k/Regression/146213.s b/llvm/test/CodeGen/M68k/Regression/146213.s
deleted file mode 100644
index e82b049f6e877..0000000000000
--- a/llvm/test/CodeGen/M68k/Regression/146213.s
+++ /dev/null
@@ -1,48 +0,0 @@
- .file "146213.ll"
- .text
- .globl float_arg_test ; -- Begin function float_arg_test
- .p2align 1
- .type float_arg_test, at function
-float_arg_test: ; @float_arg_test
-; %bb.0: ; %start
- suba.l #12, %sp
- movem.l %a2, (8,%sp) ; 8-byte Folded Spill
- move.l #0, (%sp)
- jsr float_arg
- move.l (16,%sp), %a2
- move.l (%a2), %d0
- move.l %d0, (%sp)
- move.l #0, (4,%sp)
- jsr __mulsf3
- move.l %d0, (%a2)
- moveq #0, %d0
- movem.l (8,%sp), %a2 ; 8-byte Folded Reload
- adda.l #12, %sp
- rts
-.Lfunc_end0:
- .size float_arg_test, .Lfunc_end0-float_arg_test
- ; -- End function
- .globl double_arg_test ; -- Begin function double_arg_test
- .p2align 1
- .type double_arg_test, at function
-double_arg_test: ; @double_arg_test
-; %bb.0: ; %start
- suba.l #12, %sp
- movem.l %a2, (8,%sp) ; 8-byte Folded Spill
- move.l #0, (4,%sp)
- move.l #0, (%sp)
- jsr double_arg
- move.l (16,%sp), %a2
- move.l (%a2), %d0
- move.l %d0, (%sp)
- move.l #0, (4,%sp)
- jsr __mulsf3
- move.l %d0, (%a2)
- moveq #0, %d0
- movem.l (8,%sp), %a2 ; 8-byte Folded Reload
- adda.l #12, %sp
- rts
-.Lfunc_end1:
- .size double_arg_test, .Lfunc_end1-double_arg_test
- ; -- End function
- .section ".note.GNU-stack","", at progbits
diff --git a/llvm/test/CodeGen/M68k/Regression/double.svg b/llvm/test/CodeGen/M68k/Regression/double.svg
deleted file mode 100644
index 5f2c43cc53ff5..0000000000000
--- a/llvm/test/CodeGen/M68k/Regression/double.svg
+++ /dev/null
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diff --git a/llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot b/llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot
deleted file mode 100644
index ef15ef62c017b..0000000000000
--- a/llvm/test/CodeGen/M68k/Regression/i386-pre-sched.dot
+++ /dev/null
@@ -1,135 +0,0 @@
-digraph "scheduler input for double_arg_test:start" {
- rankdir="BT";
- label="scheduler input for double_arg_test:start";
-
- Node0x5607d6dee470 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e379c0 [shape=record,shape=Mrecord,label="{MOV32r0|t8|{<d0>i32|<d1>i32}}"];
- Node0x5607d6e37a30 [shape=record,shape=Mrecord,label="{TargetConstant\<8\>|t9|{<d0>i32}}"];
- Node0x5607d6e37aa0 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
- Node0x5607d6e37b80 [shape=record,shape=Mrecord,label="{Register $esp|t12|{<d0>i32}}"];
- Node0x5607d6e37e90 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=7]|t19|{<d0>i32}}"];
- Node0x5607d6e37f00 [shape=record,shape=Mrecord,label="{RegisterMask|t20|{<d0>Untyped}}"];
- Node0x5607d6e38050 [shape=record,shape=Mrecord,label="{Register $eax|t23|{<d0>i32}}"];
- Node0x5607d6e38600 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3'|t46|{<d0>i32}}"];
- Node0x5607d6e37790 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5}|MOV32rm\<Mem:(load (s32) from %fixed-stack.0)\>|t3|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e37790:s0 -> Node0x5607d6e37cd0:d0;
- Node0x5607d6e37790:s1 -> Node0x5607d6e37800:d0;
- Node0x5607d6e37790:s2 -> Node0x5607d6e38210:d0;
- Node0x5607d6e37790:s3 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37790:s4 -> Node0x5607d6e38280:d0;
- Node0x5607d6e37790:s5 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
- Node0x5607d6e37950 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKDOWN32|t40|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e37950:s0 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e37950:s1 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37950:s2 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37950:s3 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
- Node0x5607d6e37b10 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKDOWN32|t11|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e37b10:s0 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e37b10:s1 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37b10:s2 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37b10:s3 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
- Node0x5607d6e38130 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t41|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e38130:s0 -> Node0x5607d6e37950:d1[color=blue,style=dashed];
- Node0x5607d6e38130:s1 -> Node0x5607d6e37b80:d0;
- Node0x5607d6e37bf0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t13|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e37bf0:s0 -> Node0x5607d6e37b10:d1[color=blue,style=dashed];
- Node0x5607d6e37bf0:s1 -> Node0x5607d6e37b80:d0;
- Node0x5607d6e37c60 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5|<s6>6}|MOV32mi\<Mem:(store (s32) into stack)\>|t14|{<d0>ch}}"];
- Node0x5607d6e37c60:s0 -> Node0x5607d6e37bf0:d0;
- Node0x5607d6e37c60:s1 -> Node0x5607d6e37800:d0;
- Node0x5607d6e37c60:s2 -> Node0x5607d6e38210:d0;
- Node0x5607d6e37c60:s3 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37c60:s4 -> Node0x5607d6e38280:d0;
- Node0x5607d6e37c60:s5 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37c60:s6 -> Node0x5607d6e37b10:d1[color=blue,style=dashed];
- Node0x5607d6e38520 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5|<s6>6}|MOV32mi\<Mem:(store (s32) into stack + 4)\>|t44|{<d0>ch}}"];
- Node0x5607d6e38520:s0 -> Node0x5607d6e38130:d0;
- Node0x5607d6e38520:s1 -> Node0x5607d6e37800:d0;
- Node0x5607d6e38520:s2 -> Node0x5607d6e38210:d0;
- Node0x5607d6e38520:s3 -> Node0x5607d6e378e0:d0;
- Node0x5607d6e38520:s4 -> Node0x5607d6e38280:d0;
- Node0x5607d6e38520:s5 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e38520:s6 -> Node0x5607d6e37950:d1[color=blue,style=dashed];
- Node0x5607d6e37db0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5|<s6>6}|MOV32mi\<Mem:(store (s32) into stack + 4)\>|t17|{<d0>ch}}"];
- Node0x5607d6e37db0:s0 -> Node0x5607d6e37bf0:d0;
- Node0x5607d6e37db0:s1 -> Node0x5607d6e37800:d0;
- Node0x5607d6e37db0:s2 -> Node0x5607d6e38210:d0;
- Node0x5607d6e37db0:s3 -> Node0x5607d6e378e0:d0;
- Node0x5607d6e37db0:s4 -> Node0x5607d6e38280:d0;
- Node0x5607d6e37db0:s5 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37db0:s6 -> Node0x5607d6e37b10:d1[color=blue,style=dashed];
- Node0x5607d6e37e20 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t18|{<d0>ch}}"];
- Node0x5607d6e37e20:s0 -> Node0x5607d6e37c60:d0[color=blue,style=dashed];
- Node0x5607d6e37e20:s1 -> Node0x5607d6e37db0:d0[color=blue,style=dashed];
- Node0x5607d6e37f70 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CALLpcrel32|t21|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e37f70:s0 -> Node0x5607d6e37e90:d0;
- Node0x5607d6e37f70:s1 -> Node0x5607d6e37f00:d0;
- Node0x5607d6e37f70:s2 -> Node0x5607d6e37e20:d0[color=blue,style=dashed];
- Node0x5607d6e37fe0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKUP32|t22|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e37fe0:s0 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e37fe0:s1 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37fe0:s2 -> Node0x5607d6e37f70:d0[color=blue,style=dashed];
- Node0x5607d6e37fe0:s3 -> Node0x5607d6e37f70:d1[color=red,style=bold];
- Node0x5607d6e381a0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5}|MOV32rm\<Mem:(load (s32) from %ir.inout, align 8)\>|t38|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e381a0:s0 -> Node0x5607d6e37790:d0;
- Node0x5607d6e381a0:s1 -> Node0x5607d6e37800:d0;
- Node0x5607d6e381a0:s2 -> Node0x5607d6e38210:d0;
- Node0x5607d6e381a0:s3 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e381a0:s4 -> Node0x5607d6e38280:d0;
- Node0x5607d6e381a0:s5 -> Node0x5607d6e37fe0:d1[color=blue,style=dashed];
- Node0x5607d6e380c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t24|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e380c0:s0 -> Node0x5607d6e37fe0:d1[color=blue,style=dashed];
- Node0x5607d6e380c0:s1 -> Node0x5607d6e38050:d0;
- Node0x5607d6e380c0:s2 -> Node0x5607d6e37fe0:d2[color=red,style=bold];
- Node0x5607d6e38440 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5|<s6>6}|MOV32mr\<Mem:(store (s32) into stack)\>|t42|{<d0>ch}}"];
- Node0x5607d6e38440:s0 -> Node0x5607d6e38130:d0;
- Node0x5607d6e38440:s1 -> Node0x5607d6e37800:d0;
- Node0x5607d6e38440:s2 -> Node0x5607d6e38210:d0;
- Node0x5607d6e38440:s3 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e38440:s4 -> Node0x5607d6e38280:d0;
- Node0x5607d6e38440:s5 -> Node0x5607d6e381a0:d0;
- Node0x5607d6e38440:s6 -> Node0x5607d6e37950:d1[color=blue,style=dashed];
- Node0x5607d6e38590 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
- Node0x5607d6e38590:s0 -> Node0x5607d6e38440:d0[color=blue,style=dashed];
- Node0x5607d6e38590:s1 -> Node0x5607d6e38520:d0[color=blue,style=dashed];
- Node0x5607d6e3db50 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CALLpcrel32|t47|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e3db50:s0 -> Node0x5607d6e38600:d0;
- Node0x5607d6e3db50:s1 -> Node0x5607d6e37f00:d0;
- Node0x5607d6e3db50:s2 -> Node0x5607d6e38590:d0[color=blue,style=dashed];
- Node0x5607d6e3dbc0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKUP32|t48|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e3dbc0:s0 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e3dbc0:s1 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e3dbc0:s2 -> Node0x5607d6e3db50:d0[color=blue,style=dashed];
- Node0x5607d6e3dbc0:s3 -> Node0x5607d6e3db50:d1[color=red,style=bold];
- Node0x5607d6e3dc30 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t49|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e3dc30:s0 -> Node0x5607d6e3dbc0:d1[color=blue,style=dashed];
- Node0x5607d6e3dc30:s1 -> Node0x5607d6e38050:d0;
- Node0x5607d6e3dc30:s2 -> Node0x5607d6e3dbc0:d2[color=red,style=bold];
- Node0x5607d6e3dca0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3|<s4>4|<s5>5|<s6>6}|MOV32mr\<Mem:(store (s32) into %ir.inout, align 8)\>|t50|{<d0>ch}}"];
- Node0x5607d6e3dca0:s0 -> Node0x5607d6e37790:d0;
- Node0x5607d6e3dca0:s1 -> Node0x5607d6e37800:d0;
- Node0x5607d6e3dca0:s2 -> Node0x5607d6e38210:d0;
- Node0x5607d6e3dca0:s3 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e3dca0:s4 -> Node0x5607d6e38280:d0;
- Node0x5607d6e3dca0:s5 -> Node0x5607d6e3dc30:d0;
- Node0x5607d6e3dca0:s6 -> Node0x5607d6e381a0:d1[color=blue,style=dashed];
- Node0x5607d6e382f0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
- Node0x5607d6e382f0:s0 -> Node0x5607d6e3dca0:d0[color=blue,style=dashed];
- Node0x5607d6e382f0:s1 -> Node0x5607d6e380c0:d1[color=blue,style=dashed];
- Node0x5607d6e38360 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e38360:s0 -> Node0x5607d6e382f0:d0[color=blue,style=dashed];
- Node0x5607d6e38360:s1 -> Node0x5607d6e38050:d0;
- Node0x5607d6e38360:s2 -> Node0x5607d6e379c0:d0;
- Node0x5607d6e383d0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|RET|t31|{<d0>ch}}"];
- Node0x5607d6e383d0:s0 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e383d0:s1 -> Node0x5607d6e38050:d0;
- Node0x5607d6e383d0:s2 -> Node0x5607d6e38360:d0[color=blue,style=dashed];
- Node0x5607d6e383d0:s3 -> Node0x5607d6e38360:d1[color=red,style=bold];
- Node0x5607d6e37800 [shape=record,shape=Mrecord,label="{TargetConstant\<1\>|t51|{<d0>i8}}"];
- Node0x5607d6e38210 [shape=record,shape=Mrecord,label="{Register $noreg|t52|{<d0>i32}}"];
- Node0x5607d6e38280 [shape=record,shape=Mrecord,label="{Register $noreg|t53|{<d0>i16}}"];
- Node0x5607d6e378e0 [shape=record,shape=Mrecord,label="{TargetConstant\<4\>|t54|{<d0>i32}}"];
- Node0x5607d6e37cd0 [shape=record,shape=Mrecord,label="{TargetFrameIndex\<-1\>|t55|{<d0>i32}}"];
- Node0x0[ plaintext=circle, label ="GraphRoot"];
- Node0x0 -> Node0x5607d6e383d0:d0[color=blue,style=dashed];
-}
diff --git a/llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot b/llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot
deleted file mode 100644
index d828efc46c0ab..0000000000000
--- a/llvm/test/CodeGen/M68k/Regression/i386-pre-select.dot
+++ /dev/null
@@ -1,116 +0,0 @@
-digraph "isel input for double_arg_test:start" {
- rankdir="BT";
- label="isel input for double_arg_test:start";
-
- Node0x5607d6dee470 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e376b0 [shape=record,shape=Mrecord,label="{FrameIndex\<-1\>|t1|{<d0>i32}}"];
- Node0x5607d6e37720 [shape=record,shape=Mrecord,label="{undef|t2|{<d0>i32}}"];
- Node0x5607d6e379c0 [shape=record,shape=Mrecord,label="{Constant\<0\>|t8|{<d0>i32}}"];
- Node0x5607d6e37a30 [shape=record,shape=Mrecord,label="{TargetConstant\<8\>|t9|{<d0>i32}}"];
- Node0x5607d6e37aa0 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
- Node0x5607d6e37b80 [shape=record,shape=Mrecord,label="{Register $esp|t12|{<d0>i32}}"];
- Node0x5607d6e37cd0 [shape=record,shape=Mrecord,label="{Constant\<4\>|t15|{<d0>i32}}"];
- Node0x5607d6e37e90 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=7]|t19|{<d0>i32}}"];
- Node0x5607d6e37f00 [shape=record,shape=Mrecord,label="{RegisterMask|t20|{<d0>Untyped}}"];
- Node0x5607d6e38050 [shape=record,shape=Mrecord,label="{Register $eax|t23|{<d0>i32}}"];
- Node0x5607d6e38600 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3'|t46|{<d0>i32}}"];
- Node0x5607d6e37790 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|load\<(load (s32) from %fixed-stack.0)\>|t3|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e37790:s0 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
- Node0x5607d6e37790:s1 -> Node0x5607d6e376b0:d0;
- Node0x5607d6e37790:s2 -> Node0x5607d6e37720:d0;
- Node0x5607d6e37950 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|callseq_start|t40|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e37950:s0 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
- Node0x5607d6e37950:s1 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e37950:s2 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37b10 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|callseq_start|t11|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e37b10:s0 -> Node0x5607d6dee470:d0[color=blue,style=dashed];
- Node0x5607d6e37b10:s1 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e37b10:s2 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e38130 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t41|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e38130:s0 -> Node0x5607d6e37950:d0[color=blue,style=dashed];
- Node0x5607d6e38130:s1 -> Node0x5607d6e37b80:d0;
- Node0x5607d6e37bf0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t13|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e37bf0:s0 -> Node0x5607d6e37b10:d0[color=blue,style=dashed];
- Node0x5607d6e37bf0:s1 -> Node0x5607d6e37b80:d0;
- Node0x5607d6e384b0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|add|t43|{<d0>i32}}"];
- Node0x5607d6e384b0:s0 -> Node0x5607d6e38130:d0;
- Node0x5607d6e384b0:s1 -> Node0x5607d6e37cd0:d0;
- Node0x5607d6e37d40 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|add|t16|{<d0>i32}}"];
- Node0x5607d6e37d40:s0 -> Node0x5607d6e37bf0:d0;
- Node0x5607d6e37d40:s1 -> Node0x5607d6e37cd0:d0;
- Node0x5607d6e37c60 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack)\>|t14|{<d0>ch}}"];
- Node0x5607d6e37c60:s0 -> Node0x5607d6e37b10:d0[color=blue,style=dashed];
- Node0x5607d6e37c60:s1 -> Node0x5607d6e379c0:d0;
- Node0x5607d6e37c60:s2 -> Node0x5607d6e37bf0:d0;
- Node0x5607d6e37c60:s3 -> Node0x5607d6e37720:d0;
- Node0x5607d6e38520 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack + 4)\>|t44|{<d0>ch}}"];
- Node0x5607d6e38520:s0 -> Node0x5607d6e37950:d0[color=blue,style=dashed];
- Node0x5607d6e38520:s1 -> Node0x5607d6e379c0:d0;
- Node0x5607d6e38520:s2 -> Node0x5607d6e384b0:d0;
- Node0x5607d6e38520:s3 -> Node0x5607d6e37720:d0;
- Node0x5607d6e37db0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack + 4)\>|t17|{<d0>ch}}"];
- Node0x5607d6e37db0:s0 -> Node0x5607d6e37b10:d0[color=blue,style=dashed];
- Node0x5607d6e37db0:s1 -> Node0x5607d6e379c0:d0;
- Node0x5607d6e37db0:s2 -> Node0x5607d6e37d40:d0;
- Node0x5607d6e37db0:s3 -> Node0x5607d6e37720:d0;
- Node0x5607d6e37e20 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t18|{<d0>ch}}"];
- Node0x5607d6e37e20:s0 -> Node0x5607d6e37c60:d0[color=blue,style=dashed];
- Node0x5607d6e37e20:s1 -> Node0x5607d6e37db0:d0[color=blue,style=dashed];
- Node0x5607d6e37f70 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|X86ISD::CALL|t21|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e37f70:s0 -> Node0x5607d6e37e20:d0[color=blue,style=dashed];
- Node0x5607d6e37f70:s1 -> Node0x5607d6e37e90:d0;
- Node0x5607d6e37f70:s2 -> Node0x5607d6e37f00:d0;
- Node0x5607d6e37fe0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|callseq_end|t22|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e37fe0:s0 -> Node0x5607d6e37f70:d0[color=blue,style=dashed];
- Node0x5607d6e37fe0:s1 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e37fe0:s2 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e37fe0:s3 -> Node0x5607d6e37f70:d1[color=red,style=bold];
- Node0x5607d6e381a0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|load\<(load (s32) from %ir.inout, align 8)\>|t38|{<d0>i32|<d1>ch}}"];
- Node0x5607d6e381a0:s0 -> Node0x5607d6e37fe0:d0[color=blue,style=dashed];
- Node0x5607d6e381a0:s1 -> Node0x5607d6e37790:d0;
- Node0x5607d6e381a0:s2 -> Node0x5607d6e37720:d0;
- Node0x5607d6e380c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t24|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e380c0:s0 -> Node0x5607d6e37fe0:d0[color=blue,style=dashed];
- Node0x5607d6e380c0:s1 -> Node0x5607d6e38050:d0;
- Node0x5607d6e380c0:s2 -> Node0x5607d6e37fe0:d1[color=red,style=bold];
- Node0x5607d6e38440 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack)\>|t42|{<d0>ch}}"];
- Node0x5607d6e38440:s0 -> Node0x5607d6e37950:d0[color=blue,style=dashed];
- Node0x5607d6e38440:s1 -> Node0x5607d6e381a0:d0;
- Node0x5607d6e38440:s2 -> Node0x5607d6e38130:d0;
- Node0x5607d6e38440:s3 -> Node0x5607d6e37720:d0;
- Node0x5607d6e38590 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
- Node0x5607d6e38590:s0 -> Node0x5607d6e38440:d0[color=blue,style=dashed];
- Node0x5607d6e38590:s1 -> Node0x5607d6e38520:d0[color=blue,style=dashed];
- Node0x5607d6e3db50 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|X86ISD::CALL|t47|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e3db50:s0 -> Node0x5607d6e38590:d0[color=blue,style=dashed];
- Node0x5607d6e3db50:s1 -> Node0x5607d6e38600:d0;
- Node0x5607d6e3db50:s2 -> Node0x5607d6e37f00:d0;
- Node0x5607d6e3dbc0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|callseq_end|t48|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e3dbc0:s0 -> Node0x5607d6e3db50:d0[color=blue,style=dashed];
- Node0x5607d6e3dbc0:s1 -> Node0x5607d6e37a30:d0;
- Node0x5607d6e3dbc0:s2 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e3dbc0:s3 -> Node0x5607d6e3db50:d1[color=red,style=bold];
- Node0x5607d6e3dc30 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t49|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x5607d6e3dc30:s0 -> Node0x5607d6e3dbc0:d0[color=blue,style=dashed];
- Node0x5607d6e3dc30:s1 -> Node0x5607d6e38050:d0;
- Node0x5607d6e3dc30:s2 -> Node0x5607d6e3dbc0:d1[color=red,style=bold];
- Node0x5607d6e3dca0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into %ir.inout, align 8)\>|t50|{<d0>ch}}"];
- Node0x5607d6e3dca0:s0 -> Node0x5607d6e381a0:d1[color=blue,style=dashed];
- Node0x5607d6e3dca0:s1 -> Node0x5607d6e3dc30:d0;
- Node0x5607d6e3dca0:s2 -> Node0x5607d6e37790:d0;
- Node0x5607d6e3dca0:s3 -> Node0x5607d6e37720:d0;
- Node0x5607d6e382f0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
- Node0x5607d6e382f0:s0 -> Node0x5607d6e3dca0:d0[color=blue,style=dashed];
- Node0x5607d6e382f0:s1 -> Node0x5607d6e380c0:d1[color=blue,style=dashed];
- Node0x5607d6e38360 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
- Node0x5607d6e38360:s0 -> Node0x5607d6e382f0:d0[color=blue,style=dashed];
- Node0x5607d6e38360:s1 -> Node0x5607d6e38050:d0;
- Node0x5607d6e38360:s2 -> Node0x5607d6e379c0:d0;
- Node0x5607d6e383d0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|X86ISD::RET_GLUE|t31|{<d0>ch}}"];
- Node0x5607d6e383d0:s0 -> Node0x5607d6e38360:d0[color=blue,style=dashed];
- Node0x5607d6e383d0:s1 -> Node0x5607d6e37aa0:d0;
- Node0x5607d6e383d0:s2 -> Node0x5607d6e38050:d0;
- Node0x5607d6e383d0:s3 -> Node0x5607d6e38360:d1[color=red,style=bold];
- Node0x0[ plaintext=circle, label ="GraphRoot"];
- Node0x0 -> Node0x5607d6e383d0:d0[color=blue,style=dashed];
-}
diff --git a/llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot b/llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot
deleted file mode 100644
index 6907ee3e42724..0000000000000
--- a/llvm/test/CodeGen/M68k/Regression/m68k-pre-sched.dot
+++ /dev/null
@@ -1,106 +0,0 @@
-digraph "scheduler input for double_arg_test:start" {
- rankdir="BT";
- label="scheduler input for double_arg_test:start";
-
- Node0x577827b5e3a0 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
- Node0x577827b8e430 [shape=record,shape=Mrecord,label="{{<s0>0}|MOVI32ri|t8|{<d0>i32|<d1>i8}}"];
- Node0x577827b8e430:s0 -> Node0x577827b8e510:d0;
- Node0x577827b8e4a0 [shape=record,shape=Mrecord,label="{TargetConstant\<8\>|t9|{<d0>i32}}"];
- Node0x577827b8e510 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
- Node0x577827b8e5f0 [shape=record,shape=Mrecord,label="{Register $sp|t12|{<d0>i32}}"];
- Node0x577827b8e900 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=1]|t19|{<d0>i32}}"];
- Node0x577827b8e970 [shape=record,shape=Mrecord,label="{RegisterMask|t20|{<d0>Untyped}}"];
- Node0x577827b8eac0 [shape=record,shape=Mrecord,label="{Register $d0|t23|{<d0>i32}}"];
- Node0x577827b8f070 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3' [TF=1]|t46|{<d0>i32}}"];
- Node0x577827b8e200 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32rp\<Mem:(load (s32) from %fixed-stack.0, align 8)\>|t3|{<d0>i32|<d1>i8|<d2>ch}}"];
- Node0x577827b8e200:s0 -> Node0x577827b8e510:d0;
- Node0x577827b8e200:s1 -> Node0x577827b8e740:d0;
- Node0x577827b8e200:s2 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
- Node0x577827b8e3c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|ADJCALLSTACKDOWN|t40|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x577827b8e3c0:s0 -> Node0x577827b8e4a0:d0;
- Node0x577827b8e3c0:s1 -> Node0x577827b8e510:d0;
- Node0x577827b8e3c0:s2 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
- Node0x577827b8e580 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|ADJCALLSTACKDOWN|t11|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x577827b8e580:s0 -> Node0x577827b8e4a0:d0;
- Node0x577827b8e580:s1 -> Node0x577827b8e510:d0;
- Node0x577827b8e580:s2 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
- Node0x577827b8eba0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t41|{<d0>i32|<d1>ch}}"];
- Node0x577827b8eba0:s0 -> Node0x577827b8e3c0:d1[color=blue,style=dashed];
- Node0x577827b8eba0:s1 -> Node0x577827b8e5f0:d0;
- Node0x577827b8e660 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|CopyFromReg|t13|{<d0>i32|<d1>ch}}"];
- Node0x577827b8e660:s0 -> Node0x577827b8e580:d1[color=blue,style=dashed];
- Node0x577827b8e660:s1 -> Node0x577827b8e5f0:d0;
- Node0x577827b8e6d0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32ji\<Mem:(store (s32) into stack, align 2)\>|t14|{<d0>i8|<d1>ch}}"];
- Node0x577827b8e6d0:s0 -> Node0x577827b8e660:d0;
- Node0x577827b8e6d0:s1 -> Node0x577827b8e510:d0;
- Node0x577827b8e6d0:s2 -> Node0x577827b8e580:d1[color=blue,style=dashed];
- Node0x577827b8ef90 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|MOV32pi\<Mem:(store (s32) into stack + 4, align 2)\>|t44|{<d0>i8|<d1>ch}}"];
- Node0x577827b8ef90:s0 -> Node0x577827b8ec10:d0;
- Node0x577827b8ef90:s1 -> Node0x577827b8eba0:d0;
- Node0x577827b8ef90:s2 -> Node0x577827b8e510:d0;
- Node0x577827b8ef90:s3 -> Node0x577827b8e3c0:d1[color=blue,style=dashed];
- Node0x577827b8e820 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|MOV32pi\<Mem:(store (s32) into stack + 4, align 2)\>|t17|{<d0>i8|<d1>ch}}"];
- Node0x577827b8e820:s0 -> Node0x577827b8ec10:d0;
- Node0x577827b8e820:s1 -> Node0x577827b8e660:d0;
- Node0x577827b8e820:s2 -> Node0x577827b8e510:d0;
- Node0x577827b8e820:s3 -> Node0x577827b8e580:d1[color=blue,style=dashed];
- Node0x577827b8e890 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t18|{<d0>ch}}"];
- Node0x577827b8e890:s0 -> Node0x577827b8e6d0:d1[color=blue,style=dashed];
- Node0x577827b8e890:s1 -> Node0x577827b8e820:d1[color=blue,style=dashed];
- Node0x577827b8e9e0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CALLb|t21|{<d0>ch|<d1>glue}}"];
- Node0x577827b8e9e0:s0 -> Node0x577827b8e900:d0;
- Node0x577827b8e9e0:s1 -> Node0x577827b8e970:d0;
- Node0x577827b8e9e0:s2 -> Node0x577827b8e890:d0[color=blue,style=dashed];
- Node0x577827b8ea50 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKUP|t22|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x577827b8ea50:s0 -> Node0x577827b8e4a0:d0;
- Node0x577827b8ea50:s1 -> Node0x577827b8e510:d0;
- Node0x577827b8ea50:s2 -> Node0x577827b8e9e0:d0[color=blue,style=dashed];
- Node0x577827b8ea50:s3 -> Node0x577827b8e9e0:d1[color=red,style=bold];
- Node0x577827b8eb30 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t24|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x577827b8eb30:s0 -> Node0x577827b8ea50:d1[color=blue,style=dashed];
- Node0x577827b8eb30:s1 -> Node0x577827b8eac0:d0;
- Node0x577827b8eb30:s2 -> Node0x577827b8ea50:d2[color=red,style=bold];
- Node0x577827b8eeb0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32jj\<Mem:(store (s32) into stack, align 2) (load (s32) from %ir.inout, align 8)\>|t42|{<d0>i8|<d1>ch}}"];
- Node0x577827b8eeb0:s0 -> Node0x577827b8eba0:d0;
- Node0x577827b8eeb0:s1 -> Node0x577827b8e200:d0;
- Node0x577827b8eeb0:s2 -> Node0x577827b8e270:d0[color=blue,style=dashed];
- Node0x577827b8f000 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
- Node0x577827b8f000:s0 -> Node0x577827b8eeb0:d1[color=blue,style=dashed];
- Node0x577827b8f000:s1 -> Node0x577827b8ef90:d1[color=blue,style=dashed];
- Node0x577827b91fa0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CALLb|t47|{<d0>ch|<d1>glue}}"];
- Node0x577827b91fa0:s0 -> Node0x577827b8f070:d0;
- Node0x577827b91fa0:s1 -> Node0x577827b8e970:d0;
- Node0x577827b91fa0:s2 -> Node0x577827b8f000:d0[color=blue,style=dashed];
- Node0x577827b92010 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|ADJCALLSTACKUP|t48|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x577827b92010:s0 -> Node0x577827b8e4a0:d0;
- Node0x577827b92010:s1 -> Node0x577827b8e510:d0;
- Node0x577827b92010:s2 -> Node0x577827b91fa0:d0[color=blue,style=dashed];
- Node0x577827b92010:s3 -> Node0x577827b91fa0:d1[color=red,style=bold];
- Node0x577827b92080 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyFromReg|t49|{<d0>i32|<d1>ch|<d2>glue}}"];
- Node0x577827b92080:s0 -> Node0x577827b92010:d1[color=blue,style=dashed];
- Node0x577827b92080:s1 -> Node0x577827b8eac0:d0;
- Node0x577827b92080:s2 -> Node0x577827b92010:d2[color=red,style=bold];
- Node0x577827b920f0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|MOV32jr\<Mem:(store (s32) into %ir.inout, align 8)\>|t50|{<d0>i8|<d1>ch}}"];
- Node0x577827b920f0:s0 -> Node0x577827b8e200:d0;
- Node0x577827b920f0:s1 -> Node0x577827b92080:d0;
- Node0x577827b920f0:s2 -> Node0x577827b8eeb0:d1[color=blue,style=dashed];
- Node0x577827b8ed60 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
- Node0x577827b8ed60:s0 -> Node0x577827b920f0:d1[color=blue,style=dashed];
- Node0x577827b8ed60:s1 -> Node0x577827b8eb30:d1[color=blue,style=dashed];
- Node0x577827b8edd0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
- Node0x577827b8edd0:s0 -> Node0x577827b8ed60:d0[color=blue,style=dashed];
- Node0x577827b8edd0:s1 -> Node0x577827b8eac0:d0;
- Node0x577827b8edd0:s2 -> Node0x577827b8e430:d0;
- Node0x577827b8ee40 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|RET|t31|{<d0>ch}}"];
- Node0x577827b8ee40:s0 -> Node0x577827b8e510:d0;
- Node0x577827b8ee40:s1 -> Node0x577827b8eac0:d0;
- Node0x577827b8ee40:s2 -> Node0x577827b8edd0:d0[color=blue,style=dashed];
- Node0x577827b8ee40:s3 -> Node0x577827b8edd0:d1[color=red,style=bold];
- Node0x577827b8e270 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t51|{<d0>ch}}"];
- Node0x577827b8e270:s0 -> Node0x577827b8ea50:d1[color=blue,style=dashed];
- Node0x577827b8e270:s1 -> Node0x577827b8e3c0:d1[color=blue,style=dashed];
- Node0x577827b8ec10 [shape=record,shape=Mrecord,label="{TargetConstant\<4\>|t52|{<d0>i16}}"];
- Node0x577827b8e740 [shape=record,shape=Mrecord,label="{TargetFrameIndex\<-1\>|t53|{<d0>i32}}"];
- Node0x0[ plaintext=circle, label ="GraphRoot"];
- Node0x0 -> Node0x577827b8ee40:d0[color=blue,style=dashed];
-}
diff --git a/llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot b/llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot
deleted file mode 100644
index cf0c1f6dc1407..0000000000000
--- a/llvm/test/CodeGen/M68k/Regression/m68k-pre-select.dot
+++ /dev/null
@@ -1,116 +0,0 @@
-digraph "isel input for double_arg_test:start" {
- rankdir="BT";
- label="isel input for double_arg_test:start";
-
- Node0x577827b5e3a0 [shape=record,shape=Mrecord,label="{EntryToken|t0|{<d0>ch|<d1>glue}}"];
- Node0x577827b8e120 [shape=record,shape=Mrecord,label="{FrameIndex\<-1\>|t1|{<d0>i32}}"];
- Node0x577827b8e190 [shape=record,shape=Mrecord,label="{undef|t2|{<d0>i32}}"];
- Node0x577827b8e430 [shape=record,shape=Mrecord,label="{Constant\<0\>|t8|{<d0>i32}}"];
- Node0x577827b8e4a0 [shape=record,shape=Mrecord,label="{TargetConstant\<8\>|t9|{<d0>i32}}"];
- Node0x577827b8e510 [shape=record,shape=Mrecord,label="{TargetConstant\<0\>|t10|{<d0>i32}}"];
- Node0x577827b8e5f0 [shape=record,shape=Mrecord,label="{Register $sp|t12|{<d0>i32}}"];
- Node0x577827b8e740 [shape=record,shape=Mrecord,label="{Constant\<4\>|t15|{<d0>i32}}"];
- Node0x577827b8e900 [shape=record,shape=Mrecord,label="{TargetGlobalAddress\<ptr @double_arg\> 0 [TF=1]|t19|{<d0>i32}}"];
- Node0x577827b8e970 [shape=record,shape=Mrecord,label="{RegisterMask|t20|{<d0>Untyped}}"];
- Node0x577827b8eac0 [shape=record,shape=Mrecord,label="{Register $d0|t23|{<d0>i32}}"];
- Node0x577827b8f070 [shape=record,shape=Mrecord,label="{TargetExternalSymbol'__mulsf3' [TF=1]|t46|{<d0>i32}}"];
- Node0x577827b8e200 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|load\<(load (s32) from %fixed-stack.0, align 8)\>|t3|{<d0>i32|<d1>ch}}"];
- Node0x577827b8e200:s0 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
- Node0x577827b8e200:s1 -> Node0x577827b8e120:d0;
- Node0x577827b8e200:s2 -> Node0x577827b8e190:d0;
- Node0x577827b8e3c0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|callseq_start|t40|{<d0>ch|<d1>glue}}"];
- Node0x577827b8e3c0:s0 -> Node0x577827b5e3a0:d0[color=blue,style=dashed];
- Node0x577827b8e3c0:s1 -> Node0x577827b8e4a0:d0;
- Node0x577827b8e3c0:s2 -> Node0x577827b8e510:d0;
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- Node0x577827b8e580:s1 -> Node0x577827b8e4a0:d0;
- Node0x577827b8e580:s2 -> Node0x577827b8e510:d0;
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- Node0x577827b8eba0:s1 -> Node0x577827b8e5f0:d0;
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- Node0x577827b8e660:s1 -> Node0x577827b8e5f0:d0;
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- Node0x577827b8ef20:s0 -> Node0x577827b8eba0:d0;
- Node0x577827b8ef20:s1 -> Node0x577827b8e740:d0;
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- Node0x577827b8e7b0:s0 -> Node0x577827b8e660:d0;
- Node0x577827b8e7b0:s1 -> Node0x577827b8e740:d0;
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- Node0x577827b8e6d0:s1 -> Node0x577827b8e430:d0;
- Node0x577827b8e6d0:s2 -> Node0x577827b8e660:d0;
- Node0x577827b8e6d0:s3 -> Node0x577827b8e190:d0;
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- Node0x577827b8ef90:s1 -> Node0x577827b8e430:d0;
- Node0x577827b8ef90:s2 -> Node0x577827b8ef20:d0;
- Node0x577827b8ef90:s3 -> Node0x577827b8e190:d0;
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- Node0x577827b8e820:s0 -> Node0x577827b8e580:d0[color=blue,style=dashed];
- Node0x577827b8e820:s1 -> Node0x577827b8e430:d0;
- Node0x577827b8e820:s2 -> Node0x577827b8e7b0:d0;
- Node0x577827b8e820:s3 -> Node0x577827b8e190:d0;
- Node0x577827b8e890 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t18|{<d0>ch}}"];
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- Node0x577827b8e890:s1 -> Node0x577827b8e820:d0[color=blue,style=dashed];
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- Node0x577827b8e9e0:s0 -> Node0x577827b8e890:d0[color=blue,style=dashed];
- Node0x577827b8e9e0:s1 -> Node0x577827b8e900:d0;
- Node0x577827b8e9e0:s2 -> Node0x577827b8e970:d0;
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- Node0x577827b8ea50:s1 -> Node0x577827b8e4a0:d0;
- Node0x577827b8ea50:s2 -> Node0x577827b8e510:d0;
- Node0x577827b8ea50:s3 -> Node0x577827b8e9e0:d1[color=red,style=bold];
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- Node0x577827b8ec10:s0 -> Node0x577827b8ea50:d0[color=blue,style=dashed];
- Node0x577827b8ec10:s1 -> Node0x577827b8e200:d0;
- Node0x577827b8ec10:s2 -> Node0x577827b8e190:d0;
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- Node0x577827b8eb30:s0 -> Node0x577827b8ea50:d0[color=blue,style=dashed];
- Node0x577827b8eb30:s1 -> Node0x577827b8eac0:d0;
- Node0x577827b8eb30:s2 -> Node0x577827b8ea50:d1[color=red,style=bold];
- Node0x577827b8eeb0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|store\<(store (s32) into stack, align 2)\>|t42|{<d0>ch}}"];
- Node0x577827b8eeb0:s0 -> Node0x577827b8e3c0:d0[color=blue,style=dashed];
- Node0x577827b8eeb0:s1 -> Node0x577827b8ec10:d0;
- Node0x577827b8eeb0:s2 -> Node0x577827b8eba0:d0;
- Node0x577827b8eeb0:s3 -> Node0x577827b8e190:d0;
- Node0x577827b8f000 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t45|{<d0>ch}}"];
- Node0x577827b8f000:s0 -> Node0x577827b8eeb0:d0[color=blue,style=dashed];
- Node0x577827b8f000:s1 -> Node0x577827b8ef90:d0[color=blue,style=dashed];
- Node0x577827b91fa0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|M68kISD::CALL|t47|{<d0>ch|<d1>glue}}"];
- Node0x577827b91fa0:s0 -> Node0x577827b8f000:d0[color=blue,style=dashed];
- Node0x577827b91fa0:s1 -> Node0x577827b8f070:d0;
- Node0x577827b91fa0:s2 -> Node0x577827b8e970:d0;
- Node0x577827b92010 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|callseq_end|t48|{<d0>ch|<d1>glue}}"];
- Node0x577827b92010:s0 -> Node0x577827b91fa0:d0[color=blue,style=dashed];
- Node0x577827b92010:s1 -> Node0x577827b8e4a0:d0;
- Node0x577827b92010:s2 -> Node0x577827b8e510:d0;
- Node0x577827b92010:s3 -> Node0x577827b91fa0:d1[color=red,style=bold];
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- Node0x577827b92080:s0 -> Node0x577827b92010:d0[color=blue,style=dashed];
- Node0x577827b92080:s1 -> Node0x577827b8eac0:d0;
- Node0x577827b92080:s2 -> Node0x577827b92010:d1[color=red,style=bold];
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- Node0x577827b920f0:s0 -> Node0x577827b8ec10:d1[color=blue,style=dashed];
- Node0x577827b920f0:s1 -> Node0x577827b92080:d0;
- Node0x577827b920f0:s2 -> Node0x577827b8e200:d0;
- Node0x577827b920f0:s3 -> Node0x577827b8e190:d0;
- Node0x577827b8ed60 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1}|TokenFactor|t37|{<d0>ch}}"];
- Node0x577827b8ed60:s0 -> Node0x577827b920f0:d0[color=blue,style=dashed];
- Node0x577827b8ed60:s1 -> Node0x577827b8eb30:d1[color=blue,style=dashed];
- Node0x577827b8edd0 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2}|CopyToReg|t30|{<d0>ch|<d1>glue}}"];
- Node0x577827b8edd0:s0 -> Node0x577827b8ed60:d0[color=blue,style=dashed];
- Node0x577827b8edd0:s1 -> Node0x577827b8eac0:d0;
- Node0x577827b8edd0:s2 -> Node0x577827b8e430:d0;
- Node0x577827b8ee40 [shape=record,shape=Mrecord,label="{{<s0>0|<s1>1|<s2>2|<s3>3}|M68kISD::RET|t31|{<d0>ch}}"];
- Node0x577827b8ee40:s0 -> Node0x577827b8edd0:d0[color=blue,style=dashed];
- Node0x577827b8ee40:s1 -> Node0x577827b8e510:d0;
- Node0x577827b8ee40:s2 -> Node0x577827b8eac0:d0;
- Node0x577827b8ee40:s3 -> Node0x577827b8edd0:d1[color=red,style=bold];
- Node0x0[ plaintext=circle, label ="GraphRoot"];
- Node0x0 -> Node0x577827b8ee40:d0[color=blue,style=dashed];
-}
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