[llvm] [BOLT][AArch64] Avoid UB due to shift of negative value. (PR #174994)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-bolt

Author: Harald van Dijk (hvdijk)

<details>
<summary>Changes</summary>

A build with LLVM_USE_SANITIZER=Undefined showed:

  bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp:2277:60:
  runtime error: left shift of negative value -32768

This showed up in bolt/test/AArch64/veneer-lite-mode.s.

It is valid for ADRP's operand to be negative, and not valid to shift it like that. To perform this shift reliably, cast the value to unsigned.

---
Full diff: https://github.com/llvm/llvm-project/pull/174994.diff


1 Files Affected:

- (modified) bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp (+1-1) 


``````````diff
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index 5c030aed26190..7c7515b5ed222 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -2274,7 +2274,7 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
         !I->getOperand(1).isImm() || I->getOperand(0).getReg() != AArch64::X16)
       return 0;
     TargetHiBits = &*I;
-    Addr |= (Address + ((int64_t)I->getOperand(1).getImm() << 12)) &
+    Addr |= (Address + ((uint64_t)I->getOperand(1).getImm() << 12)) &
             0xFFFFFFFFFFFFF000ULL;
     Target = Addr;
     return 3;

``````````

</details>


https://github.com/llvm/llvm-project/pull/174994