[llvm] [SelectionDAG] Provide context for vector count / type mismatch (PR #175433)

[Nikita Popov via llvm-commits]

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@@ -330,6 +331,21 @@ static void diagnosePossiblyInvalidConstraint(LLVMContext &Ctx, const Value *V,
   return Ctx.emitError(I, ErrMsg);
 }
 
+/// Emit a fatal error if the broken dow registers don't match part type
+// or count.
+static void ensureMatchedVecRegParts(unsigned NumRegs, unsigned NumParts,
+                                     MVT RegisterVT, MVT PartVT) {
+  if (NumRegs != NumParts || RegisterVT != PartVT)
+    report_fatal_error(Twine("Part count doesn't match vector breakdown! ")
+                           .concat(Twine(NumRegs))
+                           .concat(" registers, ")
+                           .concat(Twine(NumParts))
+                           .concat(" parts, ")
+                           .concat(Twine(RegisterVT.getString()))
+                           .concat(" RegisterVT, ")
+                           .concat(Twine(PartVT.getString()))
+                           .concat(" PartVT"));
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nikic wrote:

You should be able to concatenate with `+` with the `Twine()` wrapper on just the first string.

https://github.com/llvm/llvm-project/pull/175433