[llvm] [AArch64] Add scal_to_vec patterns for SIMD convert intrinsics (PR #172837)

[Kerry McLaughlin via llvm-commits]

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@@ -607,3 +607,335 @@ define  float @fcvtzu_1s1s_simd(float %a) {
   %d = bitcast i32 %vcvtah_s32_f32 to float
   ret float %d
 }
+
+;
+; Intriniscs (scalar_to_vector)
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kmclaughlin-arm wrote:

```suggestion
; Intrinsics (scalar_to_vector)
```

https://github.com/llvm/llvm-project/pull/172837