[llvm] eba79bc - [X86][NewPM] Port x86-fixup-bw-insts to NPM (#175399)
via llvm-commits
llvm-commits at lists.llvm.org
Sun Jan 11 10:41:26 PST 2026
Author: Aiden Grossman
Date: 2026-01-11T10:41:21-08:00
New Revision: eba79bc33552aac6fe90a045082a3a2404f0eb13
URL: https://github.com/llvm/llvm-project/commit/eba79bc33552aac6fe90a045082a3a2404f0eb13
DIFF: https://github.com/llvm/llvm-project/commit/eba79bc33552aac6fe90a045082a3a2404f0eb13.diff
LOG: [X86][NewPM] Port x86-fixup-bw-insts to NPM (#175399)
Similar to other pass portings. Refactor into an implementation class,
rename the old pass, and add a wrapper around the implementation for the
new pass manager. Handle PSI/MBFI similar to other backend passes.
Added:
Modified:
llvm/lib/Target/X86/X86.h
llvm/lib/Target/X86/X86FixupBWInsts.cpp
llvm/lib/Target/X86/X86PassRegistry.def
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/CodeGen/X86/fixup-bw-copy.mir
llvm/test/CodeGen/X86/fixup-bw-inst.mir
llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 2fd6ece9737a0..1b9cbcf0b626c 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -210,7 +210,13 @@ FunctionPass *createX86CmovConversionLegacyPass();
/// certain byte and word instructions by equivalent 32 bit instructions,
/// in order to eliminate partial register usage, false dependences on
/// the upper portions of registers, and to save code size.
-FunctionPass *createX86FixupBWInsts();
+class X86FixupBWInstsPass : public PassInfoMixin<X86FixupBWInstsPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createX86FixupBWInstsLegacyPass();
/// Return a Machine IR pass that reassigns instruction chains from one domain
/// to another, when profitable.
@@ -302,7 +308,7 @@ FunctionPass *createX86ArgumentStackSlotPass();
FunctionPass *createX86SuppressAPXForRelocationPass();
void initializeCompressEVEXLegacyPass(PassRegistry &);
-void initializeFixupBWInstPassPass(PassRegistry &);
+void initializeX86FixupBWInstLegacyPass(PassRegistry &);
void initializeFixupLEAsLegacyPass(PassRegistry &);
void initializeX86ArgumentStackSlotPassPass(PassRegistry &);
void initializeX86AsmPrinterPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86FixupBWInsts.cpp b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
index 6e0a0f6f1de93..ffe3510af61ac 100644
--- a/llvm/lib/Target/X86/X86FixupBWInsts.cpp
+++ b/llvm/lib/Target/X86/X86FixupBWInsts.cpp
@@ -51,6 +51,7 @@
#include "llvm/Analysis/ProfileSummaryInfo.h"
#include "llvm/CodeGen/LazyMachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/LiveRegUnits.h"
+#include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
@@ -73,7 +74,13 @@ static cl::opt<bool>
cl::init(true), cl::Hidden);
namespace {
-class FixupBWInstPass : public MachineFunctionPass {
+class X86FixupBWInstImpl {
+public:
+ X86FixupBWInstImpl(ProfileSummaryInfo *PSI, MachineBlockFrequencyInfo *MBFI)
+ : PSI(PSI), MBFI(MBFI) {}
+ bool runOnMachineFunction(MachineFunction &MF);
+
+private:
/// Loop over all of the instructions in the basic block replacing applicable
/// byte or word instructions with better alternatives.
void processBasicBlock(MachineFunction &MF, MachineBasicBlock &MBB);
@@ -104,12 +111,30 @@ class FixupBWInstPass : public MachineFunctionPass {
// otherwise.
MachineInstr *tryReplaceInstr(MachineInstr *MI, MachineBasicBlock &MBB) const;
+ MachineFunction *MF = nullptr;
+
+ /// Machine instruction info used throughout the class.
+ const X86InstrInfo *TII = nullptr;
+
+ const TargetRegisterInfo *TRI = nullptr;
+
+ /// Local member for function's OptForSize attribute.
+ bool OptForSize = false;
+
+ /// Register Liveness information after the current instruction.
+ LiveRegUnits LiveUnits;
+
+ ProfileSummaryInfo *PSI = nullptr;
+ MachineBlockFrequencyInfo *MBFI = nullptr;
+};
+
+class X86FixupBWInstLegacy : public MachineFunctionPass {
public:
static char ID;
StringRef getPassName() const override { return FIXUPBW_DESC; }
- FixupBWInstPass() : MachineFunctionPass(ID) { }
+ X86FixupBWInstLegacy() : MachineFunctionPass(ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<ProfileSummaryInfoWrapperPass>();
@@ -125,42 +150,25 @@ class FixupBWInstPass : public MachineFunctionPass {
MachineFunctionProperties getRequiredProperties() const override {
return MachineFunctionProperties().setNoVRegs();
}
+};
-private:
- MachineFunction *MF = nullptr;
-
- /// Machine instruction info used throughout the class.
- const X86InstrInfo *TII = nullptr;
+char X86FixupBWInstLegacy::ID = 0;
- const TargetRegisterInfo *TRI = nullptr;
+} // namespace
- /// Local member for function's OptForSize attribute.
- bool OptForSize = false;
+INITIALIZE_PASS(X86FixupBWInstLegacy, FIXUPBW_NAME, FIXUPBW_DESC, false, false)
- /// Register Liveness information after the current instruction.
- LiveRegUnits LiveUnits;
-
- ProfileSummaryInfo *PSI = nullptr;
- MachineBlockFrequencyInfo *MBFI = nullptr;
-};
-char FixupBWInstPass::ID = 0;
+FunctionPass *llvm::createX86FixupBWInstsLegacyPass() {
+ return new X86FixupBWInstLegacy();
}
-INITIALIZE_PASS(FixupBWInstPass, FIXUPBW_NAME, FIXUPBW_DESC, false, false)
-
-FunctionPass *llvm::createX86FixupBWInsts() { return new FixupBWInstPass(); }
-
-bool FixupBWInstPass::runOnMachineFunction(MachineFunction &MF) {
- if (!FixupBWInsts || skipFunction(MF.getFunction()))
+bool X86FixupBWInstImpl::runOnMachineFunction(MachineFunction &MF) {
+ if (!FixupBWInsts)
return false;
this->MF = &MF;
TII = MF.getSubtarget<X86Subtarget>().getInstrInfo();
TRI = MF.getRegInfo().getTargetRegisterInfo();
- PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
- MBFI = (PSI && PSI->hasProfileSummary()) ?
- &getAnalysis<LazyMachineBlockFrequencyInfoPass>().getBFI() :
- nullptr;
LiveUnits.init(TII->getRegisterInfo());
LLVM_DEBUG(dbgs() << "Start X86FixupBWInsts\n";);
@@ -179,7 +187,7 @@ bool FixupBWInstPass::runOnMachineFunction(MachineFunction &MF) {
/// destination register.
///
/// If so, return that super register in \p SuperDestReg.
-Register FixupBWInstPass::getSuperRegDestIfDead(MachineInstr *OrigMI) const {
+Register X86FixupBWInstImpl::getSuperRegDestIfDead(MachineInstr *OrigMI) const {
const X86RegisterInfo *TRI = &TII->getRegisterInfo();
Register OrigDestReg = OrigMI->getOperand(0).getReg();
Register SuperDestReg = getX86SubSuperRegister(OrigDestReg, 32);
@@ -274,8 +282,8 @@ Register FixupBWInstPass::getSuperRegDestIfDead(MachineInstr *OrigMI) const {
return SuperDestReg;
}
-MachineInstr *FixupBWInstPass::tryReplaceLoad(unsigned New32BitOpcode,
- MachineInstr *MI) const {
+MachineInstr *X86FixupBWInstImpl::tryReplaceLoad(unsigned New32BitOpcode,
+ MachineInstr *MI) const {
// We are going to try to rewrite this load to a larger zero-extending
// load. This is safe if all portions of the 32 bit super-register
// of the original destination register, except for the original destination
@@ -305,7 +313,7 @@ MachineInstr *FixupBWInstPass::tryReplaceLoad(unsigned New32BitOpcode,
return MIB;
}
-MachineInstr *FixupBWInstPass::tryReplaceCopy(MachineInstr *MI) const {
+MachineInstr *X86FixupBWInstImpl::tryReplaceCopy(MachineInstr *MI) const {
assert(MI->getNumExplicitOperands() == 2);
auto &OldDest = MI->getOperand(0);
auto &OldSrc = MI->getOperand(1);
@@ -342,8 +350,8 @@ MachineInstr *FixupBWInstPass::tryReplaceCopy(MachineInstr *MI) const {
return MIB;
}
-MachineInstr *FixupBWInstPass::tryReplaceExtend(unsigned New32BitOpcode,
- MachineInstr *MI) const {
+MachineInstr *X86FixupBWInstImpl::tryReplaceExtend(unsigned New32BitOpcode,
+ MachineInstr *MI) const {
Register NewDestReg = getSuperRegDestIfDead(MI);
if (!NewDestReg)
return nullptr;
@@ -376,8 +384,9 @@ MachineInstr *FixupBWInstPass::tryReplaceExtend(unsigned New32BitOpcode,
return MIB;
}
-MachineInstr *FixupBWInstPass::tryReplaceInstr(MachineInstr *MI,
- MachineBasicBlock &MBB) const {
+MachineInstr *
+X86FixupBWInstImpl::tryReplaceInstr(MachineInstr *MI,
+ MachineBasicBlock &MBB) const {
// See if this is an instruction of the type we are currently looking for.
switch (MI->getOpcode()) {
@@ -422,8 +431,8 @@ MachineInstr *FixupBWInstPass::tryReplaceInstr(MachineInstr *MI,
return nullptr;
}
-void FixupBWInstPass::processBasicBlock(MachineFunction &MF,
- MachineBasicBlock &MBB) {
+void X86FixupBWInstImpl::processBasicBlock(MachineFunction &MF,
+ MachineBasicBlock &MBB) {
// This algorithm doesn't delete the instructions it is replacing
// right away. By leaving the existing instructions in place, the
@@ -461,3 +470,33 @@ void FixupBWInstPass::processBasicBlock(MachineFunction &MF,
MBB.erase(MI);
}
}
+
+bool X86FixupBWInstLegacy::runOnMachineFunction(MachineFunction &MF) {
+ if (skipFunction(MF.getFunction()))
+ return false;
+ ProfileSummaryInfo *PSI =
+ &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
+ MachineBlockFrequencyInfo *MBFI =
+ (PSI && PSI->hasProfileSummary())
+ ? &getAnalysis<LazyMachineBlockFrequencyInfoPass>().getBFI()
+ : nullptr;
+ X86FixupBWInstImpl Impl(PSI, MBFI);
+ return Impl.runOnMachineFunction(MF);
+}
+
+PreservedAnalyses
+X86FixupBWInstsPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ ProfileSummaryInfo *PSI =
+ MFAM.getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF)
+ .getCachedResult<ProfileSummaryAnalysis>(
+ *MF.getFunction().getParent());
+ MachineBlockFrequencyInfo *MBFI = nullptr;
+ if (PSI && PSI->hasProfileSummary())
+ MBFI = &MFAM.getResult<MachineBlockFrequencyAnalysis>(MF);
+ X86FixupBWInstImpl Impl(PSI, MBFI);
+ bool Changed = Impl.runOnMachineFunction(MF);
+ return Changed ? getMachineFunctionPassPreservedAnalyses()
+ .preserveSet<CFGAnalyses>()
+ : PreservedAnalyses::all();
+}
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
index 316a0722cd9e7..5d5bfeb4be19c 100644
--- a/llvm/lib/Target/X86/X86PassRegistry.def
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -39,6 +39,7 @@ MACHINE_FUNCTION_PASS("x86-dyn-alloca-expander", X86DynAllocaExpanderPass())
MACHINE_FUNCTION_PASS("x86-expand-pseudo", X86ExpandPseudoPass())
MACHINE_FUNCTION_PASS("x86-fast-pre-tile-config", X86FastPreTileConfigPass())
MACHINE_FUNCTION_PASS("x86-fast-tile-config", X86FastTileConfigPass())
+MACHINE_FUNCTION_PASS("x86-fixup-bw-insts", X86FixupBWInstsPass())
MACHINE_FUNCTION_PASS("x86-fixup-leas", X86FixupLEAsPass())
MACHINE_FUNCTION_PASS("x86-flags-copy-lowering", X86FlagsCopyLoweringPass())
MACHINE_FUNCTION_PASS("x86-fp-stackifier", X86FPStackifierPass())
@@ -50,7 +51,6 @@ MACHINE_FUNCTION_PASS("x86-optimize-leas", X86OptimizeLEAsPass())
#define DUMMY_MACHINE_FUNCTION_PASS(NAME, PASS_NAME)
#endif
DUMMY_MACHINE_FUNCTION_PASS("x86-execution-domain-fix", X86ExecutionDomainFix())
-DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-bw-inst", FixupBWInstPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-inst-tuning", X86FixupInstTuningPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-setcc", X86FixupSetCCPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-fixup-vector-constants", X86FixupVectorConstantsPass())
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index edf454e119cf0..0a59b7e303911 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -73,7 +73,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() {
initializeX86PreTileConfigPass(PR);
initializeGlobalISel(PR);
initializeWinEHStatePassPass(PR);
- initializeFixupBWInstPassPass(PR);
+ initializeX86FixupBWInstLegacyPass(PR);
initializeCompressEVEXLegacyPass(PR);
initializeFixupLEAsLegacyPass(PR);
initializeX86FPStackifierLegacyPass(PR);
@@ -564,7 +564,7 @@ void X86PassConfig::addPreEmitPass() {
addPass(createX86IssueVZeroUpperPass());
if (getOptLevel() != CodeGenOptLevel::None) {
- addPass(createX86FixupBWInsts());
+ addPass(createX86FixupBWInstsLegacyPass());
addPass(createX86PadShortFunctions());
addPass(createX86FixupLEAsLegacyPass());
addPass(createX86FixupInstTuning());
diff --git a/llvm/test/CodeGen/X86/fixup-bw-copy.mir b/llvm/test/CodeGen/X86/fixup-bw-copy.mir
index 7d9dee748d415..831e7917e8d65 100644
--- a/llvm/test/CodeGen/X86/fixup-bw-copy.mir
+++ b/llvm/test/CodeGen/X86/fixup-bw-copy.mir
@@ -1,4 +1,5 @@
# RUN: llc -run-pass x86-fixup-bw-insts -mtriple=x86_64-- -o - %s | FileCheck %s
+# RUN: llc -passes="require<profile-summary>,function(machine-function(x86-fixup-bw-insts))" -mtriple=x86_64-- -o - %s | FileCheck %s
# Verify that we correctly deal with the flag edge cases when replacing
# copies by bigger copies, which is a pretty unusual transform.
diff --git a/llvm/test/CodeGen/X86/fixup-bw-inst.mir b/llvm/test/CodeGen/X86/fixup-bw-inst.mir
index c8e7690461601..3c3ed3c683528 100644
--- a/llvm/test/CodeGen/X86/fixup-bw-inst.mir
+++ b/llvm/test/CodeGen/X86/fixup-bw-inst.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass x86-fixup-bw-insts %s -o - | FileCheck %s
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -passes="require<profile-summary>,function(machine-function(x86-fixup-bw-insts))" %s -o - | FileCheck %s
--- |
define void @test1() { ret void }
diff --git a/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir b/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
index 47860f8f47118..505e17ee6b59b 100644
--- a/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
+++ b/llvm/test/DebugInfo/MIR/InstrRef/x86-fixup-bw-inst-subreb.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=x86_64-unknown-linux-gnu -run-pass x86-fixup-bw-insts %s -o - -experimental-debug-variable-locations | FileCheck %s
+# RUN: llc -mtriple=x86_64-unknown-linux-gnu -passes="require<profile-summary>,function(machine-function(x86-fixup-bw-insts))" %s -o - -experimental-debug-variable-locations | FileCheck %s
#
# This test is a copy of llvm/test/CodeGen/X86/fixup-bw-inst.mir, with a few
# test bodies removed. The pass promotes certain register operations to be
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