[llvm] [X86] Lower scalar llvm.clmul intrinsics to PCLMULQDQ (#175189) (PR #175216)

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 9 10:10:49 PST 2026


================
@@ -33082,6 +33089,33 @@ static SDValue LowerBITREVERSE(SDValue Op, const X86Subtarget &Subtarget,
   return DAG.getNode(ISD::OR, DL, VT, Lo, Hi);
 }
 
+static SDValue LowerCLMUL(SDValue Op, const X86Subtarget &Subtarget,
+                          SelectionDAG &DAG) {
+  SDLoc DL(Op);
+  MVT VT = Op.getSimpleValueType();
+  SDValue LHS = Op.getOperand(0);
+  SDValue RHS = Op.getOperand(1);
+
+  assert(Subtarget.hasPCLMUL() && "PCLMUL required for CLMUL lowering");
+
+  if (VT != MVT::i64) {
----------------
topperc wrote:

For 32-bit targets couldn't we just insert into an i32 into an v4i32 vector and bitcast to v2i64? The upper half of the i64 being garbage won't affect the lower 32 bits of the result.

https://github.com/llvm/llvm-project/pull/175216


More information about the llvm-commits mailing list