[llvm] 6e1acd0 - [SLP]Update deps for copyables operands, if the user is used several times in node

Alexey Bataev via llvm-commits llvm-commits at lists.llvm.org
Thu Jan 8 12:50:43 PST 2026


Author: Alexey Bataev
Date: 2026-01-08T12:50:32-08:00
New Revision: 6e1acd061e74f44df6d53d54c78d1e50790456a8

URL: https://github.com/llvm/llvm-project/commit/6e1acd061e74f44df6d53d54c78d1e50790456a8
DIFF: https://github.com/llvm/llvm-project/commit/6e1acd061e74f44df6d53d54c78d1e50790456a8.diff

LOG: [SLP]Update deps for copyables operands, if the user is used several times in node

If the user instruction is used several times in the node, and in one
cases its operand is copyable, but in another is not, need to check all
operands to be sure we do not miss scheduling

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll

Modified: 
    llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
index 5dcf9ef4f14a1..006f0c14cba69 100644
--- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
+++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
@@ -5772,8 +5772,6 @@ class slpvectorizer::BoUpSLP {
                   DecrUnschedForInst(I, Bundle->getTreeEntry(), OpIdx, Checked);
                 }
               // If parent node is schedulable, it will be handled correctly.
-              if (!IsNonSchedulableWithParentPhiNode)
-                break;
               It = std::find(std::next(It),
                              Bundle->getTreeEntry()->Scalars.end(), In);
             } while (It != Bundle->getTreeEntry()->Scalars.end());

diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll b/llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll
new file mode 100644
index 0000000000000..675e4ad591f24
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/multi-parent-instr-copyable-regular.ll
@@ -0,0 +1,85 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mcpu=skylake < %s | FileCheck %s
+
+define void @test(ptr %0, ptr %1, ptr %2, ptr %3, double %4, double %5) {
+; CHECK-LABEL: define void @test(
+; CHECK-SAME: ptr [[TMP0:%.*]], ptr [[TMP1:%.*]], ptr [[TMP2:%.*]], ptr [[TMP3:%.*]], double [[TMP4:%.*]], double [[TMP5:%.*]]) #[[ATTR0:[0-9]+]] {
+; CHECK-NEXT:  [[BB:.*:]]
+; CHECK-NEXT:    [[TMP6:%.*]] = getelementptr i8, ptr [[TMP3]], i64 1040
+; CHECK-NEXT:    [[TMP7:%.*]] = load double, ptr [[TMP1]], align 8
+; CHECK-NEXT:    [[TMP8:%.*]] = load double, ptr [[TMP0]], align 8
+; CHECK-NEXT:    [[TMP9:%.*]] = load double, ptr [[TMP2]], align 8
+; CHECK-NEXT:    [[TMP10:%.*]] = insertelement <4 x double> poison, double [[TMP4]], i32 0
+; CHECK-NEXT:    [[TMP11:%.*]] = insertelement <4 x double> [[TMP10]], double [[TMP5]], i32 1
+; CHECK-NEXT:    [[TMP12:%.*]] = shufflevector <4 x double> [[TMP11]], <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 1, i32 0>
+; CHECK-NEXT:    [[TMP13:%.*]] = insertelement <4 x double> <double 0.000000e+00, double 0.000000e+00, double 1.000000e+00, double poison>, double [[TMP4]], i32 3
+; CHECK-NEXT:    [[TMP14:%.*]] = fmul <4 x double> [[TMP12]], [[TMP13]]
+; CHECK-NEXT:    [[TMP15:%.*]] = insertelement <2 x double> poison, double [[TMP4]], i32 0
+; CHECK-NEXT:    [[TMP16:%.*]] = insertelement <2 x double> [[TMP15]], double [[TMP9]], i32 1
+; CHECK-NEXT:    [[TMP17:%.*]] = fmul <2 x double> [[TMP16]], zeroinitializer
+; CHECK-NEXT:    [[TMP18:%.*]] = insertelement <2 x double> poison, double [[TMP9]], i32 0
+; CHECK-NEXT:    [[TMP19:%.*]] = insertelement <2 x double> [[TMP18]], double [[TMP8]], i32 1
+; CHECK-NEXT:    [[TMP20:%.*]] = fmul <2 x double> [[TMP19]], [[TMP17]]
+; CHECK-NEXT:    [[TMP21:%.*]] = shufflevector <4 x double> [[TMP12]], <4 x double> <double 1.000000e+00, double 1.000000e+00, double poison, double poison>, <4 x i32> <i32 4, i32 5, i32 0, i32 0>
+; CHECK-NEXT:    [[TMP22:%.*]] = fmul <4 x double> [[TMP12]], [[TMP21]]
+; CHECK-NEXT:    [[TMP23:%.*]] = insertelement <4 x double> <double 0.000000e+00, double poison, double 1.000000e+00, double 0.000000e+00>, double [[TMP7]], i32 1
+; CHECK-NEXT:    [[TMP24:%.*]] = fmul <4 x double> [[TMP23]], [[TMP14]]
+; CHECK-NEXT:    [[TMP25:%.*]] = shufflevector <2 x double> [[TMP20]], <2 x double> poison, <4 x i32> <i32 0, i32 poison, i32 1, i32 poison>
+; CHECK-NEXT:    [[TMP26:%.*]] = shufflevector <4 x double> [[TMP24]], <4 x double> [[TMP25]], <4 x i32> <i32 4, i32 1, i32 6, i32 3>
+; CHECK-NEXT:    [[TMP27:%.*]] = shufflevector <4 x double> [[TMP26]], <4 x double> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
+; CHECK-NEXT:    [[TMP28:%.*]] = fmul <4 x double> [[TMP27]], zeroinitializer
+; CHECK-NEXT:    [[TMP29:%.*]] = fmul <4 x double> [[TMP22]], <double 1.000000e+00, double 1.000000e+00, double 0.000000e+00, double 0.000000e+00>
+; CHECK-NEXT:    [[TMP30:%.*]] = shufflevector <4 x double> [[TMP12]], <4 x double> <double poison, double 0.000000e+00, double 0.000000e+00, double 0.000000e+00>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
+; CHECK-NEXT:    [[TMP31:%.*]] = fadd <4 x double> [[TMP30]], [[TMP28]]
+; CHECK-NEXT:    [[TMP32:%.*]] = fadd <4 x double> [[TMP31]], <double 0.000000e+00, double 1.000000e+00, double 1.000000e+00, double 1.000000e+00>
+; CHECK-NEXT:    [[TMP33:%.*]] = fadd <4 x double> [[TMP24]], [[TMP32]]
+; CHECK-NEXT:    [[TMP34:%.*]] = fadd <4 x double> [[TMP29]], [[TMP33]]
+; CHECK-NEXT:    store <4 x double> [[TMP34]], ptr [[TMP6]], align 8
+; CHECK-NEXT:    ret void
+;
+bb:
+  %6 = load double, ptr %1, align 8
+  %7 = load double, ptr %0, align 8
+  %8 = load double, ptr %2, align 8
+  %9 = fmul double %4, 0.000000e+00
+  %10 = fmul double %8, %9
+  %11 = fmul double %10, 0.000000e+00
+  %12 = fmul double %4, 0.000000e+00
+  %13 = fmul double %12, 0.000000e+00
+  %14 = fadd double %4, %11
+  %15 = fadd double %14, 0.000000e+00
+  %16 = fadd double %13, %15
+  %17 = fadd double %4, %16
+  %18 = getelementptr i8, ptr %3, i64 1040
+  store double %17, ptr %18, align 8
+  %19 = fmul double %5, 0.000000e+00
+  %20 = fmul double %6, %19
+  %21 = fmul double %20, 0.000000e+00
+  %22 = fadd double %21, 0.000000e+00
+  %23 = fadd double %22, 1.000000e+00
+  %24 = fadd double %20, %23
+  %25 = fadd double %5, %24
+  %26 = getelementptr i8, ptr %3, i64 1048
+  store double %25, ptr %26, align 8
+  %27 = fmul double %8, 0.000000e+00
+  %28 = fmul double %27, %7
+  %29 = fmul double %28, 0.000000e+00
+  %30 = fadd double %29, 0.000000e+00
+  %31 = fmul double %4, %5
+  %32 = fmul double %31, 0.000000e+00
+  %33 = fadd double %30, 1.000000e+00
+  %34 = fadd double %5, %33
+  %35 = fadd double %32, %34
+  %36 = getelementptr i8, ptr %3, i64 1056
+  store double %35, ptr %36, align 8
+  %37 = fmul double %28, 0.000000e+00
+  %38 = fmul double %4, %4
+  %39 = fmul double %38, 0.000000e+00
+  %40 = fadd double %37, 0.000000e+00
+  %41 = fadd double %40, 1.000000e+00
+  %42 = fadd double %39, %41
+  %43 = fadd double %39, %42
+  %44 = getelementptr i8, ptr %3, i64 1064
+  store double %43, ptr %44, align 8
+  ret void
+}


        


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